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10996 Commits

Author SHA1 Message Date
Chris Lattner
72b24cbbf6 Copy ExpandInlineAsm to TargetLowering from TargetAsmInfo. 
llvm-svn: 76441
 2009-07-20 17:51:36 +00:00
Chris Lattner
19134c0748 rename TargetAsmInfo::getASDirective -> getDataASDirective 
llvm-svn: 76431
 2009-07-20 17:12:46 +00:00
David Goodwin
d5865e6c60 Use t2LDRri12 for frame index loads. 
llvm-svn: 76424
 2009-07-20 15:55:39 +00:00
Bruno Cardoso Lopes
b47b093de2 For PC relative relocations where symbols are defined in the same section they 
are referenced, ignore the relocation entry and patch the relocatable field with
the computed symbol offset directly

llvm-svn: 76414
 2009-07-20 08:52:02 +00:00
Evan Cheng
2125e12632 Fix PR4567. Thumb1 target was using the wrong instruction to handle sp = sub fp, #c. 
llvm-svn: 76401
 2009-07-20 06:59:32 +00:00
Evan Cheng
2f6b299d6f Model fpscr to prevent fcmped / fcmpezs etc from being deleted. 
llvm-svn: 76390
 2009-07-20 02:12:31 +00:00
Bill Wendling
1a10a060cb Add plumbing for the `linker_private' linkage type. This type is meant for 
"private" symbols which the assember shouldn't strip, but which the linker may
remove after evaluation. This is mostly useful for Objective-C metadata.

This is plumbing, so we don't have a use of it yet. More to come, etc.

llvm-svn: 76385
 2009-07-20 01:03:30 +00:00
Daniel Dunbar
e1a18819f7 CMake support for SystemZ. 
llvm-svn: 76384
 2009-07-20 00:24:17 +00:00
Eli Friedman
5208843938 Don't override LowerArguments in the SPARC backend. In addition to 
being more consistent with other backends, this makes the SPARC backend 
deal with functions with arguments with illegal types correctly, which 
fixes some tests in test/CodeGen/Generic.

llvm-svn: 76375
 2009-07-19 19:53:46 +00:00
Evan Cheng
fd384e9493 Fix a regression from 76124. Thumb1 instructions default to S bit being true. 
llvm-svn: 76374
 2009-07-19 19:16:46 +00:00
Daniel Dunbar
8be4e61a2d Fix some minor MSVC compiler warnings. 
llvm-svn: 76356
 2009-07-19 01:38:38 +00:00
Daniel Dunbar
d45f99bdbf Unbreak build 
llvm-svn: 76354
 2009-07-19 01:33:04 +00:00
Eli Friedman
e208ce316a Switch Alpha over to the new call lowering style. New code mostly 
copied from the SystemZ target.  I don't think this causes any 
significant changes to the output (I compared the assembly, and the 
results appeared to be essentially unchanged), although I don't actually 
have an Alpha to test on.

I would appreciate if anyone with the appropriate hardware could test 
this. I'm not sure if that includes anyone subscribed to llvm-commits, 
though.

llvm-svn: 76353
 2009-07-19 01:11:32 +00:00
Daniel Dunbar
e52f9f19ff SystemZ *does* have a CodeGen/AsmPrinter split. 
- What it doesn't have is the rest of its cmake files...

llvm-svn: 76352
 2009-07-19 00:46:44 +00:00
Daniel Dunbar
f5a95d9e81 Tweak cmake files for the four targets that don't split CodeGen out. 
- We should canonicalize this and get rid of the cmake and llvm-config hacks to
   support both variants.

llvm-svn: 76350
 2009-07-19 00:26:46 +00:00
Daniel Dunbar
aca95eac72 Add dependencies from TargetInfo onto .td generation. 
- Shouldn't really be necessary, but currently .inc files get included into
   some main target headers.

llvm-svn: 76349
 2009-07-19 00:21:12 +00:00
Bruno Cardoso Lopes
84568ea6f1 Use R_X86_64_32S to handle Jump Table Index relocation entries. Hide TAI usage inside getSection* functions 
llvm-svn: 76347
 2009-07-18 23:24:01 +00:00
Daniel Dunbar
cf7334116f Add some missing includes. 
llvm-svn: 76346
 2009-07-18 23:22:46 +00:00
Daniel Dunbar
960ef321ca Put Target definitions inside Target specific header, and llvm namespace. 
llvm-svn: 76344
 2009-07-18 23:03:22 +00:00
Bruno Cardoso Lopes
fc0fe7ea20 Use a better name for the label relocations while emitting them for Jump Tables 
llvm-svn: 76334
 2009-07-18 20:52:11 +00:00
Bruno Cardoso Lopes
d5eafae1fd Add support to properly reference private symbols on relocation entries. 
Use proper relocation type to build relocations for JumpTables (rodata
sections).

llvm-svn: 76326
 2009-07-18 19:30:09 +00:00
Anton Korobeynikov
d8faa95b25 Add carry producing / using versions of add / sub 
llvm-svn: 76316
 2009-07-18 14:16:06 +00:00
Anton Korobeynikov
89f45fb02c Expand frem 
llvm-svn: 76315
 2009-07-18 13:44:25 +00:00
Anton Korobeynikov
a806bf16c4 Turn abort() into unreachable 
llvm-svn: 76314
 2009-07-18 13:34:59 +00:00
Anton Korobeynikov
b3e0446dbb Turn few asserts into errors / unreachable's 
llvm-svn: 76313
 2009-07-18 13:33:17 +00:00
Anton Korobeynikov
a7b22f8483 Handle vector returns 
llvm-svn: 76312
 2009-07-18 12:51:06 +00:00
Anton Korobeynikov
ff561b2308 Provide expansion for ct* intrinsics 
llvm-svn: 76311
 2009-07-18 12:26:13 +00:00
Anton Korobeynikov
f31ebc380b Expand sext_inreg for i1 
llvm-svn: 76310
 2009-07-18 12:20:36 +00:00
Evan Cheng
84f06f0ee6 Enable cross register class coalescing. 
llvm-svn: 76281
 2009-07-18 02:10:10 +00:00
Evan Cheng
fe529a2c29 Revert 76177 for now. It's messing up ARM asm printing. Also this significant debate about its efficiency. 
llvm-svn: 76279
 2009-07-18 01:43:53 +00:00
Evan Cheng
67ccedff04 Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense. 
llvm-svn: 76248
 2009-07-17 22:13:25 +00:00
Chris Lattner
ffe0c407be Untangle a snarl that I discovered when updating the mangler, 
starting in getCurrentFunctionEHName.  Among other problems,
we would try to privative a "foo.eh" label, but end up emitting
the label as _Lfoo.eh instead of L_foo.eh on darwin.  This is really
bad, and the linker has always tolerated these labels existing.
For now, just emit them as _foo.eh.

This patch also fixes problems with ".eh" labels on unnamed
functions and eliminates two strangely defined TargetAsmInfo
hooks.

llvm-svn: 76231
 2009-07-17 20:46:40 +00:00
Daniel Dunbar
de011196a4 Sketch support for target specific assembly parser. 
- Not fully enabled yet, need a configure regeneration.

llvm-svn: 76230
 2009-07-17 20:42:00 +00:00
Daniel Dunbar
cff1fabab5 Start generating AsmMatcher.inc for X86. 
llvm-svn: 76213
 2009-07-17 18:55:26 +00:00
Jeffrey Yasskin
1669f312b5 r76102 added the MachineCodeEmitter::processDebugLoc call and called it from 
the X86 Emitter.  This patch extends that to the rest of the targets that can
write to a MachineCodeEmitter: ARM, Alpha, and PPC.

llvm-svn: 76211
 2009-07-17 18:49:39 +00:00
Anton Korobeynikov
fbac44c040 Add missed return 
llvm-svn: 76209
 2009-07-17 18:28:59 +00:00
David Greene
70e8a51127 Add logic to align instruction operands to columns for pretty-printing. 
No target uses this currently.  This patch only adds the mechanism so
that local installations can choose to enable this.

llvm-svn: 76177
 2009-07-17 14:24:46 +00:00
Duncan Sands
d1b273609e Avoid a compiler warning when assertions are turned off. 
llvm-svn: 76176
 2009-07-17 12:25:14 +00:00
Eli Friedman
6e61f56a5c Oops, accidentally set a legal operation to expand. 
llvm-svn: 76165
 2009-07-17 07:34:23 +00:00
Eli Friedman
b946eb988f Expand misc operations from test/CodeGen/Generic. 
llvm-svn: 76163
 2009-07-17 07:28:06 +00:00
Eli Friedman
93d9c9f85f Handle void in XCoreTargetLowering::isLegalAddressingMode. Triggers in 
test/CodeGen/Generic.

llvm-svn: 76162
 2009-07-17 07:16:38 +00:00
Eli Friedman
7c72917709 Remove some unnecessary expansion markings. Add a few expansion 
markings that show up in test/CodeGen/Generic.

llvm-svn: 76160
 2009-07-17 07:03:00 +00:00
Eli Friedman
98a65107b3 Add operation expansion/promotion for a bunch of operations, many of 
which show up in test/CodeGen/Generic.

llvm-svn: 76158
 2009-07-17 06:36:24 +00:00
Evan Cheng
490d2cc5a4 Fix tSUBspi operand definition. It reads and writes sp, which is a high register. 
llvm-svn: 76155
 2009-07-17 05:43:12 +00:00
Eli Friedman
12bf15280b Set an operation expansion, noticed while running 
llc over test/CodeGen/Generic with -march=alpha.

llvm-svn: 76154
 2009-07-17 05:23:03 +00:00
Eli Friedman
6be9680238 One more operation expansion for MIPS, from test/CodeGen/Generic. 
llvm-svn: 76149
 2009-07-17 04:07:24 +00:00
Daniel Dunbar
f988544dcf Make sure CWriter's Context get's initialized. 
llvm-svn: 76147
 2009-07-17 03:43:21 +00:00
Eli Friedman
48510f16fb Expand a bunch of illegal operations on MIPS (found by 
inspection and running over CodeGen/Generic).

llvm-svn: 76146
 2009-07-17 02:28:12 +00:00
Daniel Dunbar
fd7e588f92 Fix 'may be used uninitialized' warning. 
- Anton, please review.

llvm-svn: 76144
 2009-07-17 02:19:26 +00:00
Anton Korobeynikov
dc39f4fff8 Emit cross regclass register moves for thumb2. 
Minor code duplication cleanup.

llvm-svn: 76124
 2009-07-16 23:26:06 +00:00
Evan Cheng
e9dc6cf3b1 GV with ghost linkage (module being lazily streamed in in JIT lazy compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll. 
llvm-svn: 76121
 2009-07-16 22:53:10 +00:00
Jakob Stoklund Olesen
c438f0ecfa Silence warning in Linux builds: 
X86InstrInfo.cpp:2272: warning: suggest explicit braces to avoid ambiguous 'else'

llvm-svn: 76105
 2009-07-16 21:24:13 +00:00
Jeffrey Yasskin
a4b7ea7485 Add line numbers to OProfile. To do this, I added a processDebugLoc() 
call to the MachineCodeEmitter interface and made copying the start
line of a function not conditional on whether we're emitting Dwarf
debug information. I'll propagate the processDebugLoc() calls to the
non-X86 targets in a followup patch.

In the long run, it'll probably be better to gather this information
through the DwarfWriter, but the DwarfWriter currently depends on the
AsmPrinter and TargetAsmInfo, and fixing that would be out of the way
for this patch.

There's a bug in OProfile 0.9.4 that makes it ignore line numbers for
addresses above 4G, and a patch fixing it at
http://thread.gmane.org/gmane.linux.oprofile/7634

Sample output:

$ sudo opcontrol --reset; sudo opcontrol --start-daemon; sudo opcontrol --start; `pwd`/Debug/bin/lli fib.bc; sudo opcontrol --stop
Signalling daemon... done
Profiler running.
fib(40) == 165580141
Stopping profiling.

$ opreport -g -d -l `pwd`/Debug/bin/lli|head -60
Overflow stats not available
CPU: Core 2, speed 1998 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000
vma      samples  %        linenr info                 image name               symbol name
00007f67a30370b0 25489    61.2554  fib.c:24                    10946.jo                 fib_left
  00007f67a30370b0 1634      6.4106  fib.c:24
  00007f67a30370b1 83        0.3256  fib.c:24
  00007f67a30370b9 1997      7.8348  fib.c:24
  00007f67a30370c6 2080      8.1604  fib.c:27
  00007f67a30370c8 988       3.8762  fib.c:27
  00007f67a30370cd 1315      5.1591  fib.c:27
  00007f67a30370cf 251       0.9847  fib.c:27
  00007f67a30370d3 1191      4.6726  fib.c:27
  00007f67a30370d6 975       3.8252  fib.c:27
  00007f67a30370db 1010      3.9625  fib.c:27
  00007f67a30370dd 242       0.9494  fib.c:27
  00007f67a30370e1 2782     10.9145  fib.c:28
  00007f67a30370e5 3768     14.7828  fib.c:28
  00007f67a30370eb 615       2.4128  (no location information)
  00007f67a30370f3 6558     25.7287  (no location information)
00007f67a3037100 15603    37.4973  fib.c:29                    10946.jo                 fib_right
  00007f67a3037100 1646     10.5493  fib.c:29
  00007f67a3037101 45        0.2884  fib.c:29
  00007f67a3037109 2372     15.2022  fib.c:29
  00007f67a3037116 2234     14.3178  fib.c:32
  00007f67a3037118 612       3.9223  fib.c:32
  00007f67a303711d 622       3.9864  fib.c:32
  00007f67a303711f 385       2.4675  fib.c:32
  00007f67a3037123 404       2.5892  fib.c:32
  00007f67a3037126 634       4.0633  fib.c:32
  00007f67a303712b 870       5.5759  fib.c:32
  00007f67a303712d 62        0.3974  fib.c:32
  00007f67a3037131 1848     11.8439  fib.c:33
  00007f67a3037135 2840     18.2016  fib.c:33
  00007f67a303713a 1         0.0064  fib.c:33
  00007f67a303713b 1023      6.5564  (no location information)
  00007f67a3037143 5         0.0320  (no location information)
000000000080c1e4 15        0.0360  MachineOperand.h:150        lli                      llvm::MachineOperand::isReg() const
  000000000080c1e4 6        40.0000  MachineOperand.h:150
  000000000080c1ec 2        13.3333  MachineOperand.h:150
...

llvm-svn: 76102
 2009-07-16 21:07:26 +00:00
Evan Cheng
39e5f6205a With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction. 
llvm-svn: 76094
 2009-07-16 18:44:05 +00:00
Anton Korobeynikov
c66cf22284 Unbreak 
llvm-svn: 76064
 2009-07-16 14:36:52 +00:00
Anton Korobeynikov
3e8bb65ec8 Temporary disable 16 bit bswap 
llvm-svn: 76063
 2009-07-16 14:35:57 +00:00
Anton Korobeynikov
94e21c8740 Add instruction formats and few opcodes 
llvm-svn: 76062
 2009-07-16 14:35:20 +00:00
Anton Korobeynikov
e11a89ba74 Add bswap patterns 
llvm-svn: 76061
 2009-07-16 14:34:52 +00:00
Anton Korobeynikov
6c622a4547 Provide crazy pseudos for regpairs spills / reloads 
llvm-svn: 76060
 2009-07-16 14:34:15 +00:00
Anton Korobeynikov
c5e948c021 Handle long-disp stuff more consistently 
llvm-svn: 76059
 2009-07-16 14:33:52 +00:00
Anton Korobeynikov
d9c48cfd00 All FP instructions have 12 bit memory displacement field 
llvm-svn: 76058
 2009-07-16 14:33:27 +00:00
Anton Korobeynikov
e1bf81893d Another predicate routine 
llvm-svn: 76057
 2009-07-16 14:33:01 +00:00
Anton Korobeynikov
605ebc2c3c More helpers 
llvm-svn: 76056
 2009-07-16 14:32:41 +00:00
Anton Korobeynikov
014ce79e73 Add bunch of branch folding stuff 
llvm-svn: 76055
 2009-07-16 14:32:19 +00:00
Anton Korobeynikov
918a93419c Add missed opcodes to short => long displacement conversion 
llvm-svn: 76054
 2009-07-16 14:31:52 +00:00
Anton Korobeynikov
08d9f6b882 Cleanup 
llvm-svn: 76053
 2009-07-16 14:31:32 +00:00
Anton Korobeynikov
94f250ff30 Fix logic inversion for RI-mode address selection 
llvm-svn: 76052
 2009-07-16 14:31:14 +00:00
Anton Korobeynikov
373515d99e Expand 32-bit bitconverts via memory 
llvm-svn: 76050
 2009-07-16 14:30:29 +00:00
Anton Korobeynikov
080bdae588 Fix incomin arg stack frame offset in case we need to generate stack frame 
llvm-svn: 76049
 2009-07-16 14:29:57 +00:00
Anton Korobeynikov
c84e2bb30e Fix instruction mnemonics for some fp_to_sint operations 
llvm-svn: 76048
 2009-07-16 14:29:26 +00:00
Anton Korobeynikov
74497b2190 i32 values are passed extended also on stack. Handle this in generic way 
llvm-svn: 76047
 2009-07-16 14:29:05 +00:00
Anton Korobeynikov
319dc4e8d3 We definitely have 1-0 bools 
llvm-svn: 76046
 2009-07-16 14:28:46 +00:00
Anton Korobeynikov
2e8f54d16d Revert the commit, it just hides the real bug 
llvm-svn: 76045
 2009-07-16 14:28:26 +00:00
Anton Korobeynikov
0276bc9176 Out GR128 regclass is not a 'real' i128 one. 
llvm-svn: 76044
 2009-07-16 14:27:53 +00:00
Anton Korobeynikov
690fef7849 Add missed condbranch opcodes 
llvm-svn: 76043
 2009-07-16 14:27:26 +00:00
Anton Korobeynikov
4181716247 Handle bitconverts 
llvm-svn: 76042
 2009-07-16 14:27:01 +00:00
Anton Korobeynikov
60427c0b64 Unbreak mvi and friends - emit only 'significant' part of the operand 
llvm-svn: 76041
 2009-07-16 14:26:38 +00:00
Anton Korobeynikov
ff6d84fd85 Expand fp_to_uint too 
llvm-svn: 76040
 2009-07-16 14:26:06 +00:00
Anton Korobeynikov
da480ca78d We don't have FP truncstores 
llvm-svn: 76039
 2009-07-16 14:25:46 +00:00
Anton Korobeynikov
7ea47e70b3 Expand uint_to_fp 
llvm-svn: 76038
 2009-07-16 14:25:30 +00:00
Anton Korobeynikov
117e7a7179 Emit proper rounding mode for fp_to_sint 
llvm-svn: 76037
 2009-07-16 14:25:12 +00:00
Anton Korobeynikov
61bf5c13c4 f32/f64 regs are stored on stack if we're short in FP regs 
llvm-svn: 76036
 2009-07-16 14:24:57 +00:00
Anton Korobeynikov
bbf0fe2a76 Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects 
llvm-svn: 76035
 2009-07-16 14:24:41 +00:00
Anton Korobeynikov
886e977c69 Make FP zero to be legal FP immediate via LOAD ZERO 
llvm-svn: 76034
 2009-07-16 14:24:16 +00:00
Anton Korobeynikov
2474b40557 Loads are not two-address in any way 
llvm-svn: 76033
 2009-07-16 14:24:01 +00:00
Anton Korobeynikov
e45c7cb554 Add LOAD NEGATIVE instruction 
llvm-svn: 76032
 2009-07-16 14:23:44 +00:00
Anton Korobeynikov
d12e7875c9 LOAD COMPLEMENT instruction is not really two-addr 
llvm-svn: 76031
 2009-07-16 14:23:30 +00:00
Anton Korobeynikov
f8ac41d531 Add multiple add/sub instructions 
llvm-svn: 76030
 2009-07-16 14:23:16 +00:00
Anton Korobeynikov
df2f045667 Handle FP callee-saved regs 
llvm-svn: 76029
 2009-07-16 14:23:01 +00:00
Anton Korobeynikov
b90a38d00d Proper FP extloads 
llvm-svn: 76028
 2009-07-16 14:22:46 +00:00
Anton Korobeynikov
940ec5955b Add proper PWS impdef's 
llvm-svn: 76027
 2009-07-16 14:22:30 +00:00
Anton Korobeynikov
3f37f337be Propagate FP select_cc to dag inserters 
llvm-svn: 76026
 2009-07-16 14:22:15 +00:00
Anton Korobeynikov
dc167c2eec Implement fp_to_sint 
llvm-svn: 76025
 2009-07-16 14:21:57 +00:00
Anton Korobeynikov
e372330133 Implement FP regs spills / restores 
llvm-svn: 76024
 2009-07-16 14:21:41 +00:00
Anton Korobeynikov
0c3534b070 Add fabs 
llvm-svn: 76023
 2009-07-16 14:21:27 +00:00
Anton Korobeynikov
fc1f449073 Add fneg 
llvm-svn: 76022
 2009-07-16 14:21:12 +00:00
Anton Korobeynikov
a73f3ffb1f We don't have native sine / cosine instructions 
llvm-svn: 76021
 2009-07-16 14:20:56 +00:00
Anton Korobeynikov
d2feb0d2e4 More sint_to_fp stuff 
llvm-svn: 76020
 2009-07-16 14:20:39 +00:00
Anton Korobeynikov
23615e0340 Add bunch of FP instructions 
llvm-svn: 76019
 2009-07-16 14:20:24 +00:00
Anton Korobeynikov
32c9954322 We don't have any FP extloads 
llvm-svn: 76018
 2009-07-16 14:20:08 +00:00
Anton Korobeynikov
643215b0d7 Implement all comparisons 
llvm-svn: 76017
 2009-07-16 14:19:54 +00:00
Anton Korobeynikov
488f8c2fd1 Add constpool lowering / printing 
llvm-svn: 76016
 2009-07-16 14:19:35 +00:00
Anton Korobeynikov
4dbabbe3cf Allow FP arguments pass / return 
llvm-svn: 76015
 2009-07-16 14:19:16 +00:00
Anton Korobeynikov
d4e7c7a373 Register FP regclasses 
llvm-svn: 76014
 2009-07-16 14:19:02 +00:00
Anton Korobeynikov
2ccdd0fd2b Add FP regs 
llvm-svn: 76013
 2009-07-16 14:18:48 +00:00
Anton Korobeynikov
d8ced10967 Fix fallout from prev. patch 
llvm-svn: 76012
 2009-07-16 14:18:31 +00:00
Anton Korobeynikov
3e670f38f9 Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems 
llvm-svn: 76011
 2009-07-16 14:18:17 +00:00
Anton Korobeynikov
bf722c6946 Use divide single for 32 bit signed divides 
llvm-svn: 76010
 2009-07-16 14:17:52 +00:00
Anton Korobeynikov
785f486b30 Add missed operands types 
llvm-svn: 76009
 2009-07-16 14:17:07 +00:00
Anton Korobeynikov
41d3ac1720 Missed part of prev. patch 
llvm-svn: 76008
 2009-07-16 14:16:45 +00:00
Anton Korobeynikov
7cf7a634df Another attempt to fix prologue emission 
llvm-svn: 76007
 2009-07-16 14:16:26 +00:00
Anton Korobeynikov
b3af53a626 Implement 'large' PIC model 
llvm-svn: 76006
 2009-07-16 14:16:05 +00:00
Anton Korobeynikov
2889a28adb Implement shifts properly (hopefilly - finally!) 
llvm-svn: 76005
 2009-07-16 14:15:24 +00:00
Anton Korobeynikov
6ff1411adf Remove redundand register move 
llvm-svn: 76004
 2009-07-16 14:14:54 +00:00
Anton Korobeynikov
f48e88136e Properly handle divides. As a bonus - implement memory versions of them. 
llvm-svn: 76003
 2009-07-16 14:14:33 +00:00
Anton Korobeynikov
3434b05a2c Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford 
llvm-svn: 76002
 2009-07-16 14:14:01 +00:00
Anton Korobeynikov
ca4d4129c6 32 bit rotate is not twoaddr instruction 
llvm-svn: 76001
 2009-07-16 14:13:43 +00:00
Anton Korobeynikov
e6b7c15a63 32 bit shifts have only 12 bit displacements 
llvm-svn: 76000
 2009-07-16 14:13:24 +00:00
Anton Korobeynikov
cffc479110 Add proper register aliases 
llvm-svn: 75999
 2009-07-16 14:12:54 +00:00
Anton Korobeynikov
2954802d28 Properly generate stack frame 
llvm-svn: 75998
 2009-07-16 14:12:36 +00:00
Anton Korobeynikov
0e3d764cc1 Unbreak indirect branches 
llvm-svn: 75997
 2009-07-16 14:12:18 +00:00
Anton Korobeynikov
07380f3ab0 Unbreak 
llvm-svn: 75996
 2009-07-16 14:12:00 +00:00
Anton Korobeynikov
1764c55d85 Do not forget to save R15 when we allocate stack frame 
llvm-svn: 75995
 2009-07-16 14:11:40 +00:00
Anton Korobeynikov
31bef4e21c All calls clobbers R14 
llvm-svn: 75994
 2009-07-16 14:11:22 +00:00
Anton Korobeynikov
a04cb342a7 Unbreak calls to vararg functions 
llvm-svn: 75993
 2009-07-16 14:11:03 +00:00
Anton Korobeynikov
decd66501b Stupid typo 
llvm-svn: 75992
 2009-07-16 14:10:49 +00:00
Anton Korobeynikov
6d0c8510ab Typos 
llvm-svn: 75991
 2009-07-16 14:10:35 +00:00
Anton Korobeynikov
6c1091e7f3 Consolidate reg-imm / reg-reg-imm address mode selection logic in one place. 
llvm-svn: 75990
 2009-07-16 14:10:17 +00:00
Anton Korobeynikov
292a84921d Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes. 
llvm-svn: 75989
 2009-07-16 14:09:56 +00:00
Anton Korobeynikov
9a1ad49207 Add support for 12 bit displacements 
llvm-svn: 75988
 2009-07-16 14:09:35 +00:00
Anton Korobeynikov
c2ec4e23f6 We already have reserved call frame regardless whether variable sized frame objects were present or not 
llvm-svn: 75987
 2009-07-16 14:09:04 +00:00
Anton Korobeynikov
a809635fc8 Emit proper lowering of load from arg stack slot 
llvm-svn: 75986
 2009-07-16 14:08:42 +00:00
Anton Korobeynikov
9013a1ee39 Implement dynamic allocas 
llvm-svn: 75985
 2009-07-16 14:08:15 +00:00
Anton Korobeynikov
ee8ce5b760 Add jump tables 
llvm-svn: 75984
 2009-07-16 14:07:50 +00:00
Anton Korobeynikov
cb3ee3ee90 Exapnd br_jt into indirect branch. Provide pattern for indirect branches. 
llvm-svn: 75983
 2009-07-16 14:07:24 +00:00
Anton Korobeynikov
21e498ac1c Implement 64 bit immediates 
llvm-svn: 75982
 2009-07-16 14:07:06 +00:00
Anton Korobeynikov
ab90a05ff3 Add rotates 
llvm-svn: 75981
 2009-07-16 14:06:49 +00:00
Anton Korobeynikov
ff5b07e994 Add patterns for integer negate 
llvm-svn: 75980
 2009-07-16 14:06:27 +00:00
Anton Korobeynikov
335aeecedc Provide proper patterns for and with imm instructions. Tune the tests accordingly. 
llvm-svn: 75979
 2009-07-16 14:06:00 +00:00
Anton Korobeynikov
49d065e9c9 Add 32 bit and reg-imm and disable invalid patterns for now 
llvm-svn: 75978
 2009-07-16 14:05:32 +00:00
Anton Korobeynikov
c9778b81c9 Add z9 and z10 target processors. Mark z10-only instructions as such. 
llvm-svn: 75977
 2009-07-16 14:05:00 +00:00
Anton Korobeynikov
0cc45f7a03 Fix MUL64rm instruction asmprinting 
llvm-svn: 75976
 2009-07-16 14:04:38 +00:00
Anton Korobeynikov
34fae672be Preliminary asmprinting of globals 
llvm-svn: 75975
 2009-07-16 14:04:22 +00:00
Anton Korobeynikov
2fb805526a Implement asmprinting for odd-even regpairs 
llvm-svn: 75974
 2009-07-16 14:04:01 +00:00
Anton Korobeynikov
0fd61ed25a 32-bit ri addressing mode has only 12-bit displacement 
llvm-svn: 75973
 2009-07-16 14:03:41 +00:00
Anton Korobeynikov
77a5da3f8f Forgot to add 
llvm-svn: 75972
 2009-07-16 14:03:24 +00:00
Anton Korobeynikov
c17d827f85 Do not put bunch of target-specific stuff into common namespace 
llvm-svn: 75971
 2009-07-16 14:03:08 +00:00
Anton Korobeynikov
0be41e9cc1 Print signed imms properly 
llvm-svn: 75970
 2009-07-16 14:02:45 +00:00
Anton Korobeynikov
9ddb4978ed Provide hooks for spilling / restoring stuff 
llvm-svn: 75969
 2009-07-16 14:01:27 +00:00
Anton Korobeynikov
7d9fd11d73 Revert thinko 
llvm-svn: 75968
 2009-07-16 14:01:10 +00:00
Anton Korobeynikov
2bdca8fa4c Temporary workaround problem with signed 32-bit imm's 
llvm-svn: 75967
 2009-07-16 14:00:42 +00:00
Anton Korobeynikov
0ed25fd249 Implement InsertBranch() hook 
llvm-svn: 75966
 2009-07-16 14:00:10 +00:00
Anton Korobeynikov
484e1956df Pipehole pattern for i32 imm's 
llvm-svn: 75965
 2009-07-16 13:59:49 +00:00
Anton Korobeynikov
dfc4f762b3 Bunch of sext_inreg patterns 
llvm-svn: 75964
 2009-07-16 13:59:18 +00:00
Anton Korobeynikov
1030c0611e Provide normal 32 bit load and store 
llvm-svn: 75963
 2009-07-16 13:58:43 +00:00
Anton Korobeynikov
1e1f1a789b Proper lower 'small' results 
llvm-svn: 75962
 2009-07-16 13:58:24 +00:00
Anton Korobeynikov
db9fb21b48 Completel forgot about unconditional branches 
llvm-svn: 75961
 2009-07-16 13:57:52 +00:00
Anton Korobeynikov
ce2b70586e Lower addresses of globals 
llvm-svn: 75960
 2009-07-16 13:57:27 +00:00
Anton Korobeynikov
d984dc6c9d Provide "wide" muls and divs/rems 
llvm-svn: 75958
 2009-07-16 13:56:42 +00:00
Anton Korobeynikov
6ad41d1540 Fix thinko 
llvm-svn: 75957
 2009-07-16 13:56:11 +00:00
Anton Korobeynikov
72a2743b16 Fix epic bug with invalid regclass for R0D 
llvm-svn: 75956
 2009-07-16 13:55:51 +00:00
Anton Korobeynikov
c4e9f407ae More register pairs (now 32 bit ones) 
llvm-svn: 75954
 2009-07-16 13:55:04 +00:00
Anton Korobeynikov
ffea8dd106 Add even-odd register pairs 
llvm-svn: 75953
 2009-07-16 13:54:45 +00:00
Anton Korobeynikov
6a90c957dd Unbreak due to mainline api change 
llvm-svn: 75952
 2009-07-16 13:54:20 +00:00
Anton Korobeynikov
c42f164135 Preliminary mul lowering 
llvm-svn: 75951
 2009-07-16 13:53:55 +00:00
Anton Korobeynikov
f93f6b0ed3 More extloads 
llvm-svn: 75950
 2009-07-16 13:53:35 +00:00
Anton Korobeynikov
e26fb377c5 SELECT_CC lowering 
llvm-svn: 75948
 2009-07-16 13:52:51 +00:00
Anton Korobeynikov
769a8c2312 Conditional branches and comparisons 
llvm-svn: 75947
 2009-07-16 13:52:31 +00:00
Anton Korobeynikov
3df5bd3b40 Emit correct offset for PseudoSourceValue 
llvm-svn: 75946
 2009-07-16 13:52:10 +00:00
Anton Korobeynikov
57bf9a3426 Provide proper stack offsets for outgoing arguments 
llvm-svn: 75945
 2009-07-16 13:51:53 +00:00
Anton Korobeynikov
4906b76843 Change register allocation order to reduce amount of callee-saved regs to be spilled. 
llvm-svn: 75944
 2009-07-16 13:51:34 +00:00
Anton Korobeynikov
b4a6f3c467 Emit callee-saved regs spills / restores 
llvm-svn: 75943
 2009-07-16 13:51:12 +00:00
Anton Korobeynikov
4fcadd1a7d Some preliminary call lowering 
llvm-svn: 75941
 2009-07-16 13:50:21 +00:00
Anton Korobeynikov
f4257ba74e Prologue / epilogue emission 
llvm-svn: 75940
 2009-07-16 13:49:49 +00:00
Anton Korobeynikov
dd60515f11 Add simple frame index elimination 
llvm-svn: 75939
 2009-07-16 13:49:25 +00:00
Anton Korobeynikov
6d15e5c657 Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common 
llvm-svn: 75937
 2009-07-16 13:48:42 +00:00
Anton Korobeynikov
c0374ea3e6 Do not truncate sign bits for negative imms 
llvm-svn: 75936
 2009-07-16 13:48:23 +00:00
Anton Korobeynikov
5e1fa67a23 Add address computation stuff 
llvm-svn: 75935
 2009-07-16 13:47:59 +00:00
Anton Korobeynikov
4409d9a464 Cleanup 
llvm-svn: 75934
 2009-07-16 13:47:36 +00:00
Anton Korobeynikov
47c086cc6b Add mem-imm stores 
llvm-svn: 75933
 2009-07-16 13:47:14 +00:00
Anton Korobeynikov
370d19266f [PATCH 023/155] Typo 
llvm-svn: 75932
 2009-07-16 13:45:22 +00:00
Anton Korobeynikov
b88da5c190 Add stores and truncstores 
llvm-svn: 75931
 2009-07-16 13:45:00 +00:00
Anton Korobeynikov
b262cec2d0 Add patterns for various extloads 
llvm-svn: 75930
 2009-07-16 13:44:30 +00:00
Anton Korobeynikov
58f9ca9055 Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though. 
llvm-svn: 75929
 2009-07-16 13:44:00 +00:00
Anton Korobeynikov
ba9ee88377 Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy. 
llvm-svn: 75928
 2009-07-16 13:43:40 +00:00
Anton Korobeynikov
f080a4a0bd Add shifts and reg-imm address matching 
llvm-svn: 75927
 2009-07-16 13:43:18 +00:00
Anton Korobeynikov
de69aad588 Add bunch of 32-bit patterns... Uffff :) 
llvm-svn: 75926
 2009-07-16 13:42:31 +00:00
Anton Korobeynikov
b902c71a90 Add 32 bit subregs 
llvm-svn: 75923
 2009-07-16 13:35:30 +00:00
Anton Korobeynikov
2f5b711ced Add another bunch of reg-imm patterns for add/or/and/xor 
llvm-svn: 75922
 2009-07-16 13:35:08 +00:00
Anton Korobeynikov
f63382b52b Add bunch of reg-imm movs 
llvm-svn: 75921
 2009-07-16 13:34:50 +00:00
Anton Korobeynikov
349c4f3410 Proper match halfword-imm operands for mov and add 
llvm-svn: 75920
 2009-07-16 13:34:24 +00:00
Anton Korobeynikov
dcc7d19ef3 Provide masked reg-imm 'or' and 'and' 
llvm-svn: 75919
 2009-07-16 13:33:57 +00:00
Anton Korobeynikov
c98835c743 Add reg-reg and pattern 
llvm-svn: 75917
 2009-07-16 13:32:49 +00:00
Anton Korobeynikov
2688d3c0a7 Add sub reg-reg pattern 
llvm-svn: 75916
 2009-07-16 13:32:16 +00:00
Anton Korobeynikov
2dd607fca7 Add xor reg-reg pattern 
llvm-svn: 75915
 2009-07-16 13:31:28 +00:00
Anton Korobeynikov
66b2612946 Add or reg-reg pattern. 
llvm-svn: 75914
 2009-07-16 13:30:53 +00:00
Anton Korobeynikov
ca9c5365ac Add add reg-reg and reg-imm patterns 
llvm-svn: 75913
 2009-07-16 13:30:15 +00:00
Anton Korobeynikov
7b8aec2c40 Add simple reg-reg and reg-imm moves 
llvm-svn: 75912
 2009-07-16 13:29:38 +00:00
Anton Korobeynikov
7fe1d9c90e Minimal lowering for formal_arguments / ret 
llvm-svn: 75911
 2009-07-16 13:28:59 +00:00
Anton Korobeynikov
8155f0cbaa Let's start another backend :) 
llvm-svn: 75909
 2009-07-16 13:27:25 +00:00
Richard Osborne
ee0ad3d09b Combine an unaligned store of unaligned load into a memmove. 
llvm-svn: 75908
 2009-07-16 12:50:48 +00:00
Richard Osborne
764d765724 Lower the threshold at which memcpy / memmove / memset stop being expanded 
inline in the XCore.

llvm-svn: 75906
 2009-07-16 12:41:34 +00:00
Richard Osborne
858b52a587 Fix typo in last commit on expansion of unaligned loads. 
llvm-svn: 75903
 2009-07-16 10:48:47 +00:00
Richard Osborne
0d65748f8f Expand unaligned 32 bit loads from an address which is a constant 
offset from a 32 bit aligned base as follows:

  ldw low, base[offset >> 2]
  ldw high, base[(offset >> 2) + 1]
  shr low_shifted, low, (offset & 0x3) * 8
  shl high_shifted, high, 32 - (offset & 0x3) * 8
  or result, low_shifted, high_shifted

Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.

llvm-svn: 75902
 2009-07-16 10:42:35 +00:00
Richard Osborne
eb8036be44 Custom lower unaligned 32 bit stores and loads into libcalls. This is 
a big code size win since before they were expanding to upto 16
instructions.

llvm-svn: 75901
 2009-07-16 10:21:18 +00:00
Evan Cheng
7a6b20df7f Let callers decide the sub-register index on the def operand of rematerialized instructions. 
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.

llvm-svn: 75900
 2009-07-16 09:20:10 +00:00
Chris Lattner
e12dcd84ca use SUBREG_TO_REG instead of INSERT_SUBREG, this way the code 
generator can know the top bits are zero, not undefined.
Thanks to Dan for pointing this out.

llvm-svn: 75899
 2009-07-16 06:31:37 +00:00
Chris Lattner
65f6bc8631 fix some casts that I improperly refactored, patch by Artur Pietrek! 
llvm-svn: 75894
 2009-07-16 04:34:33 +00:00
Daniel Dunbar
90536f6737 Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink 
variables.
 - Module initialization functions supplanted the need for these.

llvm-svn: 75886
 2009-07-16 01:55:13 +00:00
Chris Lattner
e102784018 fix section switching to ensure that stubs are emitted to the right 
section on ppc.

llvm-svn: 75881
 2009-07-16 01:23:26 +00:00
Daniel Dunbar
4771afe104 Lift addAssemblyEmitter into LLVMTargetMachine. 
- No functionality change.

llvm-svn: 75859
 2009-07-15 23:34:19 +00:00
Daniel Dunbar
efb868a754 Register AsmPrinter for XCore, MSP430, and PIC16 targets. 
- Switch to standard addAssemblyEmitter logic.

llvm-svn: 75854
 2009-07-15 23:17:20 +00:00
Daniel Dunbar
d85e8b6334 Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine. 
- No intended functionality change.

llvm-svn: 75848
 2009-07-15 22:33:19 +00:00
Daniel Dunbar
3cff9fe21d Remove old style hacks to register AsmPrinter into TargetMachine. 
- No intended functionality change.

llvm-svn: 75843
 2009-07-15 22:01:32 +00:00
Owen Anderson
13080d27c5 Move a few more convenience factory functions from Constant to LLVMContext. 
llvm-svn: 75840
 2009-07-15 21:51:10 +00:00
Chris Lattner
52395de322 move createAlphaLLRPPass out of addAssemblyEmitter to make Alpha 
more like other targets.

llvm-svn: 75839
 2009-07-15 21:40:24 +00:00
Ted Kremenek
1ebb7e72fa Lexically order files in CMakeLists.txt files. 
llvm-svn: 75831
 2009-07-15 21:08:16 +00:00
Daniel Dunbar
07f75f2e42 Remove unused function. 
llvm-svn: 75829
 2009-07-15 20:59:20 +00:00
Bruno Cardoso Lopes
7bdb20f6a2 use std::vector instead of std::list for both Section and Symbol lists because 
we care more about random access than insertion/deletion of elements.

llvm-svn: 75828
 2009-07-15 20:49:10 +00:00
Daniel Dunbar
7d22e66153 Update CMakeLists for reapplication. 
llvm-svn: 75825
 2009-07-15 20:34:36 +00:00
Daniel Dunbar
5707dd7f73 Reapply TargetRegistry refactoring commits. 
--- Reverse-merging r75799 into '.':
 U   test/Analysis/PointerTracking
U    include/llvm/Target/TargetMachineRegistry.h
U    include/llvm/Target/TargetMachine.h
U    include/llvm/Target/TargetRegistry.h
U    include/llvm/Target/TargetSelect.h
U    tools/lto/LTOCodeGenerator.cpp
U    tools/lto/LTOModule.cpp
U    tools/llc/llc.cpp
U    lib/Target/PowerPC/PPCTargetMachine.h
U    lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U    lib/Target/PowerPC/PPCTargetMachine.cpp
U    lib/Target/PowerPC/PPC.h
U    lib/Target/ARM/ARMTargetMachine.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/ARMTargetMachine.h
U    lib/Target/ARM/ARM.h
U    lib/Target/XCore/XCoreTargetMachine.cpp
U    lib/Target/XCore/XCoreTargetMachine.h
U    lib/Target/PIC16/PIC16TargetMachine.cpp
U    lib/Target/PIC16/PIC16TargetMachine.h
U    lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U    lib/Target/Alpha/AlphaTargetMachine.cpp
U    lib/Target/Alpha/AlphaTargetMachine.h
U    lib/Target/X86/X86TargetMachine.h
U    lib/Target/X86/X86.h
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.cpp
U    lib/Target/MSP430/MSP430TargetMachine.h
U    lib/Target/CppBackend/CPPTargetMachine.h
U    lib/Target/CppBackend/CPPBackend.cpp
U    lib/Target/CBackend/CTargetMachine.h
U    lib/Target/CBackend/CBackend.cpp
U    lib/Target/TargetMachine.cpp
U    lib/Target/IA64/IA64TargetMachine.cpp
U    lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U    lib/Target/IA64/IA64TargetMachine.h
U    lib/Target/IA64/IA64.h
U    lib/Target/MSIL/MSILWriter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.h
U    lib/Target/CellSPU/SPU.h
U    lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U    lib/Target/CellSPU/SPUTargetMachine.cpp
U    lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U    lib/Target/Mips/MipsTargetMachine.cpp
U    lib/Target/Mips/MipsTargetMachine.h
U    lib/Target/Mips/Mips.h
U    lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U    lib/Target/Sparc/SparcTargetMachine.cpp
U    lib/Target/Sparc/SparcTargetMachine.h
U    lib/ExecutionEngine/JIT/TargetSelect.cpp
U    lib/Support/TargetRegistry.cpp

llvm-svn: 75820
 2009-07-15 20:24:03 +00:00
Xerxes Ranby
49ed8c04bd Fix cmake build, add TargetMachineRegistry.cpp that got restored in r75807 
llvm-svn: 75817
 2009-07-15 19:58:35 +00:00
Stuart Hastings
8a8b9b6bf9 Restore file lost during reversion. 
llvm-svn: 75807
 2009-07-15 18:30:44 +00:00
Stuart Hastings
ef732a2bea Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build. 
Will revert 75770 in the llvm-gcc trunk.

llvm-svn: 75799
 2009-07-15 17:27:11 +00:00
Richard Osborne
bdd120fbdb Fix pattern for LD16S_3r, add basic tests to check load / store instructions 
are being properly selected.

llvm-svn: 75797
 2009-07-15 17:06:59 +00:00
David Goodwin
e0552265a6 Thumb-2 only support [base_reg + offset_reg] addressing, not [base_reg - offset_reg]. 
llvm-svn: 75789
 2009-07-15 15:50:19 +00:00
Richard Osborne
589cb93199 Fix XCoreTargetLowering::isLegalAddressingMode to handle non simple VTs. 
llvm-svn: 75788
 2009-07-15 15:46:56 +00:00
Richard Osborne
f7ae8f4036 Remove the xcore-file-directive option now that LLVM has proper support for 
emitting file directives with one parameter.

llvm-svn: 75787
 2009-07-15 15:36:37 +00:00
Daniel Dunbar
23bba6d075 Replace large swaths of copy-n-paste code with obvious helper function... 
- Which was already present in the module!

 - I skipped this xform for Alpha, since it runs an extra pass during assembly
   emission, but not when emitting assembly via the DumpAsm flag.

 - No functionality change.

--
ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
  18 -      PM.add(AsmPrinterCtor(ferrs(), *this, true));
  18 -    assert(AsmPrinterCtor && "AsmPrinter was not linked in");
  18 -    if (AsmPrinterCtor)
  18 -  if (DumpAsm) {
  18 -  }
ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
  18 +    addAssemblyEmitter(PM, OptLevel, true, ferrs());
  18 +  if (DumpAsm)
--

llvm-svn: 75782
 2009-07-15 12:49:15 +00:00
Duncan Sands
765b981647 Remove StringConstantPrefix now that the only user 
(llvm-gcc) has gone.

llvm-svn: 75781
 2009-07-15 12:39:48 +00:00
Daniel Dunbar
2b67b4ab9f Kill off old (TargetMachine level, not Target level) match quality functions. 
llvm-svn: 75780
 2009-07-15 12:26:05 +00:00
Xerxes Ranby
314e5b78bd Fix cmake build lib/Target/TargetMachineRegistry.cpp removed. 
llvm-svn: 75779
 2009-07-15 12:19:36 +00:00
Daniel Dunbar
51b81c9930 Provide TargetMachine implementations with reference to Target they were created 
from.
 - This commit is almost entirely propogating the reference through the
   TargetMachine subclasses' constructor calls.

llvm-svn: 75778
 2009-07-15 12:11:05 +00:00
Daniel Dunbar
590904c36b Kill off unused TargetMachineRegistry methods and ivars. 
llvm-svn: 75774
 2009-07-15 11:48:36 +00:00
Daniel Dunbar
25ad58480b Include the Target& in the TargetMachineRegisterEntry. 
llvm-svn: 75772
 2009-07-15 11:23:49 +00:00
Daniel Dunbar
e4ac57c0d1 Switch some obvious clients to using the new TargetRegistry. 
llvm-svn: 75767
 2009-07-15 10:05:03 +00:00
Daniel Dunbar
61ce410af9 Reimplement TargetMachineRegistry in terms of TargetRegistry. 
- This is a temporary hack to aid in incremental refactoring, for now we
   allocate a new TargetMachineRegistryEntry on every getClosest... call.

 - No intended functionality change, other than the leaked memory.

llvm-svn: 75766
 2009-07-15 09:53:37 +00:00
Daniel Dunbar
a2af870bd7 Register Target's TargetMachine and AsmPrinter in the new registry. 
- This abuses TargetMachineRegistry's constructor for now, this will get
   cleaned up in time.

llvm-svn: 75762
 2009-07-15 09:22:31 +00:00
Daniel Dunbar
b70d5cdfe1 Add TargetInfo libraries for all targets. 
- Intended to match current TargetMachine implementations.

 - No facilities for linking these in yet.

llvm-svn: 75751
 2009-07-15 06:35:19 +00:00
Evan Cheng
6408cda38d Move load / store folding alignment require into the table(s). 
llvm-svn: 75749
 2009-07-15 06:10:07 +00:00
Chris Lattner
f90dad59d2 rename decorateName -> DecorateCygMingName, make it assert if not 
cygming, make the two callers only call it if cygming.  Other minor
cleanups.

llvm-svn: 75744
 2009-07-15 04:55:56 +00:00
Chris Lattner
151877b93e convert arm/darwin stubs to use the mangler to synthesize all the names instead of 
doing it with printSuffixedName.

llvm-svn: 75741
 2009-07-15 04:41:01 +00:00
Chris Lattner
499fe29f12 fix an arm codegen bug (the same as PR4482 on ppc) where available_externally 
symbols were not getting stubs.  While I'm at it, add a big testcase for
stub generation to make sure I don't break anything.

llvm-svn: 75737
 2009-07-15 04:12:33 +00:00
Chris Lattner
dd01e838c8 convert [Hidden]GVNonLazyPtrs to compute the global and stub names 
with the mangler (like x86 and ppc), instead of going through 
printSuffixedName.

llvm-svn: 75736
 2009-07-15 03:12:43 +00:00
Chris Lattner
e65cf5546b use makeNameProper to add the globalprefix instead of doing it manually. 
llvm-svn: 75734
 2009-07-15 03:01:23 +00:00
Chris Lattner
0c13774a29 get the PPC stub temporary label from the mangler instead of 
using horrible string hacking.  This gives us a different label,
but it's just an assembler temporary, so the name doesn't matter.

llvm-svn: 75733
 2009-07-15 02:56:53 +00:00
Chris Lattner
0b4dc240bd turn some if/then's into ?: 
llvm-svn: 75732
 2009-07-15 02:36:21 +00:00
Chris Lattner
34f25a514f eliminate a bunch of printSuffixedName's by using info computed from 
Mangler in FnStubs.

llvm-svn: 75731
 2009-07-15 02:33:19 +00:00
Chris Lattner
5c6ad7d426 convert FnStubs to using a more structured form, eliminating 
a couple instances of printSuffixedName (in favor of having
the mangler do stuff).

llvm-svn: 75729
 2009-07-15 02:28:57 +00:00
Chris Lattner
4fd9c770a6 actually $stub labels *are* private, I just missed that 
printSuffixedName automatically does this.

llvm-svn: 75727
 2009-07-15 01:53:36 +00:00