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Commit Graph

119636 Commits

Author SHA1 Message Date
Sanjay Patel
0d52c4ec2f fix typo; NFC
llvm-svn: 242947
2015-07-22 21:56:41 +00:00
Sanjay Patel
c70c2e75c0 fix indent; NFC
llvm-svn: 242946
2015-07-22 21:47:13 +00:00
Justin Bogner
e1590d2f22 IPO: Avoid brace initialization of a map, some versions of libc++ don't like it
Should fix the build failure on these darwin bots:

http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/12427/
http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_build/10389/

llvm-svn: 242945
2015-07-22 21:41:12 +00:00
Reid Kleckner
6a2c6313aa [lit] Fix launching executables relative to the cwd after 'cd'
This was affecting test/asan/TestCases/Windows/coverage-basic.cc in
compiler-rt. It does something like:

  cd %T/mydir
  %clang %s -o t.exe
  ./t.exe

Previously, we'd end up looking for t.exe relative to the cwd of the lit
process, not the cwd of the test.

llvm-svn: 242941
2015-07-22 21:35:27 +00:00
Bruno Cardoso Lopes
0dcfe88209 [PeepholeOptimizer] Refactor optimizeUncoalescable logic
Reapply r242294.

- Create a new CopyRewriter for Uncoalescable copy-like instructions
- Change the ValueTracker to return a ValueTrackerResult

This makes optimizeUncoalescable looks more like optimizeCoalescable and
use the CopyRewritter infrastructure.

This is also the preparation for looking up into PHI nodes in the
ValueTracker.

rdar://problem/20404526

Differential Revision: http://reviews.llvm.org/D11195

llvm-svn: 242940
2015-07-22 21:30:16 +00:00
JF Bastien
f617ddf2b8 WebAssembly: basic bitcode → assembly CodeGen test
Summary:
Add a basic CodeGen bitcode test which (for now) only prints out the function name and nothing else. The current code merely implements the basic needed for the test run to not crash / assert. Getting to that point required:

 - Basic InstPrinter.
 - Basic AsmPrinter.
 - DiagnosticInfoUnsupported (not strictly required, but nice to have, duplicated from AMDGPU/BPF's ISelLowering).
 - Some SP and register setup in WebAssemblyTargetLowering.
 - Basic LowerFormalArguments.
 - GenInstrInfo.
 - Placeholder LowerFormalArguments.
 - Placeholder CanLowerReturn and LowerReturn.
 - Basic DAGToDAGISel::Select, which requiresGenDAGISel.inc as well as GET_INSTRINFO_ENUM with GenInstrInfo.inc.
 - Remove WebAssemblyFrameLowering::determineCalleeSaves and rely on default.
 - Implement WebAssemblyFrameLowering::hasFP, same as AArch64's implementation.

Follow-up patches will implement a real AsmPrinter, which will require adding MI opcodes specific to WebAssembly.

Reviewers: sunfish

Subscribers: aemerson, jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D11369

llvm-svn: 242939
2015-07-22 21:28:15 +00:00
Alex Lorenz
9fd61458ca MIR Serialization: Serialize the machine instruction's debug location.
llvm-svn: 242938
2015-07-22 21:15:11 +00:00
Yaron Keren
5a405f083b Rename RunCallBacksToRun to llvm::sys::RunSignalHandlers
And expose it in Signals.h, allowing clients to call it directly,
possibly LLVMErrorHandler which currently calls RunInterruptHandlers
but not RunSignalHandlers, thus for example not printing the stack
backtrace on Unixish OSes. On Windows it does happen because
RunInterruptHandlers ends up calling the callbacks as well via 
Cleanup(). This difference in behaviour and code structures in
*/Signals.inc should be patched in the future.

llvm-svn: 242936
2015-07-22 21:11:17 +00:00
Anthony Pesch
7bfb3a910e Improve merging of stores from static constructors in GlobalOpt
Summary:
While working on a project I wound up generating a fairly large lookup table (10k entries) of callbacks inside of a static constructor. Clang was taking upwards of ~10 minutes to compile the lookup table. I generated a smaller test case (http://www.inolen.com/static_initializer_test.ll) that, after running with -ftime-report, pointed fingers at GlobalOpt and MemCpyOptimizer.

Running globalopt took around ~9 minutes. The slowdown came from how GlobalOpt merged stores from static constructors individually into the global initializer in EvaluateStaticConstructor. For each store it discovered and wanted to commit, it would copy the existing global initializer and then merge in the individual store. I changed this so that stores are now grouped by global, and sorted from most significant to least significant by their GEP indexes (e.g. a store to GEP 0, 0 comes before GEP 0, 0, 1). With this representation, the existing initializer can be copied and all new stores merged into it in a single pass.

With this patch and http://reviews.llvm.org/D11198, the lookup table that was taking ~10 minutes to compile now compiles in around 5 seconds. I've ran 'make check' and the test-suite, which all passed.

I'm not really sure who to tag as a reviewer, Lang mentioned that Chandler may be appropriate.

Reviewers: chandlerc, nlewycky

Subscribers: nlewycky, llvm-commits

Differential Revision: http://reviews.llvm.org/D11200

llvm-svn: 242935
2015-07-22 21:10:45 +00:00
Alex Lorenz
592bfaf056 MIR Parser: Extract the MDNode parsing code into a separate method. NFC.
This change would allow the machine instruction parser to reuse this method when
parsing the metadata node for the machine instruction's debug location property.

llvm-svn: 242934
2015-07-22 21:07:04 +00:00
Hans Wennborg
34fee45808 Fix -Wextra-semi warnings.
Patch by Eugene Zelenko!

Differential Revision: http://reviews.llvm.org/D11400

llvm-svn: 242930
2015-07-22 20:46:11 +00:00
Rafael Espindola
523d18a9a5 Fix fetching the symbol table of a thin archive.
We were trying to read it as an external file.

llvm-svn: 242926
2015-07-22 19:34:26 +00:00
Yaron Keren
023ce3f0ae De-duplicate Unix & Windows CallBacksToRun
Move CallBacksToRun into the common Signals.cpp, create RunCallBacksToRun()
and use these in both Unix/Signals.inc and Windows/Signals.inc.

Lots of potential code to be merged here.

llvm-svn: 242925
2015-07-22 19:01:14 +00:00
Anthony Pesch
78b72fd3c8 Test commit, added blank line
llvm-svn: 242923
2015-07-22 18:50:10 +00:00
Chad Rosier
9d7b3c4c1e Simplify switch as all cases other than default return true. NFC.
llvm-svn: 242922
2015-07-22 18:41:57 +00:00
Rafael Espindola
af54d5a241 Identify thin archives as archives.
llvm-svn: 242921
2015-07-22 18:29:39 +00:00
Yaron Keren
f4b4dc4344 Remove C++98 workaround in llvm::sys::DontRemoveFileOnSignal()
llvm-svn: 242920
2015-07-22 18:23:51 +00:00
Renato Golin
cba3d97647 [Release] Allow release testers to disable certain components
Not all components build correctly on all targets and the release
script had no way to disable them other than editing the script locally.

This change provides a way to disable the test-suite, compiler-rt and
the libraries, as well as allowing you to re-run on the same directory
without checking out all sources again.

llvm-svn: 242919
2015-07-22 18:21:39 +00:00
Alex Lorenz
ddcf8bce2b MIR Serialization: Serialize the metadata machine operands.
llvm-svn: 242916
2015-07-22 17:58:46 +00:00
Quentin Colombet
30a4f74165 [ARM] Make the frame lowering code ready for shrink-wrapping.
Shrink-wrapping can now be tested on ARM with -enable-shrink-wrap.

Related to <rdar://problem/20821730>

llvm-svn: 242908
2015-07-22 16:34:37 +00:00
Rafael Espindola
60b9bc96e6 Delete ELFEntityIterator. NFC.
llvm-svn: 242901
2015-07-22 14:09:20 +00:00
Asaf Badouh
7feb9eaba0 [X86][AVX512] add reduce/range/scalef/rndScale
include encoding and intrinsics

Differential Revision: http://reviews.llvm.org/D11222

llvm-svn: 242896
2015-07-22 12:00:43 +00:00
Chandler Carruth
1665e31f7b [GMR] Add a flag to enable GlobalsModRef in the normal compilation
pipeline.

Even before I started improving its runtime, it was already crazy fast
once the call graph exists, and if we can get it to be conservatively
correct, will still likely catch a lot of interesting and useful cases.
So it may well be useful to enable by default.

But more importantly for me, this should make it easier for me to test
that changes aren't breaking it in fundamental ways by enabling it for
normal builds.

llvm-svn: 242895
2015-07-22 11:57:28 +00:00
Benjamin Kramer
8093dd522d [dsymutil] Remove extra semicolon. NFC.
llvm-svn: 242894
2015-07-22 11:54:19 +00:00
Chandler Carruth
a4c7c6c264 [GMR] Switch from std::set to SmallPtrSet. NFC.
This almost certainly doesn't matter in some deep sense, but std::set is
essentially always going to be slower here. Now the alias query should
be essentially constant time instead of having to chase the set tree
each time.

llvm-svn: 242893
2015-07-22 11:47:54 +00:00
Chandler Carruth
41327e670f [GMR] Only look in the associated allocs map for an underlying value if
it wasn't one of the indirect globals (which clearly cannot be an
allocation function call). Also only do a single lookup into this map
instead of two. NFC.

llvm-svn: 242892
2015-07-22 11:43:24 +00:00
Chandler Carruth
c9d371fb74 [GMR] Switch to a DenseMap and clean up the iteration loop. NFC.
Since we have to iterate this map not that infrequently, we should use
a map that is efficient for iteration. It is also almost certainly much
faster for lookups as well. There is more to do in terms of reducing the
wasted overhead of GMR's runtime though. Not sure how much is worthwhile
though.

The loop improvements should hopefully address the code review that
Duncan gave when he saw this code as I moved it around.

llvm-svn: 242891
2015-07-22 11:36:09 +00:00
Chandler Carruth
80c5815220 Fix a -Winconsistent-missing-override failure in the .intel_syntax
patch.

llvm-svn: 242890
2015-07-22 11:22:29 +00:00
Michael Kuperstein
6cb752cf86 Fix test from r242886 to use the right triple.
llvm-svn: 242889
2015-07-22 11:19:22 +00:00
Chandler Carruth
18b5a704b2 [PM/AA] Try to fix libc++ build bots which require the type used in
std::list to be complete by hoisting the entire definition into the
class. Ugly, but hopefully works.

llvm-svn: 242888
2015-07-22 11:10:41 +00:00
Michael Kuperstein
80699ec16e [X86] Add .intel_syntax noprefix directive to intel-syntax x86 asm output
Patch by: michael.zuckerman@intel.com
Differential Revision: http://reviews.llvm.org/D11223

llvm-svn: 242886
2015-07-22 10:49:44 +00:00
Michael Kuperstein
809b1c325f Fix mem2reg to correctly handle allocas only used in a single block
Currently, a load from an alloca that is used in as single block and is not preceded
by a store is replaced by undef. This is not always correct if the single block is
inside a loop.
Fix the logic so that:
1) If there are no stores in the block, replace the load with an undef, as before.
2) If there is a store (regardless of where it is in the block w.r.t the load), bail
out, and let the rest of mem2reg handle this alloca.

Patch by: gil.rapaport@intel.com
Differential Revision: http://reviews.llvm.org/D11355

llvm-svn: 242884
2015-07-22 10:29:29 +00:00
Kuba Brecka
cc9246c4cd [asan] Improve moving of non-instrumented allocas
In r242510, non-instrumented allocas are now moved into the first basic block.  This patch limits that to only move allocas that are present *after* the first instrumented one (i.e. only move allocas up).  A testcase was updated to show behavior in these two cases.  Without the patch, an alloca could be moved down, and could cause an invalid IR.

Differential Revision: http://reviews.llvm.org/D11339

llvm-svn: 242883
2015-07-22 10:25:38 +00:00
Chandler Carruth
ebae815d81 [PM/AA] Remove all of the dead AliasAnalysis pointers being threaded
through APIs that are no longer necessary now that the update API has
been removed.

This will make changes to the AA interfaces significantly less
disruptive (I hope). Either way, it seems like a really nice cleanup.

llvm-svn: 242882
2015-07-22 09:52:54 +00:00
Chandler Carruth
cdb8301de0 [PM/AA] Remove the last of the legacy update API from AliasAnalysis as
part of simplifying its interface and usage in preparation for porting
to work with the new pass manager.

Note that this will likely expose that we have dead arguments, members,
and maybe even pass requirements for AA. I'll be cleaning those up in
seperate patches. This just zaps the actual update API.

Differential Revision: http://reviews.llvm.org/D11325

llvm-svn: 242881
2015-07-22 09:49:59 +00:00
Chandler Carruth
4237391aee [PM/AA] Switch to an early-exit. NFC. This was split out of another
change because the diff is *useless*. I assure you, I just switched to
early-return in this function.

Cleanup in preparation for my next commit, as requested in code review!

llvm-svn: 242880
2015-07-22 09:44:54 +00:00
Chandler Carruth
939d6a13a3 [PM/AA] Put the 'final' keyword in the correct place. And actually
succeed at compiling my change before committing it too!

llvm-svn: 242879
2015-07-22 09:34:18 +00:00
Chandler Carruth
5204193caa [PM/AA] Replace the only use of the AliasAnalysis::deleteValue API (in
GlobalsModRef) with CallbackVHs that trigger the same behavior.

This is technically more expensive, but in benchmarking some LTO runs,
it seems unlikely to even be above the noise floor. The only way I was
able to measure the performance of GMR at all was to run nothing else
but this one analysis on a linked clang bitcode file. The call graph
analysis still took 5x more time than GMR, and this change at most made
GMR 2% slower (this is well within the noise, so its hard for me to be
sure that this is an actual change). However, in a real LTO run over the
same bitcode, the GMR run takes so little time that the pass timers
don't measure it.

With this, I can remove the last update API from the AliasAnalysis
interface, but I'll actually remove the interface hook point in
a follow-up commit.

Differential Revision: http://reviews.llvm.org/D11324

llvm-svn: 242878
2015-07-22 09:27:58 +00:00
Elena Demikhovsky
be2ecab469 AVX-512: Added intrinsics for VCVT* instructions.
All SKX forms. All VCVT instructions for float/double/int/long types.

Differential Revision: http://reviews.llvm.org/D11343

llvm-svn: 242877
2015-07-22 08:56:00 +00:00
Chen Li
ca56183986 [LoopUnswitch] Code refactoring to separate trivial loop unswitch and non-trivial loop unswitch in processCurrentLoop()
Summary: The current code in LoopUnswtich::processCurrentLoop() mixes trivial loop unswitch and non-trivial loop unswitch together. It goes over all basic blocks in the loop and checks if a condition is trivial or non-trivial unswitch condition. However, trivial unswitch condition can only occur in the loop header basic block (where it controls whether or not the loop does something at all). This refactoring separate trivial loop unswitch and non-trivial loop unswitch. Before going over all basic blocks in the loop, it checks if the loop header contains a trivial unswitch condition. If so, unswitch it. Otherwise, go over all blocks like before but don't check trivial condition any more since they are not possible to be in the other blocks. This code has no functionality change.

Reviewers: meheff, reames, broune

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11276

llvm-svn: 242873
2015-07-22 05:26:29 +00:00
Jingyue Wu
45a0757122 [BranchFolding] do not iterate the aliases of virtual registers
Summary:
MCRegAliasIterator only works for physical registers. So, do not run it
on virtual registers.

With this issue fixed, we can resurrect the BranchFolding pass in NVPTX
backend.

Reviewers: jholewinski, bkramer

Subscribers: henryhu, meheff, llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D11174

llvm-svn: 242871
2015-07-22 04:16:52 +00:00
Chandler Carruth
c205d0f3c2 [SROA] Fix a nasty pile of bugs to do with big-endian, different alloca
types and loads, loads or stores widened past the size of an alloca,
etc.

This started off with a bug report about big-endian behavior with
bitfields and loads and stores to a { i32, i24 } struct. An initial
attempt to fix this was sent for review in D10357, but that didn't
really get to the root of the problem.

The core issue was that canConvertValue and convertValue in SROA were
handling different bitwidth integers by doing a zext of the integer. It
wouldn't do a trunc though, only a zext! This would in turn lead SROA to
form an i24 load from an i24 alloca, zext it to i32, and then use it.
This would at least produce the wrong value for big-endian systems.

One of my many false starts here was to correct the computation for
big-endian systems by shifting. But this doesn't actually work because
the original code has a 64-bit store to the entire 8 bytes, and a 32-bit
load of the last 4 bytes, and because the alloc size is 8 bytes, we
can't lose that last (least significant if bigendian) byte! The real
problem here is that we're forming an i24 load in SROA which is actually
not sufficiently wide to load all of the necessary bits here. The source
has an i32 load, and SROA needs to form that as well.

The straightforward way to do this is to disable the zext logic in
canConvertValue and convertValue, forcing us to actually load all
32-bits. This seems like a really good change, but it in turn breaks
several other parts of SROA.

First in the chain of knock-on failures, we had places where we were
doing integer-widening promotion even though some of the integer loads
or stores extended *past the end* of the alloca's memory! There was even
a comment about preventing this, but it only prevented the case where
the type had a different bit size from its store size. So I added checks
to handle the cases where we actually have a widened load or store and
to avoid trying to special integer widening promotion in those cases.

Second, we actually rely on the ability to promote in the face of loads
past the end of an alloca! This is important so that we can (for
example) speculate loads around PHI nodes to do more promotion. The bits
loaded are garbage, but as long as they aren't used and the alignment is
suitable high (which it wasn't in the test case!) this is "fine". And we
can't stop promoting here, lots of things stop working well if we do. So
we need to add specific logic to handle the extension (and truncation)
case, but *only* where that extension or truncation are over bytes that
*are outside the alloca's allocated storage* and thus totally bogus to
load or store.

And of course, once we add back this correct handling of extension or
truncation, we need to correctly handle bigendian systems to avoid
re-introducing the exact bug that started us off on this chain of misery
in the first place, but this time even more subtle as it only happens
along speculated loads atop a PHI node.

I've ported an existing test for PHI speculation to the big-endian test
file and checked that we get that part correct, and I've added several
more interesting big-endian test cases that should help check that we're
getting this correct.

Fun times.

llvm-svn: 242869
2015-07-22 03:32:42 +00:00
Richard Smith
be9e5bef40 SetVector: add reverse_iterator support.
llvm-svn: 242865
2015-07-22 01:30:58 +00:00
Alexey Samsonov
84ab5e6b2a [Fuzzer] Rely on $PATH expansion instead of hardcoding paths in tests. NFC.
llvm-svn: 242851
2015-07-21 22:51:55 +00:00
Alexey Samsonov
4a6c6512bc [Fuzzer] Clearly separate regular and DFSan tests. NFC.
llvm-svn: 242850
2015-07-21 22:51:49 +00:00
Frederic Riss
f2d69e9ab6 [dsymutil] Implement ODR uniquing for C++ code.
This optimization allows the DWARF linker to reuse definition of
types it has emitted in previous CUs rather than reemitting them
in each CU that references them. The size and link time gains are
huge. For example when linking the DWARF for a debug build of
clang, this generates a ~150M dwarf file instead of a ~700M one
(the numbers date back a bit and must not be totally accurate
these days).

As with all the other parts of the llvm-dsymutil codebase, the
goal is to keep bit-for-bit compatibility with dsymutil-classic.
The code is littered with a lot of FIXMEs that should be
addressed once we can get rid of the compatibilty goal.

llvm-svn: 242847
2015-07-21 22:41:43 +00:00
Alex Lorenz
d54c1a6d40 MIR Serialization: Start serializing the CFI operands with .cfi_def_cfa_offset.
This commit begins serialization of the CFI index machine operands by
serializing one kind of CFI instruction - the .cfi_def_cfa_offset instruction.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242845
2015-07-21 22:28:27 +00:00
Nick Lewycky
72bee17899 Fix a performance problem in memcpyopt by removing a linear scan over ranges when inserting a new range. No functionality change intended. Patch by Anthony Pesch!
llvm-svn: 242843
2015-07-21 21:56:26 +00:00
Jingyue Wu
98a3974775 [MDA] change BlockScanLimit into a command line option.
Summary:
In the benchmark (https://github.com/vetter/shoc) we are researching,
the duplicated load is not eliminated because MemoryDependenceAnalysis
hit the BlockScanLimit. This patch change it into a command line option
instead of a hardcoded value.

Patched by Xuetian Weng. 

Test Plan: test/Analysis/MemoryDependenceAnalysis/memdep-block-scan-limit.ll

Reviewers: jingyue, reames

Subscribers: reames, llvm-commits

Differential Revision: http://reviews.llvm.org/D11366

llvm-svn: 242842
2015-07-21 21:50:39 +00:00
Bruno Cardoso Lopes
5962ea6ef1 [AsmPrinter] Check for valid constants in handleIndirectSymViaGOTPCRel
Check whether BaseCst is valid before extracting a GlobalValue.
This fixes PR24163.

Patch by David Majnemer.

llvm-svn: 242840
2015-07-21 21:45:42 +00:00