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Commit Graph

77442 Commits

Author SHA1 Message Date
Chandler Carruth
151d4fc273 Teach the BranchProbabilityInfo pass to print its results, and use that
to bring it under direct test instead of merely indirectly testing it in
the BlockFrequencyInfo pass.

The next step is to start adding tests for the various heuristics
employed, and to start fixing those heuristics once they're under test.

llvm-svn: 142778
2011-10-23 21:21:50 +00:00
Bill Wendling
743c5bcb96 Rename the script to indicate that this is for the TEST=simple tests.
llvm-svn: 142764
2011-10-23 20:14:06 +00:00
Bill Wendling
de530037c1 Resurrect the 'find regressions for the TEST=nightly tests' script.
llvm-svn: 142763
2011-10-23 20:13:14 +00:00
Chandler Carruth
c10018cd49 Now that we have comparison on probabilities, add some static functions
to get important constant branch probabilities and use them for finding
the best branch out of a set of possibilities.

llvm-svn: 142762
2011-10-23 20:10:34 +00:00
Chandler Carruth
372600fd24 Remove a commented out line of code that snuck by my auditing.
llvm-svn: 142761
2011-10-23 20:10:30 +00:00
Benjamin Kramer
fd11994070 Print branch probabilities as percentages.
50% is much more readable than 5.000000e-01.

llvm-svn: 142752
2011-10-23 11:32:54 +00:00
Benjamin Kramer
9adc582e35 Add compare operators to BranchProbability and use it to determine if an edge is hot.
llvm-svn: 142751
2011-10-23 11:19:14 +00:00
Chandler Carruth
68ba25c47d Completely re-write the algorithm behind MachineBlockPlacement based on
discussions with Andy. Fundamentally, the previous algorithm is both
counter productive on several fronts and prioritizing things which
aren't necessarily the most important: static branch prediction.

The new algorithm uses the existing loop CFG structure information to
walk through the CFG itself to layout blocks. It coalesces adjacent
blocks within the loop where the CFG allows based on the most likely
path taken. Finally, it topologically orders the block chains that have
been formed. This allows it to choose a (mostly) topologically valid
ordering which still priorizes fallthrough within the structural
constraints.

As a final twist in the algorithm, it does violate the CFG when it
discovers a "hot" edge, that is an edge that is more than 4x hotter than
the competing edges in the CFG. These are forcibly merged into
a fallthrough chain.

Future transformations that need te be added are rotation of loop exit
conditions to be fallthrough, and better isolation of cold block chains.
I'm also planning on adding statistics to model how well the algorithm
does at laying out blocks based on the probabilities it receives.

The old tests mostly still pass, and I have some new tests to add, but
the nested loops are still behaving very strangely. This almost seems
like working-as-intended as it rotated the exit branch to be
fallthrough, but I'm not convinced this is actually the best layout. It
is well supported by the probabilities for loops we currently get, but
those are pretty broken for nested loops, so this may change later.

llvm-svn: 142743
2011-10-23 09:18:45 +00:00
Craig Topper
0e63b4485c Add X86 RORX instruction
llvm-svn: 142741
2011-10-23 07:34:00 +00:00
Cameron Zwarich
2dd06afcf5 The element insertion code in scalar replacement doesn't handle incorrect
element types, even though the element extraction code does. It is surprising
that this bug has been here for so long. Fixes <rdar://problem/10318778>.

llvm-svn: 142740
2011-10-23 07:02:10 +00:00
Craig Topper
7019cf1b80 Add X86 MULX instruction for disassembler.
llvm-svn: 142738
2011-10-23 00:33:32 +00:00
Craig Topper
c543ac0876 Remove some duplicate specifying of neverHasSideEffects and mayLoad from X86 multiply instructions.
llvm-svn: 142737
2011-10-22 23:13:53 +00:00
Nick Lewycky
1d759dcde7 Oops! Fix test I forgot to submit as part of r142735.
llvm-svn: 142736
2011-10-22 22:07:31 +00:00
Nick Lewycky
25e5f6896b A non-escaping malloc in the entry block is not unlike an alloca. Do dead-store
elimination on them too.

llvm-svn: 142735
2011-10-22 21:59:35 +00:00
Nick Lewycky
ce8bfeadff Make SCEV's brute force analysis stronger in two ways. Firstly, we should be
able to constant fold load instructions where the argument is a constant.
Second, we should be able to watch multiple PHI nodes through the loop; this
patch only supports PHIs in loop headers, more can be done here.

With this patch, we now constant evaluate:
  static const int arr[] = {1, 2, 3, 4, 5};
  int test() {
    int sum = 0;
    for (int i = 0; i < 5; ++i) sum += arr[i];
    return sum;
  }

llvm-svn: 142731
2011-10-22 19:58:20 +00:00
Nadav Rotem
dad9eeadbb Fix a typo.w
llvm-svn: 142729
2011-10-22 18:44:51 +00:00
Jim Grosbach
b10647b119 Minor updates.
llvm-svn: 142728
2011-10-22 18:17:32 +00:00
Nadav Rotem
c5c37861f7 Added my name to CREDITS.TXT
llvm-svn: 142727
2011-10-22 17:51:04 +00:00
Benjamin Kramer
03065133c3 Move various generated tables into read-only memory, fixing up const correctness along the way.
llvm-svn: 142726
2011-10-22 16:50:00 +00:00
Nadav Rotem
7a79f94aad Fix pr11193.
SHL inserts zeros from the right, thus even when the original
sign_extend_inreg value was of 1-bit, we need to sra.

llvm-svn: 142724
2011-10-22 12:39:25 +00:00
Bill Wendling
66327a8d0e The different flavors of ARM have different valid subsets of registers. Check
that the set of callee-saved registers is correct for the specific platform.
<rdar://problem/10313708> & ctor_dtor_count & ctor_dtor_count-2

llvm-svn: 142706
2011-10-22 00:29:28 +00:00
Jim Grosbach
d964cf8939 Assembly parsing for 4-register sequential variant of VLD2.
llvm-svn: 142704
2011-10-21 23:58:57 +00:00
Jim Grosbach
a6e536367e Assembly parsing for 2-register sequential variant of VLD2.
llvm-svn: 142691
2011-10-21 22:21:10 +00:00
Bill Wendling
34a9073d67 Make sure that the landing pads themselves have no PHI instructions in them.
The assumption in the back-end is that PHIs are not allowed at the start of the
landing pad block for SjLj exceptions.
<rdar://problem/10313708>

llvm-svn: 142689
2011-10-21 22:08:56 +00:00
Benjamin Kramer
917737037d Extend the floating point heuristic to consider NaN checks unlikely.
llvm-svn: 142687
2011-10-21 21:13:47 +00:00
Tanya Lattner
84bb012d55 Revert r141657 for now. This has broken css and changed links on llvm.org. I'd like to understand exactly why the links have changed and if a newer doxygen is required. This may be reapplied once we upgrade on llvm.org and it is fully tested.
llvm-svn: 142686
2011-10-21 20:51:54 +00:00
Eli Friedman
5012ac7cc0 Remap blockaddress correctly when inlining a function. Fixes PR10162.
llvm-svn: 142684
2011-10-21 20:45:19 +00:00
Owen Anderson
0d40d283e9 Use LLVMBool for a function that logically returns a boolean value.
llvm-svn: 142683
2011-10-21 20:35:58 +00:00
Jim Grosbach
68dfc88f95 Assembly parsing for 4-register variant of VLD1.
llvm-svn: 142682
2011-10-21 20:35:01 +00:00
Owen Anderson
7faa1c3317 Fix typo.
llvm-svn: 142681
2011-10-21 20:28:19 +00:00
Benjamin Kramer
66a199d42f BranchProbabilityInfo: floating point equality is unlikely.
This is from the same paper from Ball and Larus as the rest of the currently implemented heuristics.

llvm-svn: 142677
2011-10-21 20:12:47 +00:00
Jim Grosbach
2c1ca90ac9 Assembly parsing for 3-register variant of VLD1.
llvm-svn: 142675
2011-10-21 20:02:19 +00:00
Owen Anderson
806a1e5c78 STABS symbols are debug symbols.
llvm-svn: 142673
2011-10-21 19:26:54 +00:00
Eli Friedman
28f3ff0d3d Minor simplification: use ShuffleVectorInst::getMaskValue instead of a more expensive helper.
llvm-svn: 142672
2011-10-21 19:11:34 +00:00
Eli Friedman
fb0b9216e1 Extend instcombine's shufflevector simplification to handle more cases where the input and output vectors have different sizes. Patch by Xiaoyi Guo.
llvm-svn: 142671
2011-10-21 19:06:29 +00:00
Jim Grosbach
6bb38d0e97 ARM VLD parsing and encoding.
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle
VLD1 instructions that take a two-register register list.

Adjust the instruction definitions to only have the single encoded register
as an operand. The super-register from the pseudo is kept as an implicit def,
so passes which come after pseudo-expansion still know that the instruction
defines the other subregs.

llvm-svn: 142670
2011-10-21 18:54:25 +00:00
Owen Anderson
ccc76e17cc Don't automatically set the "fc" bits on MSR instructions if the user didn't ask for them. This is a divergence from gas' behavior, but it is correct per the documentation and allows us to forge ahead with roundtrip testing.
llvm-svn: 142669
2011-10-21 18:43:28 +00:00
Owen Anderson
da28398bb6 Bind libObject API for obtaining the section containing a Symbol.
llvm-svn: 142667
2011-10-21 18:21:22 +00:00
Owen Anderson
33b5868dab Expand the coverage of the libObject C bindings to include more SectionRef accessors as well as Symbol iterators.
llvm-svn: 142661
2011-10-21 17:50:59 +00:00
Nadav Rotem
57f652cfe4 Fix pr11194. When promoting and splitting integers we need to use
ZExtPromotedInteger and SExtPromotedInteger based on the operation we legalize.

SetCC return type needs to be legalized via PromoteTargetBoolean.

llvm-svn: 142660
2011-10-21 17:35:19 +00:00
Jim Grosbach
9b539fab9d Nuke an #if0 that got accidentally left in.
llvm-svn: 142658
2011-10-21 16:59:08 +00:00
Jim Grosbach
a1d54f2c7a whitespace.
llvm-svn: 142657
2011-10-21 16:56:40 +00:00
Chandler Carruth
2f20f63a01 Don't hard code the desired alignment for loops -- it isn't 16-bytes on
all x86 systems. Sorry for the breakage.

llvm-svn: 142656
2011-10-21 16:41:39 +00:00
Jim Grosbach
501c72cdc5 Remove some outdated comments.
llvm-svn: 142653
2011-10-21 16:14:12 +00:00
Nadav Rotem
52d820c0dd 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type.
2. Fix a typo in CONCAT_VECTORS which exposed the bug in #1.

llvm-svn: 142648
2011-10-21 11:42:07 +00:00
Duncan Sands
926a63ed67 Ensure timestamps are not embedded into files when doing a release build.
llvm-svn: 142647
2011-10-21 09:47:14 +00:00
Anton Korobeynikov
e91e40b137 Fix build on mingw-w64.
Patch by Ruben Van Boxem!

llvm-svn: 142646
2011-10-21 09:38:50 +00:00
Chandler Carruth
21c689d1ac Add loop aligning to MachineBlockPlacement based on review discussion so
it's a bit more plausible to use this instead of CodePlacementOpt. The
code for this was shamelessly stolen from CodePlacementOpt, and then
trimmed down a bit. There doesn't seem to be much utility in returning
true/false from this pass as we may or may not have rewritten all of the
blocks. Also, the statistic of counting how many loops were aligned
doesn't seem terribly important so I removed it. If folks would like it
to be included, I'm happy to add it back.

This was probably the most egregious of the missing features, and now
I'm going to start gathering some performance numbers and looking at
specific loop structures that have different layout between the two.

Test is updated to include both basic loop alignment and nested loop
alignment.

llvm-svn: 142645
2011-10-21 08:57:37 +00:00
Chandler Carruth
f352d2d7e3 Add a very basic test for MachineBlockPlacement. This is essentially the
canonical example I used when developing it, and is one of the primary
motivating real-world use cases for __builtin_expect (when burried under
a macro).

I'm working on more test cases here, but I'm trying to make sure both
that the pass is doing the right thing with the test cases and that they
aren't too brittle to changes elsewhere in the code generation pipeline.

Feedback and/or suggestions on how to test this are very welcome.
Especially feedback on whether testing the block comments is a good
strategy; I couldn't find any good examples to steal from but all the
other ideas I had were a lot uglier or more fragile.

llvm-svn: 142644
2011-10-21 08:01:56 +00:00
Bill Wendling
7956e709bf Modify the script to output the regressions and passes into categories. My Python-fu could use some improving...
llvm-svn: 142643
2011-10-21 06:58:01 +00:00