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11854 Commits

Author SHA1 Message Date
Chris Lattner
568058ef71 break coff symbol definition stuff out into proper MCStreamer callbacks, 
patch by Nathan Jeffords!

llvm-svn: 103346
 2010-05-08 19:54:22 +00:00
Daniel Dunbar
1457d51ff8 Add llvm::sys::RunInterruptHandlers(), which runs the registered SIGINT cleanup 
stuff.

llvm-svn: 103333
 2010-05-08 02:10:34 +00:00
Devang Patel
14f07a8625 Remove DIGlobal. 
llvm-svn: 103325
 2010-05-07 23:19:07 +00:00
Devang Patel
62b4a23a3b Add DINameSpace::Verify(). 
llvm-svn: 103318
 2010-05-07 23:04:32 +00:00
Douglas Gregor
2b05a8ffe8 Clang is dying on this with an ambiguous conversion sequence. We're working on it 
llvm-svn: 103312
 2010-05-07 22:28:25 +00:00
Devang Patel
3c2f4664fc Verify variable directly. 
llvm-svn: 103305
 2010-05-07 22:04:20 +00:00
Chris Lattner
e72e3e9c12 add COFF support for COMDAT sections, patch by Nathan Jeffords! 
llvm-svn: 103304
 2010-05-07 21:49:09 +00:00
Kevin Enderby
3807a4746a Fix i386 relocations to Weak Definitions. The relocation entries should be 
external and the item to be relocated should not have the address of the
symbol added in.

llvm-svn: 103302
 2010-05-07 21:44:23 +00:00
Dale Johannesen
1ee37ac5d4 Fix PR 7087, and probably other things, by extending 
getConstantFP to accept the two supported long double
target types.  This was not the original intent, but
there are other places that assume this works and it's
easy enough to do.

llvm-svn: 103299
 2010-05-07 21:35:53 +00:00
Devang Patel
0638b539bb Wrap const MDNode * inside DIDescriptor. 
llvm-svn: 103295
 2010-05-07 20:54:48 +00:00
Devang Patel
af119914f7 remove DIDescriptor::getNode() 
llvm-svn: 103278
 2010-05-07 18:36:34 +00:00
Devang Patel
02bb578ffd Avoid DIDescriptor::getNode(). Use overloaded operators instead. 
llvm-svn: 103272
 2010-05-07 18:11:54 +00:00
Chris Lattner
c1d0e3a79e switch MCSectionCOFF from a syntactic to semantic representation, 
patch by Peter Housel!

llvm-svn: 103267
 2010-05-07 17:17:41 +00:00
Dan Gohman
38fe30a595 Add a simple module-level debug info printer. It just sets up a 
DebugInfoFinder and iterates over all the contents calling print.

llvm-svn: 103262
 2010-05-07 16:22:32 +00:00
Dan Gohman
1512bd9998 Add an LLVM IR version of code sinking. This uses the same simple algorithm 
as MachineSink, but it isn't constrained by MachineInstr-level details.

llvm-svn: 103257
 2010-05-07 15:40:13 +00:00
Dan Gohman
6201059ec3 Const-ify some stuff. 
llvm-svn: 103256
 2010-05-07 15:36:10 +00:00
Dan Gohman
612fbfa641 Convert the DebugInfo classes dump() methods into print(raw_ostream &) 
methods, and add dump functions implemented in terms of the print.

llvm-svn: 103254
 2010-05-07 15:30:29 +00:00
Dan Gohman
497e752655 Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it 
doesn't have to guess.

llvm-svn: 103194
 2010-05-06 20:33:48 +00:00
Evan Cheng
80f3051bb7 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. 
llvm-svn: 103193
 2010-05-06 19:06:44 +00:00
Bob Wilson
8d0b53dc62 Fix handling of unreachable blocks in the SSAUpdater. The previous code only 
handled cases where a block had zero predecessors, but failed to detect other
cases like loops with no entries.  The SSAUpdater is already doing a forward
traversal through the blocks, so it is not hard to identify the blocks that
were never reached on that traversal.  This fixes the crash for ppc on the
stepanov_vector test.

llvm-svn: 103184
 2010-05-06 16:24:11 +00:00
Dan Gohman
180422793f Add an "IsBottomUp" member function to FastISel, which will be used to 
support a new bottom-up mode.

llvm-svn: 103138
 2010-05-05 23:58:35 +00:00
Daniel Dunbar
258ede3795 MC: Make setVariableValue check the redefinition condition a bit more strongly. 
llvm-svn: 103110
 2010-05-05 19:00:56 +00:00
Evan Cheng
d7bc27a079 Move REG_SEQUENCE removal to 2addr pass. 
llvm-svn: 103109
 2010-05-05 18:45:40 +00:00
Chris Lattner
b9f858943a Implement rdar://7415680 - Twine integer support lacks greatness 
Microoptimize Twine's with unsigned and int to not pin their value to
the stack.  This saves stack space in common cases and allows mem2reg
in the caller.  A simple example is:

void foo(const Twine &);
void bar(int x) {
  foo("xyz: " + Twine(x));
}

Before:

__Z3bari:
	subq	$40, %rsp
	movl	%edi, 36(%rsp)
	leaq	L_.str3(%rip), %rax
	leaq	36(%rsp), %rcx
	leaq	8(%rsp), %rdi
	movq	%rax, 8(%rsp)
	movq	%rcx, 16(%rsp)
	movb	$3, 24(%rsp)
	movb	$7, 25(%rsp)
	callq	__Z3fooRKN4llvm5TwineE
	addq	$40, %rsp
	ret

After:

__Z3bari:
	subq	$24, %rsp
	leaq	L_.str3(%rip), %rax
	movq	%rax, (%rsp)
	movslq	%edi, %rax
	movq	%rax, 8(%rsp)
	movb	$3, 16(%rsp)
	movb	$7, 17(%rsp)
	leaq	(%rsp), %rdi
	callq	__Z3fooRKN4llvm5TwineE
	addq	$24, %rsp
	ret

It saves 16 bytes of stack and one instruction in this case.

llvm-svn: 103107
 2010-05-05 18:40:33 +00:00
Evan Cheng
25c07ac593 Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g. 
80      %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0
. . .
120     %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0

llvm-svn: 103102
 2010-05-05 18:27:40 +00:00
Daniel Dunbar
d2ac9dc48b MC: Rename MCSymbol::{g,s}etValue -> MCSymbol::{g,s}etVariableValue. 
llvm-svn: 103095
 2010-05-05 17:41:00 +00:00
Daniel Dunbar
f5dc70a7d1 MC/Mach-O/x86_64: Relocations in debug sections should use local relocations 
when possible.
 - <rdar://problem/7934873>

llvm-svn: 103092
 2010-05-05 17:22:39 +00:00
Bob Wilson
e81252b747 Combine the implementations of the core part of the SSAUpdater and 
MachineSSAUpdater to avoid duplicating all the code.

llvm-svn: 103060
 2010-05-04 23:18:19 +00:00
Daniel Dunbar
711d2427dd MC/Matcher: Add support for over-riding the default MatchInstruction function 
name (for example, to allow targets to interpose the actual MatchInstruction
function).

llvm-svn: 102987
 2010-05-04 00:33:13 +00:00
Dan Gohman
8bfd5f99b5 Factor out FastISel's code for materializing constants and other values 
in registers into a separate function to de-couple it from the
top-down-specific logic in getRegForValue.

llvm-svn: 102975
 2010-05-03 23:36:34 +00:00
Duncan Sands
153ad3b903 Remove the -enable-sjlj-eh option, which doesn't do anything. 
Remove the -enable-eh option which is only used by the JIT,
and replace it with -jit-enable-eh.

llvm-svn: 102865
 2010-05-02 15:36:26 +00:00
David Chisnall
52a91e993b Added a variant of InlineCostAnalyzer::getInlineCost() that takes the called function as an explicit argument, for use when inlining function pointers. 
llvm-svn: 102841
 2010-05-01 15:47:41 +00:00
Chris Lattner
66d1a6ad69 rename InlineInfo.DevirtualizedCalls -> InlinedCalls to 
reflect that it includes all inlined calls now, not just
devirtualized ones.

llvm-svn: 102824
 2010-05-01 01:26:13 +00:00
Evan Cheng
8bd004b033 Add a pseudo instruction REG_SEQUENCE that takes a list of registers and 
sub-register indices and outputs a single super register which is formed from
a consecutive sequence of registers.

This is used as register allocation / coalescing aid and it is useful to
represent instructions that output register pairs / quads. For example,
v1024, v1025 = vload <address>
where v1024 and v1025 forms a register pair.

This really should be modelled as
v1024<3>, v1025<4> = vload <address>
but it would violate SSA property before register allocation is done.

Currently we use insert_subreg to form the super register:
v1026 = implicit_def
v1027 - insert_subreg v1026, v1024, 3
v1028 = insert_subreg v1027, v1025, 4
...
      = use v1024
      = use v1028

But this adds pseudo live interval overlap between v1024 and v1025.

We can now modeled it as
v1024, v1025 = vload <address>
v1026 = REG_SEQUENCE v1024, 3, v1025, 4
...
      = use v1024
      = use v1026

After coalescing, it will be
v1026<3>, v1025<4> = vload <address>
...
      = use v1026<3>
      = use v1026

llvm-svn: 102815
 2010-05-01 00:28:44 +00:00
Dan Gohman
68f04d06c8 Get rid of the EdgeMapping map. Instead, just check for BasicBlock 
changes before doing phi lowering for switches.

llvm-svn: 102809
 2010-05-01 00:01:06 +00:00
Dan Gohman
73722062f7 Update BitVectorTest.cpp to stay in sync with SmallBitVectorTest.cpp, 
and fix a bug in BitVector's reference proxy class which this exposed.

llvm-svn: 102768
 2010-04-30 20:50:28 +00:00
Devang Patel
52c2d4d378 Attach AT_APPLE_optimized attribute to optimized function's debug info. 
llvm-svn: 102743
 2010-04-30 19:38:23 +00:00
Dan Gohman
cfd0d9393a Add some comments. 
llvm-svn: 102731
 2010-04-30 18:33:41 +00:00
Dan Gohman
a5ef1ab165 Properly escape edge source and destination labels. 
llvm-svn: 102728
 2010-04-30 18:27:57 +00:00
Benjamin Kramer
f3e9546fc1 SmallBitVector: Rework find_first/find_next and tweak test to test them (at least on 64 bit platforms). 
llvm-svn: 102712
 2010-04-30 13:40:27 +00:00
Benjamin Kramer
e4ebf09068 Implement a read/write operator[] for SmallBitVector with a proxy class. 
llvm-svn: 102709
 2010-04-30 12:29:39 +00:00
Benjamin Kramer
e59c44ea79 Make sure SmallBitVector actually uses the small case and fix latent bugs. 
- We can't use PointerIntPair here since we require the discrimination bit to be in the LSB.

llvm-svn: 102707
 2010-04-30 11:34:01 +00:00
Chris Lattner
105e312fb4 add some more (void)'s to prototypes for PR6961 
llvm-svn: 102667
 2010-04-29 23:27:32 +00:00
Devang Patel
432efd232d Missed earlier. This is part of previous check-in. (r102661 - refactor.) 
llvm-svn: 102662
 2010-04-29 20:48:12 +00:00
Evan Cheng
f0f25bd8e6 Add DenseMapInfo for int. 
llvm-svn: 102652
 2010-04-29 18:50:35 +00:00
Dan Gohman
78c9ada867 Elaborate on a comment. 
llvm-svn: 102637
 2010-04-29 16:57:54 +00:00
Duncan Sands
c83ef78bd3 Fix comment typo. 
llvm-svn: 102612
 2010-04-29 12:32:45 +00:00
Torok Edwin
9ddbae859f Fix PR6910. 
Limit alignment in SmallVector 8, otherwise GCC assumes 16 byte alignment.
opetaror new, and malloc only return 8-byte aligned memory on 32-bit Linux,
which cause a crash if code is compiled with -O3 (or -ftree-vectorize) and some
SmallVector code is vectorized.

llvm-svn: 102604
 2010-04-29 06:43:12 +00:00
Nick Lewycky
2b713db8ed Fix typo. 
llvm-svn: 102599
 2010-04-29 05:54:29 +00:00
Mon P Wang
bfebbd889a Add support for assemblers that don't support periods in a name 
llvm-svn: 102594
 2010-04-29 04:00:56 +00:00