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Commit Graph

18 Commits

Author SHA1 Message Date
Zoran Jovanovic
8aeb0d5244 Support for microMIPS DIV instructions. 
llvm-svn: 190745
 2013-09-14 07:15:21 +00:00
Zoran Jovanovic
579084a489 Support for misc microMIPS instructions. 
llvm-svn: 190744
 2013-09-14 06:49:25 +00:00
Akira Hatanaka
c11e303acd [mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fit 
into a 5-bit or 6-bit field.

llvm-svn: 190226
 2013-09-07 00:02:02 +00:00
Vladimir Medic
d17f16c84f This patch adds support for microMIPS Multiply and Add/Sub instructions. Test cases are included in patch. 
llvm-svn: 190154
 2013-09-06 13:08:00 +00:00
Vladimir Medic
c122b6c139 This patch adds support for microMIPS Move to/from HI/LO instructions. Test cases are included in patch. 
llvm-svn: 190152
 2013-09-06 12:53:21 +00:00
Vladimir Medic
a00506588f This patch adds support for microMIPS Move Conditional instructions. Test cases are included in patch. 
llvm-svn: 190148
 2013-09-06 12:41:17 +00:00
Vladimir Medic
0c18f0f6ce This patch adds support for microMIPS disassembler and disassembler make check tests. 
llvm-svn: 190144
 2013-09-06 12:30:36 +00:00
Akira Hatanaka
191591d4eb [mips] Resolve register classes dynamically using ptr_rc to reduce the number of 
load/store instructions defined. Previously, we were defining load/store
instructions for each pointer size (32 and 64-bit), but now we need just one
definition.

llvm-svn: 188830
 2013-08-20 21:08:22 +00:00
Akira Hatanaka
ea8d1c863e [mips] Guard micromips instructions with predicate InMicroMips. Also, fix 
assembler predicate HasStdEnd so that it is false when the target is micromips.

llvm-svn: 188824
 2013-08-20 20:46:51 +00:00
Akira Hatanaka
6ac16b554b [mips] Rename HIRegs and LORegs. 
llvm-svn: 188341
 2013-08-14 00:47:08 +00:00
Jack Carter
cb8856c2c6 [Mips] Support for unaligned load/store microMips instructions 
This includes instructions lwl, lwr, swl and swr.

Patch by Zoran Jovnovic

llvm-svn: 188312
 2013-08-13 20:19:16 +00:00
Akira Hatanaka
1290d365ec [mips] Rename register classes CPURegs and CPU64Regs. 
llvm-svn: 187832
 2013-08-06 23:08:38 +00:00
Akira Hatanaka
354394e047 [mips] Replace usages of register classes with register operands. Also, remove 
unnecessary jalr InstAliases in Mips64InstrInfo.td and add the code to print
jalr InstAliases in MipsInstPrinter::printAlias.

llvm-svn: 187821
 2013-08-06 22:20:40 +00:00
Akira Hatanaka
d0c19bc118 [mips] Define instruction itineraries IIArith and IILogic. 
No functionality change.

llvm-svn: 187468
 2013-07-31 00:55:34 +00:00
Jack Carter
27313685a3 Mips td file formatting: white space and long lines 
llvm-svn: 182047
 2013-05-16 20:08:49 +00:00
Akira Hatanaka
587ba11650 [mips] Add definitions of micromips load and store instructions. 
Patch by Zoran Jovanovic.

llvm-svn: 180241
 2013-04-25 01:21:25 +00:00
Akira Hatanaka
fd15a7b67e [mips] Add definitions of micromips shift instructions. 
Patch by Zoran Jovanovic.

llvm-svn: 180238
 2013-04-25 01:11:15 +00:00
Akira Hatanaka
0a152f4724 [mips] First patch which adds support for micromips. 
This patch adds support for recoded (meaning assembly-language compatible to
standard mips32) arithmetic 32-bit instructions.

Patch by Zoran Jovanovic.

llvm-svn: 179873
 2013-04-19 19:03:11 +00:00