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Commit Graph

81072 Commits

Author SHA1 Message Date
Michael J. Spencer
e5d5ca4072 [Object/COFF]: Expose getSectionContents.
llvm-svn: 153051
2012-03-19 20:27:37 +00:00
Michael J. Spencer
2174510edf [Object/COFF]: Expose getSectionName.
Also add some documentation.

llvm-svn: 153050
2012-03-19 20:27:15 +00:00
Anton Korobeynikov
ccc669ff8f Perform mul combine when multiplying wiht negative constants.
Patch by Weiming Zhao!
This fixes PR12212

llvm-svn: 153049
2012-03-19 19:19:50 +00:00
Lang Hames
e9e9965da5 Add an option to the MI scheduler to cut off scheduling after a fixed number of
instructions have been scheduled. Handy for tracking down scheduler bugs, or
bugs exposed by scheduling.

llvm-svn: 153045
2012-03-19 18:38:38 +00:00
Kostya Serebryany
f8cb0a65c1 [asan] don't emit __asan_mapping_offset/__asan_mapping_scale by default -- they are currently used only for experiments
llvm-svn: 153040
2012-03-19 16:40:35 +00:00
NAKAMURA Takumi
41690b3b7f llvm/test/DebugInfo: Move two tests to DebugInfo/X86. They are X86-dependent.
llvm-svn: 153038
2012-03-19 16:16:03 +00:00
Duncan Sands
725ed6d921 Fix DAG combine which creates illegal vector shuffles. Patch by Heikki Kultala.
llvm-svn: 153035
2012-03-19 15:35:44 +00:00
Preston Gurd
d1ae391210 This patch adds X86 instruction itineraries for non-pseudo opcodes in
X86InstrCompiler.td.
 
It also adds –mcpu-generic to the legalize-shift-64.ll test so the test
will pass if run on an Intel Atom CPU, which would otherwise
produce an instruction schedule which differs from that which the test expects.

llvm-svn: 153033
2012-03-19 14:10:12 +00:00
Benjamin Kramer
080ccc13a6 Add a note for -ffast-math optimization of vector norm.
llvm-svn: 153031
2012-03-19 00:43:34 +00:00
Chandler Carruth
f79b13d9c4 Make the formatting of this file more consistent, and fix the 80-columns
violations I introduced. Also sort some of the instructions to get
a more consistent ordering.

Suggestions on still better / more consistent formatting would be
welcome. I'm actually tempted to use a macro to define all of the
delegate methods...

llvm-svn: 153030
2012-03-18 23:45:14 +00:00
Chandler Carruth
6163cc0a2f Teach InstVisitor about the UnaryInstruction layer in the instruction
type hierarchy. I wanted to use this for the inline cost rewrite, and
found it was missing.

llvm-svn: 153029
2012-03-18 23:31:28 +00:00
Nick Lewycky
92a7d87ceb Factor out the multiply analysis code in ComputeMaskedBits and apply it to the
overflow checking multiply intrinsic as well.

Add a test for this, updating the test from grep to FileCheck.

llvm-svn: 153028
2012-03-18 23:28:48 +00:00
Craig Topper
34891f519c isCommutedMOVLMask should only look at 128-bit vectors to match isMOVLMask.
llvm-svn: 153027
2012-03-18 22:50:10 +00:00
Nick Lewycky
bc6d9e5b06 This clause (although matching parts of the implementation) can't be correct.
Thanks to Eli for noticing the discrepancy.

llvm-svn: 153011
2012-03-18 09:35:50 +00:00
Benjamin Kramer
5cfc07cf35 CriticalAntiDepBreaker: Replace a SmallSet of regs with a much denser BitVector.
llvm-svn: 152999
2012-03-17 20:22:57 +00:00
Craig Topper
b1f171a213 Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
llvm-svn: 152997
2012-03-17 18:46:09 +00:00
Benjamin Kramer
ad7378e585 MachineInstr: Inline the fast path (non-bundle instruction) of hasProperty.
This is particularly helpful as both arguments tend to be constants.

llvm-svn: 152991
2012-03-17 17:03:45 +00:00
Craig Topper
bb72c24507 Fix some copy and paste remnants of Cell and SPU in Hexagon files.
llvm-svn: 152981
2012-03-17 09:39:20 +00:00
Craig Topper
41786f284d Fix typo in file header.
llvm-svn: 152980
2012-03-17 09:28:37 +00:00
Craig Topper
3d39a3e5ba Pass TargetOptions to HexagonTargetMachine constructor by reference to match other targets and the base class.
llvm-svn: 152979
2012-03-17 09:24:09 +00:00
Craig Topper
0534d071b7 Reorder includes to match coding standards. Fix an issue or two exposed by that.
llvm-svn: 152978
2012-03-17 07:33:42 +00:00
Jim Grosbach
138c2143c3 MC asm parser macro argument count was wrong when empty.
evaluated to '1' when the argument list was empty (should be '0').

rdar://11057257

llvm-svn: 152967
2012-03-17 00:11:42 +00:00
Bill Wendling
b427a9f177 Check if we can handle the arguments of a call (and therefore the call) in
fast-isel before emitting code. If the program bails after code was emitted,
then it could lead to the stack being adjusted more than once (two
CALLSEQ_BEGINs emitted) but being adjuste back only once after the call. This
leads to general badness and gnashing of teeth.
<rdar://problem/11050630>

llvm-svn: 152959
2012-03-16 23:11:07 +00:00
Francois Pichet
d7e89c29c2 Revert r152915. Chapuni's WinWaitReleased refactoring: It doesn't work for me
llvm-svn: 152958
2012-03-16 22:50:01 +00:00
Chris Lattner
b39bdf2c78 clarify the coding standards a bit.
llvm-svn: 152957
2012-03-16 22:34:37 +00:00
Jim Grosbach
7ab12a079f ARM fix silly typo in optional operand alias.
rdar://11065671

llvm-svn: 152954
2012-03-16 22:18:29 +00:00
Jim Grosbach
99aef428f3 ARM divided syntax fmrx/fmxr mnemonics.
llvm-svn: 152946
2012-03-16 21:06:13 +00:00
Jim Grosbach
af19922301 ARM ldm/stm register lists can be out of order.
It's not a good style idea, as the registers will be laid down in memory in
numerical order, not the order they're in the list, but it's legal. vldm/vstm
are stricter.

rdar://11064740

llvm-svn: 152943
2012-03-16 20:48:38 +00:00
Bill Wendling
9343ed10c6 Revert r152907.
llvm-svn: 152935
2012-03-16 18:20:54 +00:00
Benjamin Kramer
98c952b1e4 ScheduleDAGInstrs: When adding uses we add them into a set that's empty at the beginning, no need to maintain another set for the added regs.
llvm-svn: 152934
2012-03-16 17:38:19 +00:00
Benjamin Kramer
4874db4be8 Limit the number of memory operands in MachineInstr to 2^16 and store the number in padding.
Saves one machine word on MachineInstr (88->80 bytes on x86_64, 48->44 on i386).

llvm-svn: 152930
2012-03-16 16:39:27 +00:00
Benjamin Kramer
6ca1163b8e CriticalAntiDepBreaker: BasicBlock::size is an expensive operation, reuse the cached value.
No functionality change.

llvm-svn: 152927
2012-03-16 15:46:47 +00:00
NAKAMURA Takumi
b2d7bb031a lit/TestRunner.py: [Win32] Check all opened_files[] released, rather than (obsoleted) written_files[].
In previous case,
RUN: foo -o %t
RUN: FileCheck < %t
RUN: bar -o %t

2nd read handle might prevent manipulation of 3rd %t in bar, to remove and rename.

llvm-svn: 152916
2012-03-16 10:48:10 +00:00
NAKAMURA Takumi
14c056f6e8 lit/TestRunner.py: [Win32] Rework WinWaitReleased().
We can simply confirm the handle released to open it with EXCLUSIVE. Attempting renaming was bad.

llvm-svn: 152915
2012-03-16 10:48:03 +00:00
Bill Wendling
3c44ed8385 The alignment of the pointer part of the store instruction may have an
alignment. If that's the case, then we want to make sure that we don't increase
the alignment of the store instruction. Because if we increase it to be "more
aligned" than the pointer, code-gen may use instructions which require a greater
alignment than the pointer guarantees.
<rdar://problem/11043589>

llvm-svn: 152907
2012-03-16 07:40:08 +00:00
Craig Topper
8440abd184 More const-correcting of FixedLenDecoderEmitter.
llvm-svn: 152906
2012-03-16 06:52:56 +00:00
Chandler Carruth
e0a21944a1 Rip out support for 'llvm.noinline'. This thing has a strange history...
It was added in 2007 as the first cut at supporting no-inline
attributes, but we didn't have function attributes of any form at the
time. However, it was added without any mention in the LangRef or other
documentation.

Later on, in 2008, Devang added function notes for 'inline=never' and
then turned them into proper function attributes. From that point
onward, as far as I can tell, the world moved on, and no one has touched
'llvm.noinline' in any meaningful way since.

It's time has now come. We have had better mechanisms for doing this for
a long time, all the frontends I'm aware of use them, and this is just
holding back progress. Given that it was never a documented feature of
the IR, I've provided no auto-upgrade support. If people know of real,
in-the-wild bitcode that relies on this, yell at me and I'll add it, but
I *seriously* doubt anyone cares.

llvm-svn: 152904
2012-03-16 06:10:15 +00:00
Chandler Carruth
1d0b0955da Start removing the use of an ad-hoc 'never inline' set and instead
directly query the function information which this set was representing.
This simplifies the interface of the inline cost analysis, and makes the
always-inline pass significantly more efficient.

Previously, always-inline would first make a single set of every
function in the module *except* those marked with the always-inline
attribute. It would then query this set at every call site to see if the
function was a member of the set, and if so, refuse to inline it. This
is quite wasteful. Instead, simply check the function attribute directly
when looking at the callsite.

The normal inliner also had similar redundancy. It added every function
in the module with the noinline attribute to its set to ignore, even
though inside the cost analysis function we *already tested* the
noinline attribute and produced the same result.

The only tricky part of removing this is that we have to be able to
correctly remove only the functions inlined by the always-inline pass
when finalizing, which requires a bit of a hack. Still, much less of
a hack than the set of all non-always-inline functions was. While I was
touching this function, I switched a heavy-weight set to a vector with
sort+unique. The algorithm already had a two-phase insert and removal
pattern, we were just needlessly paying the uniquing cost on every
insert.

This probably speeds up some compiles by a small amount (-O0 compiles
with lots of always-inline, so potentially heavy libc++ users), but I've
not tried to measure it.

I believe there is no functional change here, but yell if you spot one.
None are intended.

Finally, the direction this is going in is to greatly simplify the
inline cost query interface so that we can replace its implementation
with a much more clever one. Along the way, all the APIs get simplified,
so it seems incrementally good.

llvm-svn: 152903
2012-03-16 06:10:13 +00:00
Craig Topper
7eb05588b8 Const-correct the FixedLenDecoderEmitter. Pass a few things by const reference instead of value to avoid some copying.
llvm-svn: 152899
2012-03-16 05:58:09 +00:00
Chandler Carruth
366e612e2c Pull the implementation of the code metrics out of the inline cost
analysis implementation. The header was already separated. Also cleanup
all the comments in the header to follow a nice modern doxygen form.

There is still plenty of cruft here, but some of that will fall out in
subsequent refactorings and this was an easy step in the right
direction. No functionality changed here.

llvm-svn: 152898
2012-03-16 05:51:52 +00:00
Andrew Trick
8955837ead misched: add DAG edges from vreg defs to ExitSU.
These edges are not really necessary, but it is consistent with the
way we currently create physreg edges. Scheduler heuristics that
expect a DAG edge to the block terminator could benefit from this
change. Although in the future I hope we have a better mechanism for
modeling latency across scheduling regions.

llvm-svn: 152895
2012-03-16 05:04:25 +00:00
Andrew Trick
719339e40f LSR fix: Add isSimplifiedLoopNest to IVUsers analysis.
Only record IVUsers that are dominated by simplified loop
headers. Otherwise SCEVExpander will crash while looking for a
preheader.

I previously tried to work around this in LSR itself, but that was
insufficient. This way, LSR can continue to run if some uses are not
in simple loops, as long as we don't attempt to analyze those users.

Fixes <rdar://problem/11049788> Segmentation fault: 11 in LoopStrengthReduce

llvm-svn: 152892
2012-03-16 03:16:56 +00:00
Craig Topper
60adb4d322 Spacing fixes. Mostly aligning arguments that spilled onto next line with the opening parenthese instead of 2 spaces in.
llvm-svn: 152889
2012-03-16 01:19:24 +00:00
Chad Rosier
f90a9fa7a3 Revert r152705, which reapplied r152486 as this appears to be causing failures
on our internal nightly testers.  So, basically revert r152486 again.

Abbreviated original commit message:
Implement a more intelligent way of spilling uses across an invoke boundary.

It looks as if Chander's inlining work, r152737, exposed an issue.

llvm-svn: 152887
2012-03-16 01:04:00 +00:00
Craig Topper
71e5d799ba Remove unused field NumVariable from Filter class. Even it was needed the same result could be found with VariableInstructions.size(). Also fix some typos in comments.
llvm-svn: 152885
2012-03-16 00:56:01 +00:00
Eli Friedman
0763584d78 In InstCombiner::visitOr, make sure we reverse the operand swap used for checking for or-of-xor operations after those checks; a later check expects that any constant will be in Op1. PR12234.
llvm-svn: 152884
2012-03-16 00:52:42 +00:00
Jim Grosbach
a5d57ea09e ARM optional operand on MRC/MCR assembly instructions.
rdar://11058464

llvm-svn: 152883
2012-03-16 00:45:58 +00:00
Jim Grosbach
77151885af ARM vmrs system registers mvfr0 and mvfr1 handling.
rdar://11058464

llvm-svn: 152881
2012-03-16 00:27:18 +00:00
Eric Christopher
40cd87af9e Do the right thing on NULL uint64 fields.
Patch by Clemens Hammacher!

Fixes PR12243

llvm-svn: 152880
2012-03-16 00:21:54 +00:00
NAKAMURA Takumi
4a8d3b5eb5 Revert r152613 (and r152614), "Inline the d'tor and add an anchor instead." for workaround of g++-4.4's miscompilation.
It caused MSP430DAGToDAGISel::SelectIndexedBinOp() to be miscompiled.
When two ReplaceUses()'s are expanded as inline, vtable in base class is stored to latter (ISelUpdater)ISU.

llvm-svn: 152877
2012-03-16 00:01:55 +00:00