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11f101a800
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8310 Commits

Author SHA1 Message Date
Evan Cheng
11f101a800 Special handling for MMX values being passed in either GPR64 or lower 64-bits of XMM registers. 
llvm-svn: 50289
 2008-04-25 19:11:04 +00:00
Evan Cheng
0fe99f024d Fix MMX_MOVQ2DQrr pattern. It's illegal to do a bitconvert from a smaller type to a larger one. 
llvm-svn: 50278
 2008-04-25 18:19:54 +00:00
Chris Lattner
81742d7a8f add a note 
llvm-svn: 50267
 2008-04-25 17:25:00 +00:00
Evan Cheng
bbbe14502f 80 col violation. 
llvm-svn: 50266
 2008-04-25 17:21:40 +00:00
Evan Cheng
37ca5de3b7 Not checking for intrinsics which do not have a chain operand. 
llvm-svn: 50260
 2008-04-25 08:55:28 +00:00
Evan Cheng
e177dc6696 - Switch from std::set to SmallPtrSet. 
- Add comments.

llvm-svn: 50259
 2008-04-25 08:22:20 +00:00
Evan Cheng
39ae78cadb MMX argument passing fixes: 
On Darwin / Linux x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2].                                                                                                                                      
On Darwin / Linux x86-32, v1i64 values are passed in memory.                                                                                                                                                    
On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7].                                                                                                                                     
On Darwin x86-64, v1i64 values are passed in 64-bit GPRs.

llvm-svn: 50257
 2008-04-25 07:56:45 +00:00
Chris Lattner
8c9f6c929a Loosen up an assertion to allow intrinsics. I really have no 
idea what this code (findNonImmUse) does, so I'm only guessing 
that this is the right thing.  It would be really really nice
if this had comments and perhaps switched to SmallPtrSet
(hint hint) :)

This fixes rdar://5886601, a crash on gcc.target/i386/sse4_1-pblendw.c

llvm-svn: 50252
 2008-04-25 05:13:01 +00:00
Evan Cheng
484060ba4a Fix bug in x86 memcpy / memset lowering. If there are trailing bytes not handled by rep instructions, a new memcpy / memset is introduced for them. However, since source / destination addresses are already adjusted, their offsets should be zero. 
llvm-svn: 50239
 2008-04-25 00:26:43 +00:00
Dan Gohman
6054efc488 Make these variables static. 
llvm-svn: 50196
 2008-04-23 23:15:23 +00:00
Anton Korobeynikov
ac6f6045bb Drop dead includes 
llvm-svn: 50192
 2008-04-23 22:44:03 +00:00
Anton Korobeynikov
361e5f9eee Adjust option names for C++ backend 
llvm-svn: 50190
 2008-04-23 22:37:03 +00:00
Anton Korobeynikov
193b7db7c7 First step of implementing PR1538: move llvm2cpp logic to new 'target' 
llvm-svn: 50189
 2008-04-23 22:29:24 +00:00
Dan Gohman
5df2f2c2e7 Initial CBE support for multiple return values. 
llvm-svn: 50187
 2008-04-23 21:49:29 +00:00
Anton Korobeynikov
4b572e0f73 Fix typo 
llvm-svn: 50169
 2008-04-23 18:24:25 +00:00
Anton Korobeynikov
372e69e652 Only allow increase of max alignment value 
llvm-svn: 50168
 2008-04-23 18:23:50 +00:00
Anton Korobeynikov
47a8e6d7a9 Be over-conservative: scan for all used virtual registers and calculate maximal stack alignment in assumption, that there will be spill of vector register. 
llvm-svn: 50167
 2008-04-23 18:23:30 +00:00
Anton Korobeynikov
e7754f758b Add X86 Maximal Stack Alignment Calculator Pass before RA 
llvm-svn: 50166
 2008-04-23 18:23:05 +00:00
Anton Korobeynikov
158f614c67 Do proper book-keeping of offsets and prologue/epilogue code for stack realignment 
llvm-svn: 50163
 2008-04-23 18:21:27 +00:00
Anton Korobeynikov
1f07315f47 If stack realignment is used - incoming args will use EBP as base register and locals - ESP 
llvm-svn: 50162
 2008-04-23 18:21:02 +00:00
Anton Korobeynikov
5079553b9d Eastimate required stack alignment early, so we can decide, whether we will need frame pointer or not 
llvm-svn: 50161
 2008-04-23 18:20:17 +00:00
Anton Korobeynikov
492641d67f Cleanup 
llvm-svn: 50159
 2008-04-23 18:19:23 +00:00
Anton Korobeynikov
87325bfdf5 Simplify 
llvm-svn: 50158
 2008-04-23 18:18:36 +00:00
Anton Korobeynikov
73935826d4 Make stack alignment options global for all targets 
llvm-svn: 50157
 2008-04-23 18:18:10 +00:00
Anton Korobeynikov
6a59c959ca Provide option for enabling-disabling stack realignment 
llvm-svn: 50156
 2008-04-23 18:17:11 +00:00
Anton Korobeynikov
fc59ae78e0 Disable stack realignment for functions with dynamic-sized alloca's 
llvm-svn: 50155
 2008-04-23 18:16:43 +00:00
Anton Korobeynikov
11851230a9 Provide ABI-correct stack alignment 
llvm-svn: 50154
 2008-04-23 18:16:16 +00:00
Anton Korobeynikov
7e6850d1a1 Provide convenient helpers for some operations 
llvm-svn: 50153
 2008-04-23 18:15:48 +00:00
Anton Korobeynikov
71adb49389 Whitespace cleanup 
llvm-svn: 50152
 2008-04-23 18:15:11 +00:00
Dan Gohman
93b5be1824 Implement an x86-64 ABI detail of passing structs by hidden first 
argument. The x86-64 ABI requires the incoming value of %rdi to
be copied to %rax on exit from a function that is returning a
large C struct.

Also, add a README-X86-64 entry detailing the missed optimization
opportunity and proposing an alternative approach.

llvm-svn: 50075
 2008-04-21 23:59:07 +00:00
Dan Gohman
105b523786 Fix the encoding of the MMX movd that moves from MMX to 64-bit GPR. 
llvm-svn: 50053
 2008-04-21 19:52:29 +00:00
Chris Lattner
3117d33f74 Add an ugly note. 
llvm-svn: 50029
 2008-04-21 04:46:30 +00:00
Nicolas Geoffray
036fb2bebf Don't forget to update the current operand when getting the size of an instruction. 
llvm-svn: 50007
 2008-04-20 23:36:47 +00:00
Chris Lattner
2c5b96fbee A better fix for my previous patch, MOVZQI2PQIrr just requires SSE2. 
llvm-svn: 49986
 2008-04-20 05:52:46 +00:00
Chris Lattner
f390d62b7f Switch to using Simplified ConstantFP::get API. 
llvm-svn: 49977
 2008-04-20 00:41:09 +00:00
Evan Cheng
f583b3feb6 64-bit atomic operations. 
llvm-svn: 49949
 2008-04-19 02:30:38 +00:00
Evan Cheng
1c54ebbe2f Also LXCHG64 -> XCHG64rm. 
llvm-svn: 49948
 2008-04-19 02:05:42 +00:00
Evan Cheng
09e77f6b83 PPC32 atomic operations. 
llvm-svn: 49947
 2008-04-19 01:30:48 +00:00
Evan Cheng
b1d240f973 xchg which references a memory operand does not need to lock prefix. Atomicity is guaranteed. 
llvm-svn: 49946
 2008-04-19 01:20:30 +00:00
Dan Gohman
98ca33cb59 Fix the handling of va_copy on x86-64. As of llvm-gcc r49920 
llvm-gcc is now lowering va_copy on x86-64, so this completes
the fix for PR2230.

llvm-svn: 49922
 2008-04-18 20:55:41 +00:00
Evan Cheng
a626e13995 - Fix atomic operation JIT encoding. 
- Remove unused instructions.

llvm-svn: 49921
 2008-04-18 20:55:36 +00:00
Evan Cheng
2b03674feb Also support Intel asm syntax. 
llvm-svn: 49878
 2008-04-17 23:35:10 +00:00
Evan Cheng
0b36ca5023 Fix assembly code for atomic operations. 
llvm-svn: 49869
 2008-04-17 21:26:35 +00:00
Evan Cheng
e2e899b5c2 Don't forget about sub-register indices when rematting instructions. 
llvm-svn: 49830
 2008-04-16 23:44:44 +00:00
Dale Johannesen
d19ab27ee1 Unbreak build on x86-64. 
llvm-svn: 49822
 2008-04-16 22:24:33 +00:00
Nicolas Geoffray
1f3211af01 Correlate stubs with functions in JIT: when emitting a stub, the JIT tells the memory manager which function 
the stub will resolve.

llvm-svn: 49814
 2008-04-16 20:46:05 +00:00
Nicolas Geoffray
82baa2d2c6 Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented 
llvm-svn: 49809
 2008-04-16 20:10:13 +00:00
Evan Cheng
341bed7210 Initialize X863DNowLevel. 
llvm-svn: 49808
 2008-04-16 19:03:02 +00:00
Roman Levenstein
728d59166f Ongoing work on improving the instruction selection infrastructure: 
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.

Patch is approved by Dan Gohman.

llvm-svn: 49795
 2008-04-16 16:15:27 +00:00
Dan Gohman
be8f2b452b Add support for the form of the SSE41 extractps instruction that 
puts its result in a 32-bit GPR.

llvm-svn: 49762
 2008-04-16 02:32:24 +00:00