1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 06:22:56 +02:00
Commit Graph

119235 Commits

Author SHA1 Message Date
Rafael Espindola
122834dffd Print the visibility of available_externally functions.
We were already printing it for declarations, but not available_externally.

llvm-svn: 242027
2015-07-13 13:55:18 +00:00
Manuel Klimek
7a05b84c26 Revert r241981 "Revert "Revert r236894 "[BasicAA] Fix zext & sext handling"""
The repros from PR23626 still fail.

llvm-svn: 242025
2015-07-13 13:50:55 +00:00
Elena Demikhovsky
618bae6f38 AVX-512: Added all AVX-512 forms of Vector Convert for Float/Double/Int/Long types.
In this patch I have only encoding. Intrinsics and DAG lowering will be in the next patch.
I temporary removed the old intrinsics test (just to split this patch).
Half types are not covered here.

Differential Revision: http://reviews.llvm.org/D11134

llvm-svn: 242023
2015-07-13 13:26:20 +00:00
Pawel Bylica
58ac32c75f [llvm-stress] Remove unneeded llvm:: prefix. NFC.
llvm-svn: 242020
2015-07-13 11:25:56 +00:00
Daniel Sanders
01dbeab210 [mips] Explained the 'w' modifier in the Inline Assembler documentation.
It exists for compatibility with GCC which requires it to print MSA registers
for the 'f' constraint. Although LLVM doesn't need it, the 'w' modifier should
still be used for portability between the two compilers.

llvm-svn: 242015
2015-07-13 09:24:21 +00:00
Jingyue Wu
248d90dab7 [LSR] don't attempt to promote ephemeral values to indvars
Summary:
This at least saves compile time. I also encountered a case where
ephemeral values affect whether other variables are promoted, causing
performance issues. It may be a bug in LSR, but I didn't manage to
reduce it yet. Anyhow, I believe it's in general not worth considering
ephemeral values in LSR.

Reviewers: atrick, hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11115

llvm-svn: 242011
2015-07-13 03:28:53 +00:00
David Majnemer
31685d95b1 [InstSimplify] Teach InstSimplify how to simplify extractelement
llvm-svn: 242008
2015-07-13 01:15:53 +00:00
David Majnemer
bbc2fd617f [InstSimplify] Teach InstSimplify how to simplify extractvalue
llvm-svn: 242007
2015-07-13 01:15:46 +00:00
Yaron Keren
ded186e457 Fix PR24099 reported by Tomas Brukner.
llvm-svn: 241997
2015-07-12 20:40:41 +00:00
Renato Golin
943837bfb6 [ARM] Add support for nest attribute using r12
Register r12 ('ip') is used by GCC for this purpose
and hence is used here. As discussed on the GCC mailing
list, the register choice is an ABI issue and so
choosing the same register as GCC means
__builtin_call_with_static_chain is compatible.

A similar patch has just gone in the AArch64 backend,
so this is just the ARM counterpart, following the same
discussion.

Patch by Stephen Cross.

llvm-svn: 241996
2015-07-12 18:16:40 +00:00
Simon Pilgrim
e3726fba14 [X86][SSE] Tidied up vector extend/truncation tests. NFCI.
llvm-svn: 241995
2015-07-12 17:40:49 +00:00
Simon Pilgrim
d449534bf6 [X86][SSE] (V)PMINSB is commutable.
(V)PMINSB is no different to the other (V)PMIN/(V)PMAX B/D/W instructions - it is fully commutable.

llvm-svn: 241994
2015-07-12 16:44:11 +00:00
Simon Pilgrim
0566da6cf7 Trim trailing whitespaces. NFC.
llvm-svn: 241990
2015-07-12 11:17:33 +00:00
Simon Pilgrim
88d91ba7dc [X86][SSE] Vectorized v4i32 non-uniform shifts.
While the v4i32 shl operation is already vectorized using a cvttps2dq/pmulld pattern, the lshr/ashr opeations are still scalarized.

This patch adds vectorization support for non-uniform v4i32 shift operations - it splats constant shift amounts to allow them to use the immediate sse shift instructions, or extracts/zero-extends non-constant shift amounts. The individual results are then blended together.

Differential Revision: http://reviews.llvm.org/D11063

llvm-svn: 241989
2015-07-12 11:15:19 +00:00
David Majnemer
243b5516a7 [LICM] Don't try to sink values out of loops without any exits
There is no suitable basic block to sink instructions in loops without
exits.  The only way an instruction in a loop without exits can be used
is as an incoming value to a PHI.  In such cases, the incoming block for
the corresponding value is unreachable.

This fixes PR24013.

Differential Revision: http://reviews.llvm.org/D10903

llvm-svn: 241987
2015-07-12 03:53:05 +00:00
Hal Finkel
568c3a41af [PowerPC] Make use of the TargetRecip system
r238842 added the TargetRecip system for controlling use of reciprocal
estimates for sqrt and division using a set of parameters that can be set by
the frontend. Clang now supports a sophisticated -mrecip option, and this will
allow that option to effectively control the relevant code-generation
functionality of the PPC backend.

llvm-svn: 241985
2015-07-12 02:33:57 +00:00
Hal Finkel
f91045042a [PowerPC] Support the nest parameter attribute
This adds support for the 'nest' attribute, which allows the static chain
register to be set for functions calls under non-Darwin PPC/PPC64 targets. r11
is the chain register (which the PPC64 ELF ABI calls the "environment
pointer"). For indirect calls under PPC64 ELFv1, this would normally be loaded
from the function descriptor, but providing an explicit 'nest' parameter will
override that process and use the value provided.

This allows __builtin_call_with_static_chain to work as expected on PowerPC.

llvm-svn: 241984
2015-07-12 00:37:44 +00:00
Renato Golin
ec04c2efbd Revert "[ExecutionEngine] Use std::function rather than a function pointer for the LazyFunctionCreator."
This reverts commit r241962, as it was breaking all ARM buildbots.

It also reverts the two subsequent related commits:

r241974: "[ExecutionEngine] Add a static cast to the unittest for r241962 to suppress a warning."

r241973: "[ExecutionEngine] Remove cruft and fix a couple of warnings in the test case for r241962."
llvm-svn: 241983
2015-07-11 13:42:48 +00:00
Hal Finkel
d776deb484 Revert "Revert r236894 "[BasicAA] Fix zext & sext handling""
r236894 caused PR23626 (Clang miscompiles webkit's base64 decoder), and was
reverted in r237984. This reapplies the patch with an additional test case for
PR23626 and the associated fix (both scales and offsets in the
BasicAliasAnalysis::constantOffsetHeuristic should initially be zero).

Patch by Nick White, thanks!

llvm-svn: 241981
2015-07-11 11:04:54 +00:00
Hal Finkel
ef984b764f Move getStrideFromPointer and friends from LoopVectorize to VectorUtils
The following functions are moved from the LoopVectorizer to VectorUtils:

  - getGEPInductionOperand
  - stripGetElementPtr
  - getUniqueCastUse
  - getStrideFromPointer

These used to be static functions in LoopVectorize, but will also be used by
the upcoming loop versioning LICM transformation.

Patch by Ashutosh Nema!

llvm-svn: 241980
2015-07-11 10:52:42 +00:00
Igor Laevsky
05bff16edd Add argmemonly attribute.
This change adds new attribute called "argmemonly". Function marked with this attribute can only access memory through it's argument pointers. This attribute directly corresponds to the "OnlyAccessesArgumentPointees" ModRef behaviour in alias analysis.

Differential Revision: http://reviews.llvm.org/D10398

llvm-svn: 241979
2015-07-11 10:30:36 +00:00
Yaron Keren
bb75077616 Fix include guard typo introduced in r239315.
llvm-svn: 241978
2015-07-11 09:40:28 +00:00
Owen Anderson
c4c85c5ebc Define a new intrinsic @llvm.canonicalize.
This is used the canonicalize floating point values, which is useful for
implementing certain numeric primitives.  See the LangRef changes for
the full details of its semantics.

llvm-svn: 241977
2015-07-11 07:01:27 +00:00
Chandler Carruth
c98a5f7bff [PM/AA] Completely remove the AliasAnalysis::copyValue interface.
No in-tree alias analysis used this facility, and it was not called in
any particularly rigorous way, so it seems unlikely to be correct.

Note that one of the only stateful AA implementations in-tree,
GlobalsModRef is completely broken currently (and any AA passes like it
are equally broken) because Module AA passes are not effectively
invalidated when a function pass that fails to update the AA stack runs.

Ultimately, it doesn't seem like we know how we want to build stateful
AA, and until then trying to support and maintain correctness for an
untested API is essentially impossible. To that end, I'm planning to rip
out all of the update API. It can return if and when we need it and know
how to build it on top of the new pass manager and as part of *tested*
stateful AA implementations in the tree.

Differential Revision: http://reviews.llvm.org/D10889

llvm-svn: 241975
2015-07-11 04:39:00 +00:00
Lang Hames
ed1282388e [ExecutionEngine] Add a static cast to the unittest for r241962 to suppress a
warning.

llvm-svn: 241974
2015-07-11 02:07:28 +00:00
Lang Hames
f7254a68ab [ExecutionEngine] Remove cruft and fix a couple of warnings in the test case for
r241962.

llvm-svn: 241973
2015-07-11 01:59:04 +00:00
Tyler Nowicki
21a81c1187 Renamed some uses of unroll to interleave in the vectorizer.
llvm-svn: 241971
2015-07-11 00:31:11 +00:00
Duncan P. N. Exon Smith
bf6cb66b8a MC: Shrink MCDwarfLoc/MCLineEntry
Drop 8 bytes off of `MCDwarfLoc` by restricting the `Isa`, `Column`, and
`Flags` members to appropriate sizes (from `DWARFDebugLine::Row`).
Saves a little over 0.5% off the heap of llc with no real functionality
change.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 241970
2015-07-10 23:55:34 +00:00
Adrian Prantl
f7151b9d47 Clean up the comments in DIBuilder.h to adhere to the coding standards
a little more.

llvm-svn: 241969
2015-07-10 23:31:08 +00:00
Adrian Prantl
a2fcdc94f7 Revert "Clean up the comments in DIBuilder.h to adhere to the coding standards"
This reverts commit 241965. (I accidentally committed too much).

llvm-svn: 241968
2015-07-10 23:31:05 +00:00
Adrian Prantl
cf2e5154cf Cleanup a couple of comments in DIBuilder.cpp
llvm-svn: 241966
2015-07-10 23:26:02 +00:00
Adrian Prantl
eab8adaf44 Clean up the comments in DIBuilder.h to adhere to the coding standards
a little more.

llvm-svn: 241965
2015-07-10 23:25:54 +00:00
Lang Hames
e4a548dd26 [ExecutionEngine] Use std::function rather than a function pointer for the
LazyFunctionCreator.

Patch by Pierre-Andre Saulais. Thanks Pierre!

llvm-svn: 241962
2015-07-10 22:56:47 +00:00
Duncan P. N. Exon Smith
613aeda5aa MC: Only allow changing feature bits in MCSubtargetInfo
Disallow all mutation of `MCSubtargetInfo` expect the feature bits.

Besides deleting the assignment operators -- which were dead "code" --
this restricts `InitMCProcessorInfo()` to subclass initialization
sequences, and exposes a new more limited function called
`setDefaultFeatures()` for use by the ARMAsmParser `.cpu` directive.

There's a small functional change here: ARMAsmParser used to adjust
`MCSubtargetInfo::CPUSchedModel` as a side effect of calling
`InitMCProcessorInfo()`, but I've removed that suspicious behaviour.
Since the AsmParser shouldn't be doing any scheduling, there shouldn't
be any observable change...

llvm-svn: 241961
2015-07-10 22:52:15 +00:00
Matt Arsenault
63c4366935 AMDGPU: Fix chains for memory ops dependent on argument loads
Most loads and stores are derived from pointers derived from
a kernel argument load inserted during argument lowering.
This was just using the EntryToken chain for the argument loads,
and any users of these loads were also on the EntryToken chain.

Return the chain of the lowered argument load so that dependent loads
end up on the correct chain.

No test since I'm not aware of any case where this actually
broke.

llvm-svn: 241960
2015-07-10 22:51:36 +00:00
Alex Lorenz
3307a878a0 MIR Serialization: Serialize the virtual register operands.
Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D11005

llvm-svn: 241959
2015-07-10 22:51:20 +00:00
David Majnemer
bd93934527 [IR] Switch static const to an enum to silence MSVC linker warnings
Integral class statics are handled oddly in MSVC, we don't need them
in this case, use an enum instead.

llvm-svn: 241958
2015-07-10 22:46:02 +00:00
Duncan P. N. Exon Smith
91136071cc MC: Remove MCSubtargetInfo() default constructor
Force all creators of `MCSubtargetInfo` to immediately initialize it,
merging the default constructor and the initializer into an initializing
constructor.  Besides cleaning up the code a little, this makes it clear
that the initializer is never called again later.

Out-of-tree backends need a trivial change: instead of calling:

    auto *X = new MCSubtargetInfo();
    InitXYZMCSubtargetInfo(X, ...);
    return X;

they should call:

    return createXYZMCSubtargetInfoImpl(...);

There's no real functionality change here.

llvm-svn: 241957
2015-07-10 22:43:42 +00:00
Duncan P. N. Exon Smith
4c212cccb6 MC: Remove MCSubtargetInfo::InitCPUSched()
Remove all calls to `MCSubtargetInfo::InitCPUSched()` and merge its body
into the only relevant caller, `MCSubtargetInfo::InitMCProcessorInfo()`.
We were only calling the former after explicitly calling the latter with
the same CPU; it's confusing to have both methods exposed.

Besides a minor (surely unmeasurable) speedup in ARM and X86 from
avoiding running the logic twice, no functionality change.

llvm-svn: 241956
2015-07-10 22:33:01 +00:00
Bjorn Steinbrink
4de6eb776a [InstCombine] Actually combine AA metadata when replacing one load with another
Fixes PR24083

llvm-svn: 241955
2015-07-10 22:30:17 +00:00
Matt Arsenault
488b1c3ea7 AMDGPU: Use requested chain when lowering arguments
No test since I'm not aware of any case where this will
end up being a different chain.

llvm-svn: 241954
2015-07-10 22:28:41 +00:00
Matthias Braun
b7111828fd ARM: Use SpecificBumpPtrAllocator to fix leak introduced in r241920
llvm-svn: 241951
2015-07-10 22:23:57 +00:00
Reid Kleckner
1acdc5b15e [SEH] Push reloads of the SEH code past phi nodes
This in turn would sometimes introduce new cleanupblocks that didn't
previously exist. The uses were being introduced by SSA value demotion.
We actually want to *promote* uses of EH pointers and selectors, so I
added some spcecial casing to avoid demoting such instructions.  This is
getting overly complicated, but hopefully we'll come along and delete it
in the new representation.

llvm-svn: 241950
2015-07-10 22:21:54 +00:00
Duncan P. N. Exon Smith
5d98694c04 Add <type_traits> for is_pod, fixing r241947
llvm-svn: 241949
2015-07-10 22:17:49 +00:00
Matt Arsenault
e1819eb4e3 DAGCombiner: Assume invariant load cannot alias a store
The motivation is to allow GatherAllAliases / FindBetterChain
to not give up on dependent loads of a pointer from constant memory.

This is important for AMDGPU, because most loads are pointers
derived from a load of a kernel argument from constant memory.

llvm-svn: 241948
2015-07-10 22:17:40 +00:00
Duncan P. N. Exon Smith
a9909befd9 MC: Remove the copy of MCSchedModel in MCSubtargetInfo
`MCSchedModel` is large.  Make `MCSchedModel::GetDefaultSchedModel()`
return by-reference instead of by-value, so we can store a pointer in
`MCSubtargetInfo::CPUSchedModel` instead of a copy.

Note: since `MCSchedModel` is POD, this doesn't create a static
constructor.

llvm-svn: 241947
2015-07-10 22:13:43 +00:00
Quentin Colombet
74a81286b5 [ShrinkWrap][PEI] Do not insert epilogue for unreachable blocks.
Although this is not incorrect to insert such code, it is useless
and it hurts the binary size.

llvm-svn: 241946
2015-07-10 22:09:55 +00:00
David Majnemer
dc108016fc [MC] Switch static const to an enum to silence MSVC linker warnings
Integral class statics are handled oddly in MSVC, we don't need them in
this case, use an enum instead.

llvm-svn: 241945
2015-07-10 21:50:04 +00:00
Evgeniy Stepanov
b389e3c7f6 Fix AArch64 prologue for empty frame with dynamic allocas.
Fixes PR23804: assertion failure in emitPrologue in the case of a
function with an empty frame and a dynamic alloca that needs stack
realignment. This is a typical case for AddressSanitizer.

llvm-svn: 241943
2015-07-10 21:24:07 +00:00
Jingyue Wu
5999dcbfb0 [TTI] BasicTTIImpl assumes no vector registers
Summary:
Following the discussion on r241884, it's more reasonable to assume that a
target has no vector registers by default instead of letting every such
target overrides getNumberOfRegisters.

Therefore, this patch modifies BasicTTIImpl::getNumberOfRegisters to
return 0 when Vector is true, and partially reverts r241884 which
modifies NVPTXTTIImpl::getNumberOfRegisters.

It also fixes a performance bug in LoopVectorizer. Even if a target has
no vector registers, vectorization may still help ILP. So, we need both
checks to be false before disabling loop vectorization all together.

Reviewers: hfinkel

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D11108

llvm-svn: 241942
2015-07-10 21:14:54 +00:00