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Author SHA1 Message Date
Chris Lattner
140be98ab8 Don't emit pseudo instructions! 
llvm-svn: 26926
 2006-03-21 20:19:37 +00:00
Chris Lattner
128089ae91 Add a hacky workaround for crashes due to vectors live across blocks. 
Note that this code won't work for vectors that aren't legal on the
target.  Improvements coming.

llvm-svn: 26925
 2006-03-21 19:20:37 +00:00
Nate Begeman
4bd73df4bd Update readme 
llvm-svn: 26924
 2006-03-21 18:58:20 +00:00
Chris Lattner
df3a0c94e2 Add an integer splat test 
llvm-svn: 26923
 2006-03-21 18:27:27 +00:00
Chris Lattner
414fed4108 Print absolute memory references like this: 
lwz r2, 8(0)
instead of this:
       lwz r2, 8(r0)

This fixes the llc/llc-beta failures on PPC last night.

llvm-svn: 26922
 2006-03-21 17:21:13 +00:00
Evan Cheng
a56ed39464 Combine 2 entries 
llvm-svn: 26921
 2006-03-21 07:18:26 +00:00
Evan Cheng
f8d8d45ff8 Add a note about x86 register coallescing 
llvm-svn: 26920
 2006-03-21 07:12:57 +00:00
Evan Cheng
6ec225863c - Remove scalar to vector pseudo ops. They are just wrong. 
- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS
and MOVAPD. Mark them as move instructions and *hope* they will be deleted.

llvm-svn: 26919
 2006-03-21 07:09:35 +00:00
Chris Lattner
4da595f4c8 minor code simplification 
llvm-svn: 26918
 2006-03-21 06:42:58 +00:00
Chris Lattner
6417236c41 With Evan's latest tblgen patch, this code is obsolete, thanks Evan! 
llvm-svn: 26917
 2006-03-21 06:37:40 +00:00
Reid Spencer
fcd146d8c2 Cause the various warnings list to be generated via a <ul> list with 
text enclosed in <tt>. This ensures that (a) the text is in a fixed width
font (to indicated generated text) and (b) the text wraps without causing
the page width to be extended. The main result of this is that the report
will wrap to conform to the window size in which it is displayed instead of
having a very wide length if a warning message is long.

llvm-svn: 26916
 2006-03-21 01:21:39 +00:00
Chris Lattner
eaf4338f8d Document ENABLE_ASSERTIONS=1 
llvm-svn: 26915
 2006-03-21 01:10:57 +00:00
Chris Lattner
79d9b6db8a Enable assertions to be enabled in release builds by building with 
make ENABLE_OPTIMIZED=1 ENABLE_ASSERTIONS=1

llvm-svn: 26914
 2006-03-21 01:06:41 +00:00
Chris Lattner
acb2506622 When codegen'ing vector MUL using VFMADD, *add* the 0, don't *mul* the 0. 
llvm-svn: 26913
 2006-03-21 00:51:38 +00:00
Chris Lattner
9e611a25c7 minor note 
llvm-svn: 26912
 2006-03-21 00:47:09 +00:00
Evan Cheng
a4db61ddc1 x86 ISD::SCALAR_TO_VECTOR support. 
llvm-svn: 26911
 2006-03-21 00:33:35 +00:00
Evan Cheng
d90127aafd Junk unused vector register classes. 
llvm-svn: 26910
 2006-03-21 00:30:59 +00:00
Evan Cheng
e87add642d The node wrapped in PatLeaf<> should be treated as a leaf even if it isn't 
one, i.e. don't select it.

llvm-svn: 26909
 2006-03-20 22:53:06 +00:00
Chris Lattner
cdc4657988 Handle constant addresses more efficiently, folding the low bits into the 
disp field of the load/store if possible.  This compiles
CodeGen/PowerPC/load-constant-addr.ll to:

_test:
        lis r2, 2838
        lfs f1, 26848(r2)
        blr

instead of:

_test:
        lis r2, 2838
        ori r2, r2, 26848
        lfs f1, 0(r2)
        blr

llvm-svn: 26908
 2006-03-20 22:38:22 +00:00
Chris Lattner
a498dd25d9 remove dead variable 
llvm-svn: 26907
 2006-03-20 22:37:23 +00:00
Chris Lattner
b59ca7a728 new testcase 
llvm-svn: 26906
 2006-03-20 22:37:05 +00:00
Nate Begeman
31da564faa Move some common data structures between dom and pdom into the base class 
llvm-svn: 26905
 2006-03-20 19:32:48 +00:00
Chris Lattner
978628896b Fix a couple of bugs in permute/splat generate, thanks to Nate for actually 
figuring these out! :)

llvm-svn: 26904
 2006-03-20 18:26:51 +00:00
Evan Cheng
26861ff2af Option -enable-x86-lsr has been removed 
llvm-svn: 26903
 2006-03-20 18:26:11 +00:00
Chris Lattner
5c994b8c63 reenable this hack, the tblgen version isn't quite ready 
llvm-svn: 26902
 2006-03-20 17:54:43 +00:00
Chris Lattner
fb0e160aa5 Fix the pattern for VADDUWM, add i32 splat 
llvm-svn: 26901
 2006-03-20 17:51:58 +00:00
Evan Cheng
57da1afbc8 Use tblgen'd VECTOR_SHUFFLE selection code. 
llvm-svn: 26900
 2006-03-20 08:14:16 +00:00
Evan Cheng
38a1075865 It should be ok for a xform output type to be different from input type. 
llvm-svn: 26899
 2006-03-20 08:09:17 +00:00
Chris Lattner
dc3605efdb Add support for generating vspltw, instead of a vperm instruction with a 
constant pool load.  This generates significantly nicer code for splats.

When tblgen gets bugfixed, we can remove the custom selection code.

llvm-svn: 26898
 2006-03-20 06:51:10 +00:00
Chris Lattner
8faa2cf693 Implement PPC::isSplatShuffleMask and PPC::getVSPLTImmediate. 
llvm-svn: 26897
 2006-03-20 06:37:44 +00:00
Chris Lattner
4b7aa59bbc fix duplicate definition errors 
llvm-svn: 26896
 2006-03-20 06:33:01 +00:00
Chris Lattner
09ede9ec9f Add a build_vector node 
llvm-svn: 26895
 2006-03-20 06:18:01 +00:00
Chris Lattner
1cdeda1c5a Check in some intermediate code that adds a skeleton for matching vsplt* 
instructions

llvm-svn: 26894
 2006-03-20 06:15:45 +00:00
Evan Cheng
c63d434203 Move a few things around. 
llvm-svn: 26893
 2006-03-20 06:04:52 +00:00
Evan Cheng
f0effde00d Copy matching pattern's output type info to instruction result pattern. 
The instruction patterns do not contain enough information to resolve the
exact type of the destination if it of a generic vector type.

llvm-svn: 26892
 2006-03-20 06:04:09 +00:00
Chris Lattner
5892479894 add vector_shuffle 
llvm-svn: 26891
 2006-03-20 05:40:45 +00:00
Chris Lattner
eb65663732 Add a new SDTCisIntVectorOfSameSize type constraint 
llvm-svn: 26890
 2006-03-20 05:39:48 +00:00
Chris Lattner
c230af9810 fix typo 
llvm-svn: 26889
 2006-03-20 05:05:55 +00:00
Chris Lattner
bea056ecf2 add vsplat instructions, fix sched description for vperm 
llvm-svn: 26888
 2006-03-20 04:47:33 +00:00
Chris Lattner
0e56cf0d94 Custom lower arbitrary VECTOR_SHUFFLE's to VPERM. 
TODO: leave specific ones as VECTOR_SHUFFLE's and turn them into specialized
operations like vsplt*

llvm-svn: 26887
 2006-03-20 01:53:53 +00:00
Chris Lattner
65e6e12dca Claim to have v16i8 for perm masks 
llvm-svn: 26886
 2006-03-20 01:53:02 +00:00
Chris Lattner
9fd8618130 If a target supports splatting with SHUFFLE_VECTOR, lower to it from BUILD_VECTOR(x,x,x,x) 
llvm-svn: 26885
 2006-03-20 01:52:29 +00:00
Chris Lattner
9fc969612c TargetData doesn't know the alignment of vectors :( 
llvm-svn: 26884
 2006-03-20 01:51:46 +00:00
Chris Lattner
6f502da274 add the vperm instruction 
llvm-svn: 26883
 2006-03-20 01:00:56 +00:00
Chris Lattner
a3663c3dbb Add some helper methods 
llvm-svn: 26882
 2006-03-20 00:55:52 +00:00
Chris Lattner
c0f029cf63 Add another helper 
llvm-svn: 26881
 2006-03-20 00:20:30 +00:00
Chris Lattner
529a9121d4 Add very basic support for VECTOR_SHUFFLE 
llvm-svn: 26880
 2006-03-19 23:56:04 +00:00
Chris Lattner
0b7ec34646 add a node 
llvm-svn: 26879
 2006-03-19 23:42:51 +00:00
Chris Lattner
8e89272e96 Add a helper method 
llvm-svn: 26878
 2006-03-19 23:41:32 +00:00
Chris Lattner
9a87d3e90d add a note with a testcase 
llvm-svn: 26877
 2006-03-19 22:27:41 +00:00