Jim Grosbach
1476bfec1e
BR_JTadd is ARM-only, so use the proper pseudo class to get the predicate.
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llvm-svn: 119918
2010-11-21 01:26:01 +00:00
Rafael Espindola
ee6aea622f
Handle PCRel relocations with absolute values. Fixes PR8656.
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llvm-svn: 119917
2010-11-21 00:48:25 +00:00
Chris Lattner
ba1cc33676
Implement PR8644: forwarding a memcpy value to a byval,
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allowing the memcpy to be eliminated.
Unfortunately, the requirements on byval's without explicit
alignment are really weak and impossible to predict in the
mid-level optimizer, so this doesn't kick in much with current
frontends. The fix is to change clang to set alignment on all
byval arguments.
llvm-svn: 119916
2010-11-21 00:28:59 +00:00
Bill Wendling
834a3bfb92
A few more thumb instruction MC encodings.
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llvm-svn: 119913
2010-11-20 22:52:33 +00:00
Eric Christopher
38b8cfea6a
Rewrite address handling to use a structure with all the possible address
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mode variables. Handle frame indexes in load/store and allocas again.
llvm-svn: 119912
2010-11-20 22:38:27 +00:00
Eric Christopher
5a99947b98
STRH only needs the additional operand, not t2STRH. Also invert conditional
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to match the one from the load emitter above.
llvm-svn: 119911
2010-11-20 22:01:38 +00:00
Benjamin Kramer
9141603779
Simplify code. No change in functionality.
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llvm-svn: 119908
2010-11-20 18:43:35 +00:00
Anton Korobeynikov
e88ba0f100
Make this compile on case-sensitive file systemsw
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llvm-svn: 119905
2010-11-20 16:14:57 +00:00
Anton Korobeynikov
ff8c52bd51
Move some more hooks to TargetFrameInfo
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llvm-svn: 119904
2010-11-20 15:59:32 +00:00
Benjamin Kramer
c99bab43c9
Silence Release build warnings about unused functions.
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llvm-svn: 119903
2010-11-20 15:53:24 +00:00
Duncan Sands
028cf0619e
On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics,
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so don't claim they are. They are allocated using DAG.getNode, so attempts
to access MemSDNode fields results in reading off the end of the allocated
memory. This fixes crashes with "llc -debug" due to debug code trying to
print MemSDNode fields for these barrier nodes (since the crashes are not
deterministic, use valgrind to see this). Add some nasty checking to try
to catch this kind of thing in the future.
llvm-svn: 119901
2010-11-20 11:25:00 +00:00
Andrew Trick
3166f72d7a
Removing the useless test that I added recently. It was meant as an example, but not complicated enough to merit another test.
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llvm-svn: 119898
2010-11-20 07:26:51 +00:00
Andrew Trick
189c10021d
RABasic fix. Regalloc is responsible for updating block live ins.
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llvm-svn: 119896
2010-11-20 02:57:05 +00:00
Andrew Trick
39d05a622e
Whitespace.
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llvm-svn: 119895
2010-11-20 02:43:55 +00:00
Bill Wendling
00481555e0
Add more Thumb add instruction encodings.
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llvm-svn: 119883
2010-11-20 01:18:47 +00:00
Bill Wendling
4fb2131b0a
Add Thumb encodings for some add instructions.
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llvm-svn: 119882
2010-11-20 01:00:29 +00:00
Bill Wendling
cd27d03d93
Add more encodings for Thumb instructions.
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llvm-svn: 119881
2010-11-20 00:53:35 +00:00
Bill Wendling
2271583883
Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the same
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value that the one in ARMMCCodeEmitter.cpp does.
llvm-svn: 119878
2010-11-20 00:26:37 +00:00
Bill Wendling
55c499847a
Check for _setjmp too, because it's also used.
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llvm-svn: 119875
2010-11-20 00:03:09 +00:00
Jim Grosbach
b2b99c9b64
Fix ARM LDR* post-indexed operand encoding.
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llvm-svn: 119869
2010-11-19 23:14:43 +00:00
Bill Wendling
c568ce5bda
Encodings for the compare instructions.
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llvm-svn: 119868
2010-11-19 23:14:32 +00:00
Owen Anderson
023f096736
The Vm and Vn register fields must be the same for a register-register vmov.
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llvm-svn: 119867
2010-11-19 23:12:43 +00:00
Evan Cheng
2b30babdcc
Fix a cut-n-paste-error.
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llvm-svn: 119866
2010-11-19 23:01:16 +00:00
Owen Anderson
0d05099294
Document the new GVN number table structure.
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llvm-svn: 119865
2010-11-19 22:48:40 +00:00
Jim Grosbach
7445ae1145
Operand names
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llvm-svn: 119864
2010-11-19 22:43:08 +00:00
Jim Grosbach
4d6c419ea2
trailing whitespace
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llvm-svn: 119863
2010-11-19 22:42:55 +00:00
Eric Christopher
322b045c95
Don't need to save piecemeal now.
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llvm-svn: 119862
2010-11-19 22:39:56 +00:00
Eric Christopher
899d8247c8
Update comment.
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llvm-svn: 119861
2010-11-19 22:37:58 +00:00
Bill Wendling
65402c3a76
Add encodings for some of the thumb ADD instructions. Tests will come once the
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asm parser can handle them.
llvm-svn: 119860
2010-11-19 22:37:33 +00:00
Eric Christopher
716f891687
Update comment.
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llvm-svn: 119859
2010-11-19 22:36:41 +00:00
Jim Grosbach
69cad2c8b0
Clarify operand names.
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llvm-svn: 119858
2010-11-19 22:36:02 +00:00
Eric Christopher
563a0d8b6b
Refactor address mode handling into a single struct (ala x86), this
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should give allow a wider range of addressing modes.
No functional change.
llvm-svn: 119856
2010-11-19 22:30:02 +00:00
Jim Grosbach
0a0b2ed163
Fix encoding for ARM MLS instruction.
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llvm-svn: 119855
2010-11-19 22:22:37 +00:00
Owen Anderson
94babd312e
When folding addressing modes in CodeGenPrepare, attempt to look through PHI nodes
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if all the operands of the PHI are equivalent. This allows CodeGenPrepare to undo
unprofitable PRE transforms.
llvm-svn: 119853
2010-11-19 22:15:03 +00:00
Jim Grosbach
a7213faf85
Add ARM encoding information for STRD.
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llvm-svn: 119852
2010-11-19 22:14:31 +00:00
Jim Grosbach
bd80b3fe98
Shuffle things around a bit to keep like things together. Tidy up formatting.
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llvm-svn: 119851
2010-11-19 22:06:57 +00:00
Bill Wendling
29f262163a
Revert accidental commit.
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llvm-svn: 119850
2010-11-19 22:06:18 +00:00
Bill Wendling
e2f19dfde3
Change long binary encodings to use hex instead. It's more readable. Also
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initialize missing bit.
llvm-svn: 119849
2010-11-19 22:02:18 +00:00
Jim Grosbach
33930ff560
Factor out operand encoding bits for ARM addressing mode 2 store instructions.
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llvm-svn: 119846
2010-11-19 21:35:06 +00:00
Jim Grosbach
b58de2a8c7
Delete another dead class.
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llvm-svn: 119844
2010-11-19 21:16:08 +00:00
Jim Grosbach
dc695e7de2
whitespace tweak.
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llvm-svn: 119843
2010-11-19 21:14:37 +00:00
Rafael Espindola
68135a728b
Fix a use after free. Patch by Frits van Bommel.
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llvm-svn: 119842
2010-11-19 21:14:29 +00:00
Jim Grosbach
edef95dc56
Refactor PICSTR* instructions to really be pseudos. Nuke dead classes.
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llvm-svn: 119841
2010-11-19 21:14:02 +00:00
Jim Grosbach
a57ac3e282
Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes.
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llvm-svn: 119840
2010-11-19 21:07:51 +00:00
Jim Grosbach
9e50b14e34
Add ARM binary encoding information for the rest of the indexed loads.
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llvm-svn: 119821
2010-11-19 19:41:26 +00:00
Mon P Wang
4965983b22
Make isScalarToVector to return false if the node is a scalar. This will prevent
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DAGCombine from making an illegal transformation of bitcast of a scalar to a
vector into a scalar_to_vector.
llvm-svn: 119819
2010-11-19 19:08:12 +00:00
Kevin Enderby
214e641d8d
Added support for the Mach-O .symbol_resolver directive. rdar://8673046
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llvm-svn: 119816
2010-11-19 18:39:33 +00:00
Jim Grosbach
7a92d84b46
Remove dead code.
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llvm-svn: 119815
2010-11-19 18:18:37 +00:00
Jim Grosbach
c2ac477e54
ARM LDRD binary encoding.
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llvm-svn: 119812
2010-11-19 18:16:46 +00:00
Jim Grosbach
be61a90b99
Remove hard tabs.
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llvm-svn: 119810
2010-11-19 18:01:37 +00:00