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Commit Graph

121307 Commits

Author SHA1 Message Date
Andrew Kaylor
14c68f271d [WinEH] Teach SimplfyCFG to eliminate empty cleanup pads.
Differential Revision: http://reviews.llvm.org/D12434

llvm-svn: 246896
2015-09-04 23:39:40 +00:00
Kostya Serebryany
22e4458e65 [libFuzzer] more accurate logic for traces, 80-char fix
llvm-svn: 246888
2015-09-04 22:32:25 +00:00
Davide Italiano
18430b3711 [llvm-readobj] MachO: dump the correct field.
This was found while converting a test from macho-dump to llvm-readobj
and will once I commit the converted test.

llvm-svn: 246868
2015-09-04 20:43:00 +00:00
Yaron Keren
5f053b7016 Remove two unused includes and C++11 rangify for loops.
llvm-svn: 246865
2015-09-04 20:24:24 +00:00
Simon Pilgrim
35f88fd290 [X86][AVX] Test tidyup + regeneration. NFCI.
llvm-svn: 246863
2015-09-04 19:47:56 +00:00
Peter Collingbourne
be1be36b7d Add powerpc64 to parallel.ll unsupported architecture list.
llvm-svn: 246862
2015-09-04 19:45:36 +00:00
Ben Craig
108dbc7c6d Adding full stops to comments
Also, test commit

llvm-svn: 246855
2015-09-04 15:28:13 +00:00
Chad Rosier
4502b6a128 Typo. NFC.
llvm-svn: 246851
2015-09-04 12:34:55 +00:00
Silviu Baranga
bcc1d7e80a Simplify testcase added in r246759. NFC
llvm-svn: 246848
2015-09-04 11:37:20 +00:00
David Majnemer
a3969077ac [MC] Replace comparison with isUInt<32>.
Casting to unsigned long can cause the time to get truncated to 32-bits,
making it appear to be a valid timestamp.  Just use isUInt<32> instead.

llvm-svn: 246840
2015-09-04 07:22:36 +00:00
NAKAMURA Takumi
8bb9f4e6bd WinCOFFObjectWriter.cpp: Appease a warning in checking std::time_t. [-Wsign-compare]
llvm-svn: 246839
2015-09-04 05:19:37 +00:00
Richard Smith
e8f2654b47 Fix APInt value initialization to give a zero value as any sane integer type
should, rather than giving a broken value that doesn't even zero/sign-extend
properly.

llvm-svn: 246836
2015-09-04 04:08:36 +00:00
Steven Wu
b8c1045261 Fix the testcase in r246790
Using generic neon syntax to avoid test failure on apple platforms.

llvm-svn: 246833
2015-09-04 01:39:24 +00:00
Kostya Serebryany
2c51ca12e7 [libFuzzer] when a single mutation fails try a few more times with other mutations before returning un-mutated data
llvm-svn: 246828
2015-09-04 00:40:29 +00:00
Kostya Serebryany
28a699d9b8 [libFuzzer] actually make the dictionaries work (+docs)
llvm-svn: 246825
2015-09-04 00:12:11 +00:00
Hal Finkel
1b270f3e9b [PowerPC] Enable interleaved-access vectorization
This adds a basic cost model for interleaved-access vectorization (and a better
default for shuffles), and enables interleaved-access vectorization by default.
The relevant difference from the default cost model for interleaved-access
vectorization, is that on PPC, the shuffles that end up being used are *much*
cheaper than modeling the process with insert/extract pairs (which are
quite expensive, especially on older cores).

llvm-svn: 246824
2015-09-04 00:10:41 +00:00
Hal Finkel
60a2a5bada [PowerPC] Always use aggressive interleaving on the A2
On the A2, with an eye toward QPX unaligned-load merging, we should always use
aggressive interleaving. It is generally superior to only using concatenation
unrolling.

llvm-svn: 246819
2015-09-03 23:23:00 +00:00
Hal Finkel
978e2d8bf0 [PowerPC] Try harder to find a base+offset when looking for consecutive accesses
When forming permutation-based unaligned vector loads, we need to know whether
it is valid to read ahead of the requested address by a full vector length.
Doing so is more efficient (and allows for more CSE with later loads), but
could trigger a page fault if invalid. To determine validity, we look for other
loads in the same block that access the relevant address range.

The relevant point here is that we need to do this as part of the process of
forming permutation-based vector loads, and this happens quite early in the
SDAG pipeline - specifically before many of the address calculations are fully
canonicalized. As a result, we need to try harder to recognize base+offset
address computations, because they still might appear as chain of adds
(base+offset+offset, for example). To account for this, we'll look through
chains of adds, accumulating the constant offsets.

llvm-svn: 246813
2015-09-03 22:37:44 +00:00
Sanjoy Das
0ab88f9c4c [IR] Have AttrBuilder::clear clear TargetDepAttrs.
Test case attached -- currently the parser smears the "foo bar" to all
of the formal arguments.

llvm-svn: 246812
2015-09-03 22:27:42 +00:00
Philip Reames
a7d960ef99 [RewriteStatepointsForGC] Extract common code, comment, and fix a build warning [NFC]
llvm-svn: 246810
2015-09-03 21:57:40 +00:00
Philip Reames
45eb2c1611 [RewriteStatepointsForGC] Strengthen invariants around BDVs
As a first step towards a new implementation of the base pointer inference algorithm, introduce an abstraction for BDVs, strengthen the assertions around them, and rewrite the BDV relation code in terms of the abstraction which includes an explicit notion of whether the BDV is also a base. The later is motivated by the fact we had a bug where insertelement was always assumed to be a base pointer even though the BDV code knew it wasn't. The strengthened assertions in this patch would have caught that bug.

The next step will be to separate the DefiningValueMap into a BDV use list cache (entirely within findBasePointers) and a base pointer cache. Having the former will allow me to use a deterministic visit order when visiting BDVs in the inference algorithm and remove a bunch of ordering related hacks. Before actually doing the last step, I'm likely going to extend the lattice with a 'BaseN' (seen only base inputs) state so that I can kill the post process optimization step.

Phabricator Revision: http://reviews.llvm.org/D12608

llvm-svn: 246809
2015-09-03 21:34:30 +00:00
Kostya Serebryany
3eaa9123bf [libFuzzer] refactor the mutation functions so that they are now methods of a class. NFC
llvm-svn: 246808
2015-09-03 21:24:19 +00:00
Hal Finkel
e0c4d702bd [PowerPC] Include the permutation cost for unaligned vector loads
Pre-P8, when we generate code for unaligned vector loads (for Altivec and QPX
types), even when accounting for the combining that takes place for multiple
consecutive such loads, there is at least one load instructions and one
permutation for each load. Make sure the cost reported reflects the cost of the
permutes as well.

llvm-svn: 246807
2015-09-03 21:23:18 +00:00
Hal Finkel
e53c76127a [PowerPC] Compute the MMO offset for an unaligned load with signed arithmetic
If you compute the MMO offset using unsigned arithmetic, you end up with a
large positive offset instead of a small negative one. In theory, this could
cause bad instruction-scheduling decisions later.

I noticed this by inspection from the debug output, and using that for the
regression test is the best I can do right now.

llvm-svn: 246805
2015-09-03 21:12:15 +00:00
Philip Reames
fcf9557461 [RewriteStatepointsForGC] Workaround a lack of determinism in visit order
The visit order being used in the base pointer inference algorithm is currently non-deterministic.  When working on http://reviews.llvm.org/D12583, I discovered that we were relying on a peephole optimization to get deterministic ordering in one of the test cases.  

This change is intented to let me test and land http://reviews.llvm.org/D12583.  The current code will not be long lived.  I'm starting to investigate a rewrite of the algorithm which will combine the post-process step into the initial algorithm and make the visit order determistic.  Before doing that, I wanted to make sure the existing code was complete and the test were stable.  Hopefully, patches should be up for review for the new algorithm this week or early next.

llvm-svn: 246801
2015-09-03 20:24:29 +00:00
Kostya Serebryany
3b60fc1204 [libFuzzer] adding a parser for AFL-style dictionaries + tests.
llvm-svn: 246800
2015-09-03 20:23:46 +00:00
Reid Kleckner
00ea251f01 [sancov] Disable sanitizer coverage on functions using SEH
Splitting basic blocks really messes up WinEHPrepare. We can remove this
change when SEH uses the new EH IR.

llvm-svn: 246799
2015-09-03 20:18:29 +00:00
Jonathan Roelofs
905326fdb1 llvm.vim: 'musttail' is a keyword too
llvm-svn: 246798
2015-09-03 20:10:40 +00:00
Dan Liew
ac140b79c0 Try to clarify the semantics of fptrunc
* ``the value cannot fit within the destination type`` is ambiguous.
  It could mean overflow, underflow (not in the IEEE-754 sense) or a
  result that cannot be exactly represented and requires rounding or it
  could mean some combination of these. The semantics now state it means
  overflow **only**.

* Using "truncation" in the semantics is very misleading given that it
  doesn't necessarily truncate (i.e. round to zero). For example on
  x86_64 with SSE2 this is currently mapped to cvtsd2ss instruction
  who's rounding behaviour is dependent on the MXCSR register which
  is usually set to round to nearest even by default. The semantics
  now state that the rounding mode is undefined.

llvm-svn: 246792
2015-09-03 18:43:56 +00:00
Chad Rosier
ccb346dc8c [AArch64] Improve ISel using across lane addition reduction.
In vectorized add reduction code, the final "reduce" step is sub-optimal.
This change wll combine :

ext  v1.16b, v0.16b, v0.16b, #8
add  v0.4s, v1.4s, v0.4s
dup  v1.4s, v0.s[1]
add  v0.4s, v1.4s, v0.4s

into

addv s0, v0.4s

PR21371
http://reviews.llvm.org/D12325
Patch by Jun Bum Lim <junbuml@codeaurora.org>!

llvm-svn: 246790
2015-09-03 18:13:57 +00:00
Davide Italiano
ed4bcdffee [llvm-readobj] Dump MachO indirect symbols.
Example output:

File: <stdin>
Format: Mach-O 32-bit i386
Arch: i386
AddressSize: 32bit
Indirect Symbols {

Number: 3
Symbols [
  Entry {
    Entry Index: 0
    Symbol Index: 0x4
  }
  Entry {
    Entry Index: 1
    Symbol Index: 0x0
  }
  Entry {
    Entry Index: 2
    Symbol Index: 0x1
  }
]
}

Differential Revision:	http://reviews.llvm.org/D12570

llvm-svn: 246789
2015-09-03 18:10:28 +00:00
Karl Schimpf
f002d274d3 Allow global address space forward decls using IDs in .ll files.
Summary:
This fixes bugzilla bug 24656. Fixes the case where there is a forward
reference to a global variable using an ID (i.e. @0). It does this by
passing the address space of the initializer pointer for which the
forward referenced global is used.

llvm-svn: 246788
2015-09-03 18:06:44 +00:00
Quentin Colombet
698e1d6521 [ARM] Add a test case for revision 243956.
llvm-svn: 246785
2015-09-03 16:49:18 +00:00
Reid Kleckner
4f28551185 Sink COFF.h MC include into .cpp files
This prevents MC clients from getting COFF.h, which conflicts with
winnt.h macros. Also a minor IWYU cleanup. Now the only public headers
including COFF.h are in Object, and they actually need it.

llvm-svn: 246784
2015-09-03 16:41:50 +00:00
Chad Rosier
a471df8241 Revert "[AArch64] Improve load/store optimizer to handle LDUR + LDR."
This reverts commit r246769.

This appears to have broken Multisource/Benchmarks/tramp3d-v4.

llvm-svn: 246782
2015-09-03 16:41:28 +00:00
Sanjay Patel
15727a41c6 [x86] enable machine combiner reassociations for scalar 'xor' insts
llvm-svn: 246781
2015-09-03 16:36:16 +00:00
Karl Schimpf
d5e1ad2457 Fix assertion failure in LLParser::ConvertValIDToValue
Summary:
Fixes bug 24645. Problem appears to be that the type may be undefined
when ConvertValIDToValue is called.

Reviewers: kcc

Subscribers: llvm-commits
llvm-svn: 246779
2015-09-03 16:18:32 +00:00
Karl Schimpf
80ea68ccb9 Remove binary characters from test file.
llvm-svn: 246775
2015-09-03 15:41:38 +00:00
Karl Schimpf
09e7a2e684 Fix SEGV in InlineAsm::ConstraintInfo::Parse.
Summary:
Fixes bug 24646. Previous code was not checking if an index into a vector
was valid, resulting in a SEGV. Fixed by assuming the construct can't
be parsed when given this input.

Reformat and add test.

Differential Revision: http://reviews.llvm.org/D12539

llvm-svn: 246774
2015-09-03 15:41:37 +00:00
Karl Schimpf
2d3030ebd1 Fix SEGV in InlineAsm::ConstraintInfo::Parse.
Fixes bug 24646. Previous code was not checking if an index into a vector
was valid, resulting in a SEGV. Fixed by assuming the construct can't
be parsed when given this input.

llvm-svn: 246773
2015-09-03 15:41:34 +00:00
Sanjay Patel
345c0f08ed check for fastness before merging in DAGCombiner::MergeConsecutiveStores()
Use and check the 'IsFast' optional parameter to TLI.allowsMemoryAccess() any time
we have a merged access candidate. Without this patch, we were generating unaligned 
16-byte (SSE) memops for x86 targets where those accesses are slow.

This change was mentioned in:
http://reviews.llvm.org/D10662 and
http://reviews.llvm.org/D10905

and will help solve PR21711.

Differential Revision: http://reviews.llvm.org/D12573

llvm-svn: 246771
2015-09-03 15:03:19 +00:00
Chad Rosier
d7a88bcaf3 [AArch64] Improve load/store optimizer to handle LDUR + LDR.
This patch allows the mixing of scaled and unscaled load/stores to form
load/store pairs.

PR24465
http://reviews.llvm.org/D12116
Many thanks to Ahmed and Michael for fixes and code review.

llvm-svn: 246769
2015-09-03 14:41:37 +00:00
Chad Rosier
ecc09aaf67 [AArch64] Reuse MayLoad. NFC.
llvm-svn: 246767
2015-09-03 14:19:43 +00:00
Daniel Sanders
05de5fe69f [mips] Added support for the div, divu, ddiv and ddivu macros which use traps and breaks in the integrated assembler.
Summary:

Patch by Scott Egerton

Reviewers: vkalintiris, dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11675

llvm-svn: 246763
2015-09-03 12:31:22 +00:00
Silviu Baranga
4807332365 Fix IRBuilder CreateBitOrPointerCast for vector types
Summary:
This function was not taking into account that the
input type could be a vector, and wasn't properly
working for vector types.

This caused an assert when building spec2k6 perlbmk for armv8.

Reviewers: rengolin, mzolotukhin

Subscribers: silviu.baranga, mzolotukhin, rengolin, eugenis, jmolloy, aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D12559

llvm-svn: 246759
2015-09-03 11:36:39 +00:00
Joseph Tremoulet
c2fa7acb3f [Docs] Fix Sphinx warning
Title underline was too short.

llvm-svn: 246754
2015-09-03 09:33:54 +00:00
Joseph Tremoulet
2e31412faa [WinEH] Add llvm.eh.exceptionpointer intrinsic
Summary:
This intrinsic can be used to extract a pointer to the exception caught by
a given catchpad.  Its argument has token type and must be a `catchpad`.

Also clarify ExtendingLLVM documentation regarding overloaded intrinsics.


Reviewers: majnemer, andrew.w.kaylor, sanjoy, rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12533

llvm-svn: 246752
2015-09-03 09:15:32 +00:00
Joseph Tremoulet
bce9d857cc [WinEH] Add cleanupendpad instruction
Summary:
Add a `cleanupendpad` instruction, used to mark exceptional exits out of
cleanups (for languages/targets that can abort a cleanup with another
exception).  The `cleanupendpad` instruction is similar to the `catchendpad`
instruction in that it is an EH pad which is the target of unwind edges in
the handler and which itself has an unwind edge to the next EH action.
The `cleanupendpad` instruction, similar to `cleanupret` has a `cleanuppad`
argument indicating which cleanup it exits.  The unwind successors of a
`cleanuppad`'s `cleanupendpad`s must agree with each other and with its
`cleanupret`s.

Update WinEHPrepare (and docs/tests) to accomodate `cleanupendpad`.

Reviewers: rnk, andrew.w.kaylor, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12433

llvm-svn: 246751
2015-09-03 09:09:43 +00:00
Igor Breger
63fab329a2 AVX512: Implemented encoding and intrinsics for vplzcntq, vplzcntd, vpconflictq, vpconflictd
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D11931

llvm-svn: 246750
2015-09-03 09:05:31 +00:00
NAKAMURA Takumi
9ef8094e71 Tweak llvm/test/tools/gold/X86/parallel.ll to run with pthread-unaware ld.gold on Linux.
If ld.gold is configured without --enable-thread, ld.gold might not load libpthread.so.
Preloading LLVMgold.so loads also libpthread.so.

llvm-svn: 246739
2015-09-03 00:48:59 +00:00