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285 Commits

Author SHA1 Message Date
Chris Lattner
b5f94a18e0 Insertion methods now return void instead of #instrs inserted. Also, use 
more powerful forms of BuildMI to concisify the code

llvm-svn: 15782
 2004-08-15 22:15:56 +00:00
Chris Lattner
e58190f5f6 These methods no longer take a TargetRegisterClass* operand. 
llvm-svn: 15774
 2004-08-15 21:56:44 +00:00
Alkis Evlogimenos
dbe432aee7 Make this compile on gc 3.4.1 (static_cast to non-const type was not 
allowed).

llvm-svn: 15766
 2004-08-15 09:18:55 +00:00
Nate Begeman
e24434f765 Add future optimization opportunity 
llvm-svn: 15760
 2004-08-15 06:43:10 +00:00
Nate Begeman
2751f754b5 Fix float to int codepath by always allocating 8 bytes for the target of a double store; optimize cmplwi generation. 
llvm-svn: 15759
 2004-08-15 06:42:28 +00:00
Chris Lattner
caa4f4a263 Zimm16 is now dead. Its entry is not removed from the enum, to avoid having 
to renumber everything.  Similar elimination should be applied to other
operand enum values that are only used to format printing in the .s file.

llvm-svn: 15755
 2004-08-15 05:48:47 +00:00
Chris Lattner
6ddb5d6c76 Convert all of the DForm_6* operations, which makes all of the Zimm16 users 
dead.

llvm-svn: 15754
 2004-08-15 05:46:14 +00:00
Chris Lattner
cf6878b6c9 Reenable the CCRC 
llvm-svn: 15752
 2004-08-15 05:31:15 +00:00
Chris Lattner
41839ea5cd Convert the DForm_4 over to the asmprintergen 
llvm-svn: 15751
 2004-08-15 05:20:16 +00:00
Nate Begeman
9705f413b7 Remove dead code 
llvm-svn: 15750
 2004-08-15 00:31:02 +00:00
Chris Lattner
e19e10e800 Print mflr using the asmwriter generator 
llvm-svn: 15749
 2004-08-14 23:27:29 +00:00
Nate Begeman
224deaa061 Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 
llvm-svn: 15746
 2004-08-14 22:16:36 +00:00
Nate Begeman
826fbd0de1 Add support for frame pointers, and large offsets from stack and frame pointers. Adopt elimination of MachineFunction& arg from eliminateFrameIndex. 
llvm-svn: 15745
 2004-08-14 22:13:58 +00:00
Nate Begeman
557f61c4d6 Add indexed forms of load doubleword and load word algebraic for 64 bit targets 
llvm-svn: 15743
 2004-08-14 22:12:20 +00:00
Nate Begeman
03781a00e8 Fix handling of FP constants with single precision, and loading of internal linkage function addresses 
llvm-svn: 15742
 2004-08-14 22:11:38 +00:00
Nate Begeman
52fb57411b Add initial support for using the generated asm writer. Also, fix FP constant printing to always print 8 byte intializers. Move printing of LinkOnce stubs. 
llvm-svn: 15741
 2004-08-14 22:09:10 +00:00
Nate Begeman
56b50cb7e8 Add generation of asm writer from tablegen files to Makefile 
llvm-svn: 15740
 2004-08-14 22:06:38 +00:00
Nate Begeman
7024c8a1a4 Remove an unneeded header and forward declaration 
llvm-svn: 15722
 2004-08-13 09:33:17 +00:00
Nate Begeman
101112a2f4 Fix siod by switching BoolTy to byte rather than int until CFE changes for 
Darwin.  Also, change asm printer to output proper stubs for external
functions whose address is passed as an argument to aid in bugpointing.

llvm-svn: 15721
 2004-08-13 09:32:01 +00:00
Nate Begeman
6cf8366e11 Fix 177.mesa compilation, don't use floating point regs for base addresses! 
llvm-svn: 15720
 2004-08-13 04:45:14 +00:00
Nate Begeman
9f8ad2f245 Fix llc crasher compiling siod by giving BuildMI the correct number of arguments 
llvm-svn: 15719
 2004-08-13 03:56:49 +00:00
Nate Begeman
6a9f2fd2c1 Longs are in one register on PowerPC 64; use appropriate instructions to operate on them. 
llvm-svn: 15711
 2004-08-13 02:20:47 +00:00
Nate Begeman
48359fbcd0 Add some more 64 bit instructions we need for the PowerPC-64 ISel to the tablegen files 
llvm-svn: 15710
 2004-08-13 02:19:26 +00:00
Misha Brukman
f2c87f4794 Disable PPC64 backend by default because LLC cannot choose automatically between 
SparcV9 and PowerPC64 without target triples, since they are both 64-bit
big-endian targets.

llvm-svn: 15688
 2004-08-12 17:16:43 +00:00
Misha Brukman
bf93b04c17 * Correct 64-bit version: blr 1 (not 0) 
* BuildMI() can build 0-param instructions (e.g., NOP)

llvm-svn: 15681
 2004-08-12 03:30:03 +00:00
Misha Brukman
e281f3a2ac * Print out full names for non-GPR or -FPR registers 
* BuildMI() really *does* handle 0 params!

llvm-svn: 15680
 2004-08-12 03:28:47 +00:00
Misha Brukman
2851d39ec4 * Pointers are 8 bytes, hence cLong type on 64-bit PPC 
* Fix loading of GlobalValues

llvm-svn: 15678
 2004-08-12 02:53:01 +00:00
Misha Brukman
8bcb04dd35 Eliminate special-casing 14-bit immediate load/store opcodes 
llvm-svn: 15677
 2004-08-12 02:51:38 +00:00
Misha Brukman
1149a822a2 Correctly print out ASCII literal strings on AIX 
llvm-svn: 15674
 2004-08-12 01:01:13 +00:00
Misha Brukman
d9b3a360fc Mark R2 as available for allocation on Darwin/PPC32, but not AIX/PPC64 
llvm-svn: 15673
 2004-08-12 00:10:01 +00:00
Misha Brukman
14bf47d0d9 * Move AIX into the llvm namespace to be accessed from RegisterInfo 
* Mark InstrInfo with 32 vs. 64 bit flag
* Enable the 64-bit isel and asm printer

llvm-svn: 15672
 2004-08-11 23:47:08 +00:00
Misha Brukman
c24851b980 Set the is64bit flag and propagate it to PowerPCRegisterInfo 
llvm-svn: 15671
 2004-08-11 23:45:43 +00:00
Misha Brukman
42e53e4d94 * Set the is64bit boolean flag in PowerPCRegisterInfo 
* Doubles are 8 bytes in 64-bit PowerPC, and use the general register class
* Use double-word loads and stores for restoring from/saving to stack
* Do not allocate R2 if compiling for AIX

llvm-svn: 15670
 2004-08-11 23:44:55 +00:00
Misha Brukman
fc82624aab 64-bit instruction selector and AIX-specific 64-bit asm printer 
llvm-svn: 15669
 2004-08-11 23:42:15 +00:00
Misha Brukman
0b67e02e9c Fix names of 64-bit CMP*D* opcodes, add LWA and STD* opcodes 
llvm-svn: 15668
 2004-08-11 23:33:34 +00:00
Misha Brukman
08b8a09113 Add support for 64-bit CMPDI, CMPLDI, and CMPLD opcodes 
llvm-svn: 15667
 2004-08-11 20:56:14 +00:00
Misha Brukman
7325a6c790 Add doubleword load/store (64-bit only). 
llvm-svn: 15665
 2004-08-11 15:54:36 +00:00
Misha Brukman
1f4fb14301 Hyphenate ##-bit and remove first-person from comments. 
llvm-svn: 15663
 2004-08-11 13:35:44 +00:00
Nate Begeman
6120e8f04f Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 
llvm-svn: 15662
 2004-08-11 07:40:04 +00:00
Chris Lattner
2903154b98 Fix a case where constantexprs could leak into the PPC isel. 
llvm-svn: 15661
 2004-08-11 07:34:50 +00:00
Nate Begeman
c07b78eaa2 Fix 255.vortex by using getClassB instead of getClass 
llvm-svn: 15648
 2004-08-11 03:30:55 +00:00
Misha Brukman
694c9ff1a6 Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest. 
llvm-svn: 15636
 2004-08-11 00:11:25 +00:00
Misha Brukman
47c87a8808 Breaking up the PowerPC target into 32- and 64-bit subparts: Part II: 64-bit. 
llvm-svn: 15635
 2004-08-11 00:10:41 +00:00
Misha Brukman
6713996576 Breaking up the PowerPC target into 32- and 64-bit subparts, Part I: 32-bit. 
llvm-svn: 15634
 2004-08-11 00:09:42 +00:00
Misha Brukman
3f79fbe93f Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets 
llvm-svn: 15631
 2004-08-10 22:47:03 +00:00
Misha Brukman
aa0e45b8d8 * Fix file header to use tablegen emacs mode instead of c++ 
* Wrap long line to 80 cols

llvm-svn: 15630
 2004-08-10 21:24:44 +00:00
Nate Begeman
b74ee41754 Fix casts of float to unsigned long 
Replace STDX (store 64 bit int indexed) with STFDX (store double indexed)
Fix latent bug in indexed load generation
Generate indexed loads and stores in many more cases

llvm-svn: 15626
 2004-08-10 20:42:36 +00:00
Misha Brukman
861d6cdcb1 DForm 5/6 extended mneumonics take 3 arguments. 
llvm-svn: 15620
 2004-08-10 19:03:31 +00:00
Misha Brukman
fe7a08a933 Fix DForm_4: format is `op r, r, i' 
llvm-svn: 15613
 2004-08-10 18:07:55 +00:00
Misha Brukman
d345cd9090 Stub definition of the PowerPC CodeEmitter class; this isn't functional (yet). 
llvm-svn: 15600
 2004-08-09 23:03:59 +00:00
Misha Brukman
3da9167cc4 CodePrinter -> AsmPrinter 
llvm-svn: 15599
 2004-08-09 22:27:45 +00:00
Misha Brukman
65afbbca70 Remove ClassPrefix variable as it's no longer used. 
llvm-svn: 15586
 2004-08-09 19:13:29 +00:00
Misha Brukman
1547d8e8d0 Define a ClassPrefix for PowerPC. 
llvm-svn: 15580
 2004-08-09 17:46:26 +00:00
Misha Brukman
eb8758cc0c Generate a code emitter for PowerPC as well, this will be used in the JIT. 
llvm-svn: 15578
 2004-08-09 17:24:32 +00:00
Misha Brukman
ba013330a8 Use instruction formats as defined in the PowerPC ISA manual 
llvm-svn: 15577
 2004-08-09 17:24:04 +00:00
Reid Spencer
8bf21cd984 Fix stack size processing now that the return address isn't an implied 
push onto the top of the stack like x86, which uses the local area
offset.  This will allow the removal of PowerPCPEI.cpp soon.

llvm-svn: 15573
 2004-08-09 01:24:32 +00:00
Chris Lattner
bbf11b1e1d Changes commited for Nate Begeman: 
Use a PowerPC specific prolog epilog inserter to control where spilled
callee save regs are placed on the stack.
Get rid of implicit return address stack slot, save return address reg
(LR) in appropriate slot
Improve code generated for functions that don't have calls or access
globals


Note from Chris: PowerPCPEI will eventually be eliminated, once the
functionality is merged into CodeGen/PrologEpilogInserter.cpp

llvm-svn: 15536
 2004-08-06 06:58:50 +00:00
John Criswell
451362550e Added Louis Gerbarg. Louis is given credit in the CREDITS.TXT file, so I 
assume Louis also holds copyright.

llvm-svn: 15534
 2004-08-05 23:46:27 +00:00
John Criswell
45cf7f6a0f Add additional copyright notice for the PowerPC backend. 
Thanks Nate!

llvm-svn: 15531
 2004-08-05 20:36:00 +00:00
Misha Brukman
4a2823d1ae Simplify makefile by combining all TableGen dependencies into one variable 
llvm-svn: 15527
 2004-08-05 18:34:15 +00:00
Misha Brukman
3014727a37 Align dependencies so they don't hurt the eyes to look at them 
llvm-svn: 15504
 2004-08-04 21:37:41 +00:00
Misha Brukman
b296dd721c Remove unused instruction classes 
llvm-svn: 15501
 2004-08-04 21:18:57 +00:00
Misha Brukman
ef93ca23ba Make tablegen targets depend on PowerPCInstrFormats.td as well 
llvm-svn: 15500
 2004-08-04 21:18:36 +00:00
Chris Lattner
1ce22d3d43 getValues does not exist 
llvm-svn: 15495
 2004-08-04 17:29:14 +00:00
Misha Brukman
07f8b33325 Remove unused opcodes. 
llvm-svn: 15447
 2004-08-03 20:23:44 +00:00
Misha Brukman
10a585beaf * Use simpler instruction templates to define instructions 
* Fix several extended opcodes

llvm-svn: 15423
 2004-08-02 21:58:52 +00:00
Misha Brukman
e7ad7b2f2a Replace patterns 0, 4, and 5 with simpler heirarchical definitions that use the 
official PowerPC instruction format lingo: X- and D-form.

llvm-svn: 15422
 2004-08-02 21:56:35 +00:00
Misha Brukman
f2119a5b6f Separate instruction formats from instruction definitions. 
llvm-svn: 15414
 2004-08-02 16:54:54 +00:00
Misha Brukman
8209358fca * Conditional save/restore of LR disabled as it's not quite correct 
* sumarray2d fixed: large fixed-size alloca
* make is now compileable
* Re-organized tests to fit them under proper headings

Patch by Nate Begeman.

llvm-svn: 15347
 2004-07-30 15:53:09 +00:00
Misha Brukman
f0c6eaca10 Do not mark LR as callee-save: not quite correctly done. Patch: Nate Begeman. 
llvm-svn: 15346
 2004-07-30 15:51:51 +00:00
Misha Brukman
27ced926da * Temporarily suspend LR save/restore optimization as it is not quite correct 
* Implement large fixed-size allocas            Entire patch by Nate Begeman.

llvm-svn: 15345
 2004-07-30 15:50:45 +00:00
Chris Lattner
6bea23ff54 Minor corrections 
llvm-svn: 15309
 2004-07-28 20:18:53 +00:00
Misha Brukman
8e19054114 Add notes on bug involving casting ulong -> double, thanks to Nate Begeman. 
llvm-svn: 15307
 2004-07-28 19:16:10 +00:00
Misha Brukman
a8bcaec663 Simplify loading (un)signed constants to registers, patch by Nate Begeman. 
llvm-svn: 15306
 2004-07-28 19:13:49 +00:00
Misha Brukman
b699e3d825 Remove an extra 8 byte distance penalty. Patch by Nate Begeman. 
llvm-svn: 15305
 2004-07-28 19:13:07 +00:00
Misha Brukman
6e134ad499 Find longs by type, not by their primitive size being 64. Patch by Nate Begeman. 
llvm-svn: 15304
 2004-07-28 19:12:24 +00:00
Misha Brukman
8c293deaad LI can only take signed values, so values > 32767 can only be loaded with ORI 
llvm-svn: 15299
 2004-07-28 00:56:04 +00:00
Misha Brukman
ac63bc04f8 Reorganize tests to place them in proper directories. 
llvm-svn: 15298
 2004-07-28 00:55:12 +00:00
Misha Brukman
8fc18d7d1c UnitTests 2003-05-26-Shorts and 2003-07-09-LoadShorts have been fixed; 
2003-05-22-VarSizeArray is broken.

llvm-svn: 15297
 2004-07-28 00:01:41 +00:00
Misha Brukman
1b4bc02316 Fix printing of immediate operands by looking at their operand types in 
the TargetInstrInfo.  This fixes UnitTests 2003-05-26-Shorts and
2003-07-09-LoadShorts.

llvm-svn: 15296
 2004-07-28 00:00:48 +00:00
Misha Brukman
148ad01de1 Renamed files: 
* PowerPCReg.td => PowerPCRegisterinfo.td
* PowerPCInstrs.td => PowerPCInstrInfo.td

llvm-svn: 15295
 2004-07-27 23:29:16 +00:00
Misha Brukman
b779843f6b Branch selection support implemented by Nate Begeman for long branches. 
llvm-svn: 15288
 2004-07-27 18:43:04 +00:00
Misha Brukman
b07f569386 Correctly print out long branches, assert on finding pseudo instr COND_BRANCH 
Patch by Nate Begeman.

llvm-svn: 15286
 2004-07-27 18:40:39 +00:00
Misha Brukman
ef0cbd830c Run the branch selection pass right before the asm printer. 
Patch by Nate Begeman.

llvm-svn: 15285
 2004-07-27 18:39:34 +00:00
Misha Brukman
0f26a3309f Remove empty unused method processFunctionBeforeFrameFinalized() 
llvm-svn: 15284
 2004-07-27 18:38:40 +00:00
Misha Brukman
8c047d4fad Add COND_BRANCH pseudo instruction, patch by Nate Begeman. 
llvm-svn: 15283
 2004-07-27 18:35:54 +00:00
Misha Brukman
d7d501d518 Build COND_BRANCHes which may become long or short, decided by a later pass. 
Patch by Nate Begeman.

llvm-svn: 15282
 2004-07-27 18:35:23 +00:00
Misha Brukman
8e2f8de3c3 Moved definition of invertPPCBranchOpcode() into PowerPCInstrInfo class. 
Patch by Nate Begeman.

llvm-svn: 15281
 2004-07-27 18:34:11 +00:00
Misha Brukman
0fe1f5d880 Add PowerPCBranchSelector to discover which are `long' branches. 
Contributed by Nate Begeman.

llvm-svn: 15280
 2004-07-27 18:33:06 +00:00
Misha Brukman
c22bbdd36d Fixed saving/restoring LR unconditionally, only done as necessary. 
llvm-svn: 15275
 2004-07-27 17:17:48 +00:00
Misha Brukman
adb86dba29 Save and restore LR just like any other register and ONLY if we actually modify 
it (due to calls or globals access).  We now compile `void empty(){}' to `blr'.

llvm-svn: 15274
 2004-07-27 17:17:18 +00:00
Misha Brukman
6fec7336fe LR is a 32-bit int reg 
llvm-svn: 15273
 2004-07-27 17:15:32 +00:00
Misha Brukman
93b0ea58a2 MovePCtoLR (which is `bl' in disguise) modifies LR implicitly 
llvm-svn: 15272
 2004-07-27 17:15:05 +00:00
Misha Brukman
4be6841bc0 Register LR is callee-saved 
llvm-svn: 15271
 2004-07-27 17:14:34 +00:00
Misha Brukman
a3ac216fce Add IMPLICIT_DEF of LR for branch-and-link instrs (calls and global accesses) 
llvm-svn: 15270
 2004-07-27 17:13:58 +00:00
Misha Brukman
6272268028 Do not store the stack pointer if the stack size is 0. 
Also, convert C-style comments to C++ and make sure code wraps at 80 cols.

llvm-svn: 15245
 2004-07-26 22:00:26 +00:00
Misha Brukman
a979e8a08a ADDI can take several forms, including: 
addi r1, r2, 0
  addi r1, <frame index #n>, 0

so we must check for the second parameter being a register for this instruction
to be considered a reg-to-reg copy.

llvm-svn: 15244
 2004-07-26 21:50:38 +00:00
Misha Brukman
a2cf775362 assert() on MachineInstr properties instead of checking them dynamically 
llvm-svn: 15243
 2004-07-26 21:35:58 +00:00
Misha Brukman
73687cfcc6 * Recognize `addi r1, r2, 0' a move instruction 
* List formats of instructions currently recognized as moves

llvm-svn: 15242
 2004-07-26 21:29:00 +00:00
Misha Brukman
288289f9a7 * Rewrote casts 
* Implemented GEP folding
* Dynamically output global address stuff once per function
* Fix casting fp<->short/byte

Patch contributed by Nate Begeman.

llvm-svn: 15237
 2004-07-26 18:13:24 +00:00