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Commit Graph

142204 Commits

Author SHA1 Message Date
Daniel Jasper
162ffcacd6 Revert @llvm.assume with operator bundles (r289755-r289757)
This creates non-linear behavior in the inliner (see more details in
r289755's commit thread).

llvm-svn: 290086
2016-12-19 08:22:17 +00:00
Craig Topper
af52a876e6 [X86] Remove all of the patterns that use X86ISD:FAND/FXOR/FOR/FANDN except for the ones needed for SSE1. Anything SSE2 or above uses the integer ISD opcode.
This removes 11721 bytes from the DAG isel table or 2.2%

llvm-svn: 290073
2016-12-19 00:42:28 +00:00
Tom de Vries
b9ea502fdb [FileCheck] Fix --strict-whitespace --match-full-lines -- add test-case
Add test-case that was missing in "[FileCheck] Fix --strict-whitespace
--match-full-lines" commit.

llvm-svn: 290070
2016-12-18 21:04:47 +00:00
Tom de Vries
c34203accd [FileCheck] Fix --strict-whitespace --match-full-lines
Make sure FileCheck --strict-whitespace --match-full-lines translates
'CHECK: bla ' into pattern '^ bla $' instead of pattern '^bla$'.

llvm-svn: 290069
2016-12-18 20:45:59 +00:00
David Majnemer
5bc3acc382 [PDB] Don't use the long type
Long is not the same size across a number of the platforms we support.
Use unsigned int here instead, it is more appropriate because
overflow/wrap-around is possible and, in this case, expected.

llvm-svn: 290068
2016-12-18 20:10:50 +00:00
Sanjay Patel
f685720721 [InstCombine] use commutative matchers for patterns with commutative operators
Background/motivation - I was circling back around to:
https://llvm.org/bugs/show_bug.cgi?id=28296

I made a simple patch for that and noticed some regressions, so added test cases for
those with rL281055, and this is hopefully the minimal fix for just those cases.

But as you can see from the surrounding untouched folds, we are missing commuted patterns
all over the place, and of course there are no regression tests to cover any of those cases.

We could sprinkle "m_c_" dust all over this file and catch most of the missing folds, but 
then we still wouldn't have test coverage, and we'd still miss some fraction of commuted 
patterns because they require adjustments to the match order.

I'm aware of the concern about the potential compile-time performance impact of adding 
matches like this (currently being discussed on llvm-dev), but I don't think there's any
evidence yet to suggest that handling commutative pattern matching more thoroughly is not
a worthwhile goal of InstCombine.

Differential Revision: https://reviews.llvm.org/D24419

llvm-svn: 290067
2016-12-18 18:49:48 +00:00
Daniel Jasper
1f74abebdb Revert r289955 and r289962. This is causing lots of ASAN failures for us.
Not sure whether it causes and ASAN false positive or whether it
actually leads to incorrect code or whether it even exposes bad code.
Hans, I'll get you instructions to reproduce this.

llvm-svn: 290066
2016-12-18 14:36:38 +00:00
Michael Zuckerman
ee4cf3d28f [X86] [AVX512] Minor fix in encoding of scalar EVEX instructions. NFC.
Commit on behalf of Gadi Haber  

Removed EVEX_V512 prefix from scalar EVEX instructions since HW ignores L'L bits anyway (LIG). 4 instructions are modified.
The changed encodings are validated with XED.
Rviewers: delena, igorb

Differential revision: https://reviews.llvm.org/D27802

llvm-svn: 290065
2016-12-18 14:29:00 +00:00
Simon Pilgrim
c4aed85cb1 [X86][SSE] Add support for combining target shuffles to SHUFPS.
As discussed on D27692, the next step will be to allow cross-domain shuffles once the combined shuffle depth passes a certain point.

llvm-svn: 290064
2016-12-18 14:26:02 +00:00
Tom de Vries
a2c65eb3ed [FileCheck] Fix comment in ReadCheckFile
The comment in ReadCheckFile claims that both leading and trailing whitespace
are removed, but the associated statement only removes leading whitespace.

llvm-svn: 290061
2016-12-18 09:41:20 +00:00
Craig Topper
207263b7e6 [X86][SSE][AVX-512] Convert FAND/FOR/FXOR/FANDN nodes to integer operations if they are available. This will allow a bunch of patterns to be removed.
These nodes are only emitted for lowering FABS/FNEG/FNABS/FCOPYSIGN. Ideally we just wouldn't create these nodes if SSE2 or higher is available, but it was simple to just convert them in DAG combine.

For SSE2, AVX, and AVX512 with DQI this is no functional change as the execution domain fixing pass ensures the right domain is selected regardless of the ISD opcode.

For AVX-512 without DQI we end up using integer instructions since the floating point versions aren't available. But we were already doing that for any logical operations in code that didn't come from FABS/FNEG/FNABS/FCOPYSIGN so this seems no worse. And we get the benefit of being able to fold broadcasts now.

llvm-svn: 290060
2016-12-18 07:54:23 +00:00
Craig Topper
a68fa9215c [AVX-512] Use EVEX encoded XOR instruction for zeroing scalar registers when DQI and VLX instructions are available.
This can give the register allocator more registers to use.

llvm-svn: 290057
2016-12-18 06:23:14 +00:00
Craig Topper
e9b4174c83 [AVX-512] Make sure VLX is also enabled before using EVEX encoded logic ops for scalars. I missed this in r290049.
llvm-svn: 290055
2016-12-18 04:17:00 +00:00
David Majnemer
209344b8ee [PDB] Don't reimplement CRC32
We already have a CRC32 implementation which is compatible with the PDB
hash, reuse it.

llvm-svn: 290054
2016-12-18 00:41:15 +00:00
David Majnemer
19b80b92e7 [PDB] Validate superblock addresses
- Validate the address of the block map.
- Validate the address of the free block map.

llvm-svn: 290053
2016-12-18 00:41:10 +00:00
Matt Arsenault
805345dac1 AMDGPU: Fix broken check prefix in test
llvm-svn: 290050
2016-12-17 20:03:59 +00:00
Craig Topper
7cc5b9c8fc [AVX-512] Use EVEX encoded logic operations for scalar types when they are available. This gives the register allocator more registers to work with.
llvm-svn: 290049
2016-12-17 19:26:00 +00:00
Craig Topper
8e8a28f6b2 [AVX-512] Update scalar logic test to show missed opportunity to use EVEX encoded logic instructions to get more registers to use.
llvm-svn: 290048
2016-12-17 19:25:55 +00:00
Matthias Braun
05ab2528a7 Revert "AArch64CollectLOH: Rewrite as block-local analysis."
It is still breaking Chrome. http://llvm.org/PR31361

This reverts commit r290026.

llvm-svn: 290047
2016-12-17 18:53:11 +00:00
Craig Topper
a4a4c54e49 [InstCombine] Simplify code slightly. NFC
llvm-svn: 290046
2016-12-17 18:10:04 +00:00
Daniel Jasper
fe054c8df9 Revert "[libFuzzer] add an experimental flag -experimental_len_control=1 that sets max_len to 1M and tries to increases the actual max sizes of mutations very gradually. Also remove a bit of dead code"
This reverts commit r289998.

See comment:
https://reviews.llvm.org/rL289998

llvm-svn: 290043
2016-12-17 12:27:49 +00:00
George Rimar
bf8d499f12 [DWARF] - Make PubIndexEntryDescriptor::toBits() to be const.
That is usefull when iterating over entries of new DWARFDebugPubTable class
via DWARFDebugPubTable::getData which returns ArrayRef.

llvm-svn: 290041
2016-12-17 10:15:39 +00:00
George Rimar
3cb9279644 [DWARF] - Introduce DWARFDebugPubTable class for dumping pub* sections.
Patch implements parser of pubnames/pubtypes tables instead of static 
function used before. It is now should be possible to reuse it
in LLD or other projects and clean up the duplication code.

Differential revision: https://reviews.llvm.org/D27851

llvm-svn: 290040
2016-12-17 09:10:32 +00:00
Kostya Serebryany
80d5313ec1 [libFuzzer] use less memory for merge
llvm-svn: 290039
2016-12-17 08:20:24 +00:00
Tom Stellard
199ef57082 Add custom type for PseudoSourceValue
Summary:
PseudoSourceValue can be used to attach a target specific value for "well behaved" side-effects lowered from target specific intrinsics.
This is useful whenever there is not an LLVM IR Value around when representing such "well behaved" side-effected operations in backends by attaching a MachineMemOperand with a custom PseudoSourceValue as this makes the scheduler not treating them as "GlobalMemoryObjects" which triggers a logic that makes the operation act like a barrier in the Schedule DAG.

This patch adds another Kind to the PseudoSourceValue object which is "TargetCustom". It indicates a type of PseudoSourceValue that has a target specific meaning (aka. LLVM shouldn't assume any specific usage for such a PSV).

It supports the possibility of having many different kinds of "TargetCustom" PseudoSourceValues.

We had a discussion about if this was valuable or not (in particular because there was a believe that PSV were going away sooner or later) but seems like they are not going anywhere and I think they are useful backend side.

It is not clear the interaction of this with MIRParser (do we need a target hook to parse these?) and I would like a comment from Alex about that :)

Reviewers: arphaman, hfinkel, arsenm

Subscribers: Eugene.Zelenko, llvm-commits

Patch By: Marcello Maggioni

Differential Revision: https://reviews.llvm.org/D13575

llvm-svn: 290037
2016-12-17 04:41:53 +00:00
Peter Collingbourne
a71b916920 ADT: Add a getArrayRef() accessor to MapVector.
llvm-svn: 290036
2016-12-17 04:04:18 +00:00
Kostya Serebryany
da5390ff5b [libFuzzer] speed up __sanitizer_cov_trace_switch a bit more (remove DIV)
llvm-svn: 290034
2016-12-17 02:23:35 +00:00
Kostya Serebryany
288b21a97f [libFuzzer] remove stale test
llvm-svn: 290033
2016-12-17 02:18:59 +00:00
Matthias Braun
cf2df3b1a5 Move test to correct directory
See also test/CodeGen/MIR/README

llvm-svn: 290032
2016-12-17 02:16:26 +00:00
Kostya Serebryany
610a56aecb [libFuzzer] when tracing switch statements, handle only one case at a time (to make things faster). Also ensure that the signals from value profile do not intersect with the regular coverage
llvm-svn: 290031
2016-12-17 02:03:34 +00:00
Evgeniy Stepanov
eaffeadc52 Revert "[GVNHoist] Move GVNHoist to function simplification part of pipeline."
This reverts r289696, which caused TSan perf regression.

See PR31382.

llvm-svn: 290030
2016-12-17 01:53:15 +00:00
Evgeniy Stepanov
cbf1ce0628 Fix compilation.
unittests/ADT/TwineTest.cpp:106:38: error: field 'Count' will be initialized after base 'llvm::FormatAdapter<int>' [-Werror,-Wreorder]
    explicit formatter(int &Count) : Count(Count), FormatAdapter(0) {}

llvm-svn: 290029
2016-12-17 01:31:46 +00:00
Eugene Zelenko
b47d3bbd4a [Hexagon] Other attempt to fix build with enabled asserts broken in 290024 (NFC).
llvm-svn: 290028
2016-12-17 01:29:35 +00:00
Eugene Zelenko
93a486cd13 [Hexagon] Fix build with enabled asserts broken in 290024 (NFC).
llvm-svn: 290027
2016-12-17 01:17:18 +00:00
Matthias Braun
15bd379dfe AArch64CollectLOH: Rewrite as block-local analysis.
Re-apply r288561: Liveness tracking should be correct now after r290014.

Previously this pass was using up to 5% compile time in some cases which
is a bit much for what it is doing. The pass featured a full blown
data-flow analysis which in the default configuration was restricted to a
single block.

This rewrites the pass under the assumption that we only ever work on a
single block. This is done in a single pass maintaining a state machine
per general purpose register to catch LOH patterns.

Differential Revision: https://reviews.llvm.org/D27329

llvm-svn: 290026
2016-12-17 01:15:59 +00:00
Eugene Zelenko
52abb75b91 [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 290024
2016-12-17 01:09:05 +00:00
Vedant Kumar
896c96fa1e Retry: [BPI] Use a safer constructor to calculate branch probabilities
BPI may trigger signed overflow UB while computing branch probabilities for
cold calls or to unreachables. For example, with our current choice of weights,
we'll crash if there are >= 2^12 branches to an unreachable.

Use a safer BranchProbability constructor which is better at handling fractions
with large denominators.

Changes since the initial commit:
  - Use explicit casts to ensure that multiplication operands are 64-bit
    ints.

rdar://problem/29368161

Differential Revision: https://reviews.llvm.org/D27862

llvm-svn: 290022
2016-12-17 01:02:08 +00:00
Zachary Turner
36a764a490 Delete unused file.
llvm-svn: 290021
2016-12-17 00:58:19 +00:00
Zachary Turner
7e117aec6b Add support for formatv to llvm::Twine.
Differential Revision: https://reviews.llvm.org/D27835

llvm-svn: 290020
2016-12-17 00:38:15 +00:00
Vedant Kumar
2a685e1c7e Revert "[BPI] Use a safer constructor to calculate branch probabilities"
This reverts commit r290016. It breaks this bot, even though the test
passes locally:

  http://bb.pgr.jp/builders/ninja-x64-msvc-RA-centos6/builds/32956/

AnalysisTests: /home/bb/ninja-x64-msvc-RA-centos6/llvm-project/llvm/lib/Support/BranchProbability.cpp:52: static llvm::BranchProbability llvm::BranchProbability::getBranchProbability(uint64_t, uint64_t): Assertion `Numerator <= Denominator && "Probability cannot be bigger than 1!"' failed.
llvm-svn: 290019
2016-12-17 00:19:06 +00:00
Mike Aizatsky
6397944878 [libfuzzer] removing experimental FuzzerFnAdapter
Summary: This is superceded by protobuf mutation work.

Reviewers: kcc

Subscribers: mgorny

Differential Revision: https://reviews.llvm.org/D27865

llvm-svn: 290018
2016-12-17 00:12:13 +00:00
Mike Aizatsky
3263f83191 [sancov] skip dead files from computations
Differential Revision: https://reviews.llvm.org/D27863

llvm-svn: 290017
2016-12-17 00:11:48 +00:00
Vedant Kumar
0a726263ad [BPI] Use a safer constructor to calculate branch probabilities
BPI may trigger signed overflow UB while computing branch probabilities
for cold calls or to unreachables. For example, with our current choice
of weights, we'll crash if there are >= 2^12 branches to an unreachable.

Use a safer BranchProbability constructor which is better at handling
fractions with large denominators.

rdar://problem/29368161

Differential Revision: https://reviews.llvm.org/D27862

llvm-svn: 290016
2016-12-17 00:09:51 +00:00
Lang Hames
ae4ded751e [ORC][RPC] Use more meaningful template parameter names.
llvm-svn: 290015
2016-12-17 00:04:24 +00:00
Matthias Braun
08027a118d AArch64: Enable post-ra liveness updates
Differential Revision: https://reviews.llvm.org/D27559

llvm-svn: 290014
2016-12-16 23:55:43 +00:00
Matthias Braun
c1899a2b46 BranchRelaxation: Recompute live-ins when splitting a block
Factors out and reuses live-in computation code from BranchFolding.

Differential Revision: https://reviews.llvm.org/D27558

llvm-svn: 290013
2016-12-16 23:55:37 +00:00
Paul Robinson
c9e7578fcb Allow "line 0" to be the first explicit debug location in a function.
Feedback on r289468 from Adrian Prantl.

llvm-svn: 290012
2016-12-16 23:54:33 +00:00
David Blaikie
a43c054f0e GDB pretty printers: Basic DenseMap support
Still prints the empty/tombstone keys (which some people would prefer,
but I find pretty noisy) because I haven't yet found a reliable way to
skip them (it requires calling into the running process to do so, which
isn't ideal for a pretty printer (doesn't work on a core file, for
example) - and gdb's ability to do so (or my ability to figure out how
to get gdb to do so) is limited) left some breadcrumbs for the next
person who might try to address that.

llvm-svn: 290011
2016-12-16 23:53:14 +00:00
Peter Collingbourne
c9fc226be2 ModuleSummaryAnalysis: Remove some duplicate code. NFCI.
llvm-svn: 290003
2016-12-16 23:19:02 +00:00
Kevin Enderby
5bbb04ae53 Fix a bugs with using some Mach-O command line flags like "-arch armv7m".
The Mach-O command line flag like "-arch armv7m" does not match the
arch name part of its llvm Triple which is "thumbv7m-apple-darwin”.

I think the best way to fix this is to have
llvm::object::MachOObjectFile::getArchTriple() optionally return the
name of the Mach-O arch flag that would be used with -arch that
matches the CPUType and CPUSubType.  Then change
llvm::object::MachOUniversalBinary::ObjectForArch::getArchTypeName()
to use that and change it to getArchFlagName() as the type name is
really part of the Triple and the -arch flag name is a Mach-O thing
for a specific Triple with a specific Mcpu value.

rdar://29663637

llvm-svn: 290001
2016-12-16 22:54:02 +00:00