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Commit Graph

11834 Commits

Author SHA1 Message Date
Dan Gohman
180422793f Add an "IsBottomUp" member function to FastISel, which will be used to
support a new bottom-up mode.

llvm-svn: 103138
2010-05-05 23:58:35 +00:00
Daniel Dunbar
258ede3795 MC: Make setVariableValue check the redefinition condition a bit more strongly.
llvm-svn: 103110
2010-05-05 19:00:56 +00:00
Evan Cheng
d7bc27a079 Move REG_SEQUENCE removal to 2addr pass.
llvm-svn: 103109
2010-05-05 18:45:40 +00:00
Chris Lattner
b9f858943a Implement rdar://7415680 - Twine integer support lacks greatness
Microoptimize Twine's with unsigned and int to not pin their value to
the stack.  This saves stack space in common cases and allows mem2reg
in the caller.  A simple example is:

void foo(const Twine &);
void bar(int x) {
  foo("xyz: " + Twine(x));
}

Before:

__Z3bari:
	subq	$40, %rsp
	movl	%edi, 36(%rsp)
	leaq	L_.str3(%rip), %rax
	leaq	36(%rsp), %rcx
	leaq	8(%rsp), %rdi
	movq	%rax, 8(%rsp)
	movq	%rcx, 16(%rsp)
	movb	$3, 24(%rsp)
	movb	$7, 25(%rsp)
	callq	__Z3fooRKN4llvm5TwineE
	addq	$40, %rsp
	ret

After:

__Z3bari:
	subq	$24, %rsp
	leaq	L_.str3(%rip), %rax
	movq	%rax, (%rsp)
	movslq	%edi, %rax
	movq	%rax, 8(%rsp)
	movb	$3, 16(%rsp)
	movb	$7, 17(%rsp)
	leaq	(%rsp), %rdi
	callq	__Z3fooRKN4llvm5TwineE
	addq	$24, %rsp
	ret

It saves 16 bytes of stack and one instruction in this case.

llvm-svn: 103107
2010-05-05 18:40:33 +00:00
Evan Cheng
25c07ac593 Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.
80      %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0
. . .
120     %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0

llvm-svn: 103102
2010-05-05 18:27:40 +00:00
Daniel Dunbar
d2ac9dc48b MC: Rename MCSymbol::{g,s}etValue -> MCSymbol::{g,s}etVariableValue.
llvm-svn: 103095
2010-05-05 17:41:00 +00:00
Daniel Dunbar
f5dc70a7d1 MC/Mach-O/x86_64: Relocations in debug sections should use local relocations
when possible.
 - <rdar://problem/7934873>

llvm-svn: 103092
2010-05-05 17:22:39 +00:00
Bob Wilson
e81252b747 Combine the implementations of the core part of the SSAUpdater and
MachineSSAUpdater to avoid duplicating all the code.

llvm-svn: 103060
2010-05-04 23:18:19 +00:00
Daniel Dunbar
711d2427dd MC/Matcher: Add support for over-riding the default MatchInstruction function
name (for example, to allow targets to interpose the actual MatchInstruction
function).

llvm-svn: 102987
2010-05-04 00:33:13 +00:00
Dan Gohman
8bfd5f99b5 Factor out FastISel's code for materializing constants and other values
in registers into a separate function to de-couple it from the
top-down-specific logic in getRegForValue.

llvm-svn: 102975
2010-05-03 23:36:34 +00:00
Duncan Sands
153ad3b903 Remove the -enable-sjlj-eh option, which doesn't do anything.
Remove the -enable-eh option which is only used by the JIT,
and replace it with -jit-enable-eh.

llvm-svn: 102865
2010-05-02 15:36:26 +00:00
David Chisnall
52a91e993b Added a variant of InlineCostAnalyzer::getInlineCost() that takes the called function as an explicit argument, for use when inlining function pointers.
llvm-svn: 102841
2010-05-01 15:47:41 +00:00
Chris Lattner
66d1a6ad69 rename InlineInfo.DevirtualizedCalls -> InlinedCalls to
reflect that it includes all inlined calls now, not just
devirtualized ones.

llvm-svn: 102824
2010-05-01 01:26:13 +00:00
Evan Cheng
8bd004b033 Add a pseudo instruction REG_SEQUENCE that takes a list of registers and
sub-register indices and outputs a single super register which is formed from
a consecutive sequence of registers.

This is used as register allocation / coalescing aid and it is useful to
represent instructions that output register pairs / quads. For example,
v1024, v1025 = vload <address>
where v1024 and v1025 forms a register pair.

This really should be modelled as
v1024<3>, v1025<4> = vload <address>
but it would violate SSA property before register allocation is done.

Currently we use insert_subreg to form the super register:
v1026 = implicit_def
v1027 - insert_subreg v1026, v1024, 3
v1028 = insert_subreg v1027, v1025, 4
...
      = use v1024
      = use v1028

But this adds pseudo live interval overlap between v1024 and v1025.

We can now modeled it as
v1024, v1025 = vload <address>
v1026 = REG_SEQUENCE v1024, 3, v1025, 4
...
      = use v1024
      = use v1026

After coalescing, it will be
v1026<3>, v1025<4> = vload <address>
...
      = use v1026<3>
      = use v1026

llvm-svn: 102815
2010-05-01 00:28:44 +00:00
Dan Gohman
68f04d06c8 Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.

llvm-svn: 102809
2010-05-01 00:01:06 +00:00
Dan Gohman
73722062f7 Update BitVectorTest.cpp to stay in sync with SmallBitVectorTest.cpp,
and fix a bug in BitVector's reference proxy class which this exposed.

llvm-svn: 102768
2010-04-30 20:50:28 +00:00
Devang Patel
52c2d4d378 Attach AT_APPLE_optimized attribute to optimized function's debug info.
llvm-svn: 102743
2010-04-30 19:38:23 +00:00
Dan Gohman
cfd0d9393a Add some comments.
llvm-svn: 102731
2010-04-30 18:33:41 +00:00
Dan Gohman
a5ef1ab165 Properly escape edge source and destination labels.
llvm-svn: 102728
2010-04-30 18:27:57 +00:00
Benjamin Kramer
f3e9546fc1 SmallBitVector: Rework find_first/find_next and tweak test to test them (at least on 64 bit platforms).
llvm-svn: 102712
2010-04-30 13:40:27 +00:00
Benjamin Kramer
e4ebf09068 Implement a read/write operator[] for SmallBitVector with a proxy class.
llvm-svn: 102709
2010-04-30 12:29:39 +00:00
Benjamin Kramer
e59c44ea79 Make sure SmallBitVector actually uses the small case and fix latent bugs.
- We can't use PointerIntPair here since we require the discrimination bit to be in the LSB.

llvm-svn: 102707
2010-04-30 11:34:01 +00:00
Chris Lattner
105e312fb4 add some more (void)'s to prototypes for PR6961
llvm-svn: 102667
2010-04-29 23:27:32 +00:00
Devang Patel
432efd232d Missed earlier. This is part of previous check-in. (r102661 - refactor.)
llvm-svn: 102662
2010-04-29 20:48:12 +00:00
Evan Cheng
f0f25bd8e6 Add DenseMapInfo for int.
llvm-svn: 102652
2010-04-29 18:50:35 +00:00
Dan Gohman
78c9ada867 Elaborate on a comment.
llvm-svn: 102637
2010-04-29 16:57:54 +00:00
Duncan Sands
c83ef78bd3 Fix comment typo.
llvm-svn: 102612
2010-04-29 12:32:45 +00:00
Torok Edwin
9ddbae859f Fix PR6910.
Limit alignment in SmallVector 8, otherwise GCC assumes 16 byte alignment.
opetaror new, and malloc only return 8-byte aligned memory on 32-bit Linux,
which cause a crash if code is compiled with -O3 (or -ftree-vectorize) and some
SmallVector code is vectorized.

llvm-svn: 102604
2010-04-29 06:43:12 +00:00
Nick Lewycky
2b713db8ed Fix typo.
llvm-svn: 102599
2010-04-29 05:54:29 +00:00
Mon P Wang
bfebbd889a Add support for assemblers that don't support periods in a name
llvm-svn: 102594
2010-04-29 04:00:56 +00:00
Evan Cheng
6764226f8c Frame index can be negative.
llvm-svn: 102577
2010-04-29 01:13:30 +00:00
Evan Cheng
a02c9072fc Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done.
llvm-svn: 102554
2010-04-28 23:08:54 +00:00
Chris Lattner
e9c0d1574a declare targets with (void) instead of () since this is a C header.
Patch by Lars R in PR6961.

llvm-svn: 102523
2010-04-28 20:24:45 +00:00
Chris Lattner
9867c1a075 Rework global alignment computation again. Now we do round up
alignment of globals to the preferred alignment, but only when
there is no section specified on the global (by far the common
case).

llvm-svn: 102515
2010-04-28 19:58:07 +00:00
Devang Patel
570e9d53a7 Emit debug info for byval parameters.
llvm-svn: 102486
2010-04-28 01:39:28 +00:00
Chris Lattner
19715b76b7 further simplify EmitAlignment by eliminating the
ForcedAlignBits argument, tweaking the single client of it.

llvm-svn: 102484
2010-04-28 01:08:40 +00:00
Chris Lattner
d14f04d0f7 remove a dead argument to EmitAlignment.
llvm-svn: 102483
2010-04-28 01:06:02 +00:00
Chris Lattner
2ceb31a172 Fix a problem that lower invoke has with allocas (PR6694), and
add a version of createLowerInvokePass that allows the client
to specify whether it wants "expensive" or "cheap" lowering.

Patch by Alex Mac!

llvm-svn: 102402
2010-04-26 23:49:32 +00:00
Chris Lattner
9292bad5f5 on darwin empty functions need to codegen into something of non-zero length,
otherwise labels get incorrectly merged.  We handled this by emitting a 
".byte 0", but this isn't correct on thumb/arm targets where the text segment
needs to be a multiple of 2/4 bytes.  Handle this by emitting a noop.  This
is more gross than it should be because arm/ppc are not fully mc'ized yet.

This fixes rdar://7908505

llvm-svn: 102400
2010-04-26 23:37:21 +00:00
Dale Johannesen
4327f03110 Add DBG_VALUE handling for byval parameters; this
produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.

llvm-svn: 102372
2010-04-26 20:06:49 +00:00
Dale Johannesen
c4d2156a7c Add PPC AsmPrinter handling for target-specific form of
DBG_VALUE, and a cautionary comment.

llvm-svn: 102371
2010-04-26 20:05:01 +00:00
Bob Wilson
01b2bccb00 Update MachineSSAUpdater with the same changes I made for the IR-level
SSAUpdater.  I'm going to try to refactor this to share most of the code
between them.

llvm-svn: 102353
2010-04-26 17:40:49 +00:00
Evan Cheng
dc0ce1eae8 - Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.

llvm-svn: 102323
2010-04-26 07:38:55 +00:00
Dale Johannesen
d27eedab6d Stop abusing EmitInstrWithCustomInserter for target-dependent
form of DEBUG_VALUE, as it doesn't have reasonable default
behavior for unsupported targets.  Add a new hook instead.
No functional change.

llvm-svn: 102320
2010-04-25 21:33:54 +00:00
Dan Gohman
0fbfae5efe Add a new utility function SimplifyICmpOperands. Much of this code is
refactored out of ScalarEvolution::isImpliedCond, which will be updated
to use this new utility routine soon.

llvm-svn: 102229
2010-04-24 01:28:42 +00:00
Chris Lattner
a61306d68f switch InlineInfo.DevirtualizedCalls's list to be of WeakVH.
This fixes a bug where calls inlined into an invoke would get
changed into an invoke but the array would keep pointing to
the (now dead) call.  The improved inliner behavior is still
disabled for now.

llvm-svn: 102196
2010-04-23 18:37:01 +00:00
Dan Gohman
6680b97d89 Move FastISel's HandlePHINodesInSuccessorBlocks call down into FastISel
itself too.

llvm-svn: 102176
2010-04-23 15:29:50 +00:00
Chris Lattner
5d87e1be44 The inliner was choosing to not consider call sites
that appear in the SCC as a result of inlining as candidates
for inlining.  Change this so that it *does* consider call 
sites that change from being indirect to being direct as a
result of inlining.  This allows it to completely 
"devirtualize" the testcase.

llvm-svn: 102146
2010-04-22 23:37:35 +00:00
Chris Lattner
5edbd34cff refactor the interface to InlineFunction so that most of the in/out
arguments are handled with a new InlineFunctionInfo class.  This 
makes it easier to extend InlineFunction to return more info in the
future.

llvm-svn: 102137
2010-04-22 23:07:58 +00:00
Dan Gohman
d819e7fc95 Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
and into SelectionDAGBuilder and FastISel.

llvm-svn: 102123
2010-04-22 20:46:50 +00:00