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2094 Commits

Author SHA1 Message Date
Chris Lattner
7476a6c710 add a note 
llvm-svn: 29722
 2006-08-16 02:47:44 +00:00
Nate Begeman
0e92042770 Emit .set directives for jump table entries when possible, which reduces 
the number of relocations in object files, shrinkifying them.

llvm-svn: 29650
 2006-08-12 21:29:52 +00:00
Chris Lattner
92774dab5c eliminate extraneous blank line 
llvm-svn: 29627
 2006-08-11 21:08:16 +00:00
Chris Lattner
8ca6e82bce Eliminate use of getNode that takes a vector. 
llvm-svn: 29614
 2006-08-11 17:38:39 +00:00
Evan Cheng
6053206580 Match tablegen changes. 
llvm-svn: 29604
 2006-08-11 09:08:15 +00:00
Evan Cheng
34a49551f5 CALLSEQ_* produces chain even if that's not needed. 
llvm-svn: 29603
 2006-08-11 09:03:33 +00:00
Evan Cheng
131c832304 Convert more calls of getNode() that takes a vector to pass in the start of an array. 
llvm-svn: 29601
 2006-08-11 07:35:45 +00:00
Chris Lattner
7b1362fa52 Start eliminating temporary vectors used to create DAG nodes. Instead, pass 
in the start of an array and a count of operands where applicable.  In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap.  In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.

I updated a lot of code calling getNode that takes a vector, but ran out of
time.  The rest of the code should be updated, and these methods should be
removed.

We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.

It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.

llvm-svn: 29566
 2006-08-08 02:23:42 +00:00
Evan Cheng
01cd84d113 Eliminate reachability matrix. It has to be calculated before any instruction 
selection is done. That's rather expensive especially in situations where it
isn't really needed.
Move back to a searching the predecessors, but make use of topological order
to trim the search space.

llvm-svn: 29559
 2006-08-08 00:31:00 +00:00
Evan Cheng
d18be1d9c1 Match tablegen isel changes. 
llvm-svn: 29549
 2006-08-07 22:28:20 +00:00
Evan Cheng
5d8f227a4a Make XMM, FP register dwarf register numbers consistent with gcc. 
llvm-svn: 29543
 2006-08-07 21:02:39 +00:00
Jim Laskey
a2080b26b9 Get darwin intel debugging up and running. 
llvm-svn: 29504
 2006-08-03 17:27:09 +00:00
Evan Cheng
445674348f Reflect change to AssignTopologicalOrder(). 
llvm-svn: 29480
 2006-08-02 22:01:32 +00:00
Evan Cheng
6fd2b20b8a Use of vector<bool> causes some horrendous compile time regression (2x)! 
Looks like libstdc++ implementation does not scale very well. Switch back
to using directly managed arrays.

llvm-svn: 29469
 2006-08-02 09:18:33 +00:00
Nate Begeman
7d4b0d0b9b Update the readme to remove duplicate information and clarify the loop 
problem.

llvm-svn: 29468
 2006-08-02 05:31:20 +00:00
Nate Begeman
d22dd0f92b Disable LSR at -fast 
llvm-svn: 29467
 2006-08-02 05:29:40 +00:00
Evan Cheng
29d6f9d252 Factor topological order code to SelectionDAG. Clean up. 
llvm-svn: 29430
 2006-08-01 08:17:22 +00:00
Chris Lattner
26ff12f7f5 Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll. 
The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.

llvm-svn: 29420
 2006-07-31 23:26:50 +00:00
Evan Cheng
e4c19806cd Can't spell. 
llvm-svn: 29383
 2006-07-28 06:33:41 +00:00
Evan Cheng
8ea5ac0abd Some clean up. 
llvm-svn: 29382
 2006-07-28 06:05:06 +00:00
Evan Cheng
5f0e94c299 Rename IsFoldableBy to CanBeFoldedleBy 
llvm-svn: 29376
 2006-07-28 01:03:48 +00:00
Evan Cheng
c43a75b7d4 Node selected into address mode cannot be folded. 
llvm-svn: 29374
 2006-07-28 00:49:31 +00:00
Evan Cheng
8920047e85 Another duh. Determine topological order before any target node is added. 
llvm-svn: 29371
 2006-07-28 00:10:59 +00:00
Evan Cheng
9d43eb616a Brain cramp.. 
llvm-svn: 29370
 2006-07-27 23:35:40 +00:00
Evan Cheng
24b41a766b Allocating too large an array for ReachibilityMatrix. 
llvm-svn: 29367
 2006-07-27 22:35:40 +00:00
Evan Cheng
17ccdcc415 Calculate the portion of reachbility matrix on demand. 
llvm-svn: 29366
 2006-07-27 22:10:00 +00:00
Evan Cheng
6a126e3adb isNonImmUse is replaced by IsFoldableBy 
llvm-svn: 29365
 2006-07-27 21:19:10 +00:00
Evan Cheng
4ceeac4159 Resolve BB references with relocation. 
llvm-svn: 29351
 2006-07-27 18:21:10 +00:00
Evan Cheng
dbcca8f422 Use reachbility information to determine whether a node can be folded into another during isel. 
llvm-svn: 29346
 2006-07-27 16:44:36 +00:00
Jim Laskey
046abcdbec Use the predicate. 
llvm-svn: 29322
 2006-07-27 02:05:13 +00:00
Nate Begeman
3d5f5b4e8b Support jump tables when in PIC relocation model 
llvm-svn: 29318
 2006-07-27 01:13:04 +00:00
Jim Laskey
f35dd1a670 Prevent creation of MachineDebugInfo for intel unless it is darwin. RC842. 
llvm-svn: 29317
 2006-07-27 01:12:23 +00:00
Evan Cheng
27c53dc36e New entry. 
llvm-svn: 29310
 2006-07-26 21:49:52 +00:00
Chris Lattner
b4165c39d7 Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC. 
llvm-svn: 29307
 2006-07-26 21:12:04 +00:00
Evan Cheng
beeb4e5c8c - Refactor the code that resolve basic block references to a TargetJITInfo 
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
  of code is emitted to flush the icache. This ensures correct execution
  on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.

llvm-svn: 29276
 2006-07-25 20:40:54 +00:00
Evan Cheng
692215be9c Can't commute shufps. The high / low parts elements come from different vectors. 
llvm-svn: 29275
 2006-07-25 20:25:40 +00:00
Evan Cheng
56e0c65937 Done. 
llvm-svn: 29262
 2006-07-21 23:07:23 +00:00
Evan Cheng
ed1c019899 This opt is now handled in DAG combine. 
llvm-svn: 29243
 2006-07-21 08:26:46 +00:00
Evan Cheng
56434b7578 A splat of a vector constant of all zero or all one is the vector constant. 
llvm-svn: 29234
 2006-07-20 23:09:47 +00:00
Evan Cheng
a634c2b838 Missing a space. 
llvm-svn: 29233
 2006-07-20 22:52:28 +00:00
Evan Cheng
100096b2bb Clean up. 
llvm-svn: 29228
 2006-07-20 21:37:39 +00:00
Evan Cheng
6e440c39da New entry. 
llvm-svn: 29215
 2006-07-19 21:29:30 +00:00
Jim Laskey
5d139b794a Do once flag never set to true. 
llvm-svn: 29214
 2006-07-19 19:33:08 +00:00
Jim Laskey
88d7595eb3 Tidy up a few things. 
llvm-svn: 29213
 2006-07-19 19:32:06 +00:00
Jim Laskey
d31b3778d8 Reduce size of routine. Shrinks .o by 37%. 
llvm-svn: 29210
 2006-07-19 17:53:32 +00:00
Jim Laskey
227b585c6e Bug#834 ICE (crash in code generator?) when building PCH . 
Missing Darwin check in Intel ATT ASM printer.

llvm-svn: 29204
 2006-07-19 11:54:50 +00:00
Evan Cheng
793f3d97ff Misc. new entry. 
llvm-svn: 29202
 2006-07-19 06:06:24 +00:00
Evan Cheng
a2eaed93a0 INC / DEC instructions have shorter code size than ADD32ri8, etc. 
llvm-svn: 29194
 2006-07-19 00:27:29 +00:00
Chris Lattner
0f2560a313 Add an out-of-line virtual method for X86DwarfWriter to give it a home. 
llvm-svn: 29153
 2006-07-14 23:05:05 +00:00
Chris Lattner
d0202bbed3 Add information preventing several register class constraints from working. 
This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll

llvm-svn: 29118
 2006-07-12 16:59:49 +00:00
Evan Cheng
db529debec Emit inc / dec of registers as one byte instruction. 
llvm-svn: 29110
 2006-07-11 19:49:49 +00:00
Chris Lattner
b75fe307e1 Implement the inline asm 'A' constraint. This implements PR825 and 
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll

llvm-svn: 29101
 2006-07-11 02:54:03 +00:00
Evan Cheng
7c11ad2f8d New entry. 
llvm-svn: 29091
 2006-07-10 21:42:16 +00:00
Evan Cheng
b5e6a4a74d Fixed stack objects do not specify alignments, but their offsets are known. 
Use that information when doing the transformation to merge multiple loads
into a 128-bit load.

llvm-svn: 29090
 2006-07-10 21:37:44 +00:00
Chris Lattner
18c77b92a9 Mark internal function static 
llvm-svn: 29085
 2006-07-10 19:53:12 +00:00
Evan Cheng
1d48a494a2 X86 target specific DAG combine: turn build_vector (load x), (load x+4), 
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).

e.g.

__m128 test(float a, float b, float c, float d) {
  return _mm_set_ps(d, c, b, a);
}

_test:
        movups 4(%esp), %xmm0
        ret

llvm-svn: 29042
 2006-07-07 08:33:52 +00:00
Evan Cheng
801ea78096 Reorg. No functionality change. 
llvm-svn: 28999
 2006-07-05 22:17:51 +00:00
Evan Cheng
d75aed0d60 Fix JIT on non MacOS X i386 systems. 
llvm-svn: 28992
 2006-07-05 07:09:13 +00:00
Evan Cheng
0df13a4f2a Should just use xorps to clear XMM registers for all data types. pxor is also one byte longer. 
llvm-svn: 28984
 2006-06-29 18:04:54 +00:00
Evan Cheng
5a7af4f99f Let X86CompilationCallback pass previous frame and return address to X86CompilationCallback2. Remove alloca hack. 
llvm-svn: 28982
 2006-06-29 01:48:36 +00:00
Evan Cheng
1d5fa40da3 Add shift and rotate by 1 instructions / patterns. 
llvm-svn: 28980
 2006-06-29 00:36:51 +00:00
Evan Cheng
803891eaa8 Always use xorps to clear XMM registers. 
llvm-svn: 28979
 2006-06-29 00:34:23 +00:00
Evan Cheng
1b53896495 Move .literal4 and .literal8 support into AsmPrinter.cpp 
llvm-svn: 28978
 2006-06-29 00:33:06 +00:00
Chris Lattner
adc7078c98 Hide x86 symbols 
llvm-svn: 28976
 2006-06-28 23:27:49 +00:00
Evan Cheng
36d3fccf4b Doh. 
llvm-svn: 28963
 2006-06-28 17:56:43 +00:00
Evan Cheng
e123f47232 Oops. Need to keep CP index. 
llvm-svn: 28958
 2006-06-28 07:55:24 +00:00
Evan Cheng
3963b5ee02 Darwin puts float and double literal constants into literal4 and literal8 sections. 
llvm-svn: 28957
 2006-06-28 07:35:41 +00:00
Evan Cheng
a37a2f781e Remove dead code. 
llvm-svn: 28938
 2006-06-27 20:34:14 +00:00
Evan Cheng
db5c7909f5 Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary. 
llvm-svn: 28910
 2006-06-24 08:36:10 +00:00
Jim Laskey
a8284f65e1 Add and sort "sections" in debug lines. This always stepping through 
code in sections other than ".text", including weak sections like ctors and
dtors.

llvm-svn: 28909
 2006-06-23 12:51:53 +00:00
Evan Cheng
d8090f4666 Eliminate unneeded parameter. 
llvm-svn: 28907
 2006-06-22 00:02:55 +00:00
Evan Cheng
420ea2c264 variable_ops instructions such as call can have any number of operands. 
llvm-svn: 28906
 2006-06-21 23:37:07 +00:00
Chris Lattner
2e64872117 Remove some ugly now-redundant casts. 
llvm-svn: 28864
 2006-06-20 00:25:29 +00:00
Chris Lattner
fbea064e90 Fix some mismatched type constraints 
llvm-svn: 28862
 2006-06-20 00:12:37 +00:00
Evan Cheng
98d508af83 Minor clean up. 
llvm-svn: 28860
 2006-06-19 19:25:30 +00:00
Evan Cheng
e3b8db6dda A new entry. 
llvm-svn: 28848
 2006-06-17 00:45:49 +00:00
Evan Cheng
78e6cefad9 Later models likely to have Yonah like attributes. 
llvm-svn: 28843
 2006-06-16 21:58:49 +00:00
Chris Lattner
6a9ec7e80e Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.

llvm-svn: 28830
 2006-06-16 18:22:52 +00:00
Chris Lattner
4c7ba81f59 Add a note that Nate noticed. 
llvm-svn: 28808
 2006-06-15 21:33:31 +00:00
Evan Cheng
bc79e5f0e4 Type of vector extract / insert index operand should be iPTR. 
llvm-svn: 28796
 2006-06-15 08:14:54 +00:00
Evan Cheng
0e2235b803 X86 call instructions can take variable number of operands. Parameters of 
vector types are passed via XMM registers.

llvm-svn: 28789
 2006-06-14 22:24:55 +00:00
Chris Lattner
20c3c42c02 add a note 
llvm-svn: 28787
 2006-06-14 21:26:18 +00:00
Evan Cheng
242ebc9ab3 Add argument registers to the end of call operand list (partial fix). 
llvm-svn: 28783
 2006-06-14 18:17:40 +00:00
Jim Laskey
69d5018a05 Place dwarf headers at earliest possible point. Well behaved when skipping 
functions.

llvm-svn: 28781
 2006-06-14 11:35:03 +00:00
Evan Cheng
2a0f3b2e79 Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov. 
llvm-svn: 28764
 2006-06-13 05:14:44 +00:00
Evan Cheng
9e5e585c89 Comments to appease sabre. 
llvm-svn: 28737
 2006-06-09 06:25:10 +00:00
Evan Cheng
8f46dba83d Minor compilation speed improvement. 
llvm-svn: 28736
 2006-06-09 06:24:42 +00:00
Chris Lattner
82b121e762 Add support for "m" inline asm constraints. 
llvm-svn: 28728
 2006-06-08 18:03:49 +00:00
Evan Cheng
2da9d803a4 Added X86FunctionInfo subclass of MachineFunction to record whether the 
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.

llvm-svn: 28703
 2006-06-06 23:30:24 +00:00
Evan Cheng
8d9b7650f1 A few new entries. 
llvm-svn: 28683
 2006-06-04 09:08:00 +00:00
Evan Cheng
6fd191494f Be consistent with gcc. 
llvm-svn: 28682
 2006-06-04 07:24:07 +00:00
Evan Cheng
696779cea0 Cygwin support. Patch by Anton Korobeynikov! 
llvm-svn: 28672
 2006-06-02 22:38:37 +00:00
Evan Cheng
ddb0525a32 Use xor to clear a register. 
llvm-svn: 28667
 2006-06-02 21:20:34 +00:00
Evan Cheng
ed96100b00 Incorrect AT&T opcode. 
llvm-svn: 28666
 2006-06-02 21:09:10 +00:00
Chris Lattner
ac3d91f023 Silence -pedantic warning. 
llvm-svn: 28630
 2006-06-01 17:13:10 +00:00
Evan Cheng
4966cad9b5 Typos 
llvm-svn: 28617
 2006-06-01 05:53:27 +00:00
Evan Cheng
15c1f84762 Remove a warning 
llvm-svn: 28607
 2006-06-01 00:30:39 +00:00
Evan Cheng
4488266c46 Rename ASM modifier trunc8, trunc16 to subreg8, subreg16. 
llvm-svn: 28606
 2006-05-31 22:34:26 +00:00
Evan Cheng
f90443c471 Sign extender 
llvm-svn: 28603
 2006-05-31 22:05:11 +00:00
Evan Cheng
889544823a Rename instructions for consistency sake. 
llvm-svn: 28594
 2006-05-31 19:00:07 +00:00
Evan Cheng
abbbe57ba2 Select vector_shuffle v1, undef <2, 3, ?, ?> to MOVHLPS. 
llvm-svn: 28582
 2006-05-31 00:51:37 +00:00
Evan Cheng
82db95cd32 Remove dead code. 
llvm-svn: 28581
 2006-05-31 00:50:42 +00:00
Evan Cheng
8dc7251083 A new entry 
llvm-svn: 28579
 2006-05-30 23:56:31 +00:00
Evan Cheng
c024ad7f32 MAXP{D|S} and MINP{D|S} are commutable. 
llvm-svn: 28578
 2006-05-30 23:47:30 +00:00
Evan Cheng
e2397256c1 Commute shufps / shufpd. 
llvm-svn: 28577
 2006-05-30 23:34:30 +00:00
Evan Cheng
88bd79b75b Somehow I lost a condition when I was shuffling some code around. Anyway, 
only transform a shufps to pshufd when the first two operands are the same.

llvm-svn: 28575
 2006-05-30 22:13:36 +00:00
Evan Cheng
bdb6af8e7d Fix a build breaker. 
llvm-svn: 28574
 2006-05-30 21:45:53 +00:00
Evan Cheng
66bfb1dc9a Oops. PSHUFD is only available with SSE2. 
llvm-svn: 28573
 2006-05-30 21:30:59 +00:00
Evan Cheng
03ca651244 Allow shufps x, x, mask to be converted to pshufd x, mask to save a move. 
llvm-svn: 28565
 2006-05-30 20:26:50 +00:00
Evan Cheng
d7e0bab7f0 Remove bogus comment. 
llvm-svn: 28564
 2006-05-30 20:24:48 +00:00
Evan Cheng
ced05ab1b4 Add a note about integer multiplication by constants. 
llvm-svn: 28551
 2006-05-30 07:37:37 +00:00
Evan Cheng
f7637e403f A addressing mode folding enhancement: 
Fold c2 in (x << c1) | c2 where (c2 < c1)
e.g.
int test(int x) {
  return (x << 3) + 7;
}

This can be codegen'd as:
leal 7(,%eax,8), %eax

llvm-svn: 28550
 2006-05-30 06:59:36 +00:00
Evan Cheng
1891844780 Some new entries about truncate / anyext 
llvm-svn: 28548
 2006-05-30 06:23:50 +00:00
Evan Cheng
de0f25081a Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...

llvm-svn: 28510
 2006-05-26 23:10:12 +00:00
Evan Cheng
25db1a52d2 Vector argument must be passed in memory location aligned on 16-byte boundary. 
llvm-svn: 28505
 2006-05-26 20:37:47 +00:00
Evan Cheng
7f468901bb Mac OS X ABI document lied. The first four XMM registers are used to pass 
vector arguments, not three.

llvm-svn: 28504
 2006-05-26 19:22:06 +00:00
Evan Cheng
629df0afb2 Minor update to make the code more clear 
llvm-svn: 28499
 2006-05-26 18:39:59 +00:00
Evan Cheng
bde90b2732 Update more comments. 
llvm-svn: 28498
 2006-05-26 18:37:16 +00:00
Evan Cheng
414c909954 Fix some comments. 
llvm-svn: 28497
 2006-05-26 18:25:43 +00:00
Evan Cheng
a4b6f4749d No need to handle illegal types. 
llvm-svn: 28496
 2006-05-26 18:22:49 +00:00
Evan Cheng
c80154a36e Remove a couple of bogus casts. 
llvm-svn: 28493
 2006-05-26 08:04:31 +00:00
Evan Cheng
77b8eaf292 Minor bug caught by Ashwin Chandra 
llvm-svn: 28491
 2006-05-26 06:22:34 +00:00
Evan Cheng
f610c3e318 Consistency 
llvm-svn: 28488
 2006-05-25 23:31:23 +00:00
Evan Cheng
fb5e64ff9e Some clean up. 
llvm-svn: 28483
 2006-05-25 22:38:31 +00:00
Evan Cheng
ee280ac5d0 Remove some dead code. 
llvm-svn: 28481
 2006-05-25 22:25:52 +00:00
Evan Cheng
564c7ac8f6 X86 / Cygwin asm / alignment fixes. 
Patch contributed by Anton Korobeynikov!

llvm-svn: 28480
 2006-05-25 21:59:08 +00:00
Evan Cheng
abb909e3bb Build breakage. 
llvm-svn: 28475
 2006-05-25 18:56:34 +00:00
Evan Cheng
bb17ad5ffa Switch X86 over to a call-selection model where the lowering code creates 
the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.

llvm-svn: 28463
 2006-05-25 00:59:30 +00:00
Evan Cheng
09942d3f8b Assert if InflightSet is not cleared after instruction selecting a BB. 
llvm-svn: 28459
 2006-05-25 00:24:28 +00:00
Evan Cheng
b040dd86af Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.

llvm-svn: 28454
 2006-05-24 20:46:25 +00:00
Chris Lattner
f604017e47 Patches to make the LLVM sources more -pedantic clean. Patch provided 
by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447
 2006-05-24 17:04:05 +00:00
Chris Lattner
ac9665d682 Fix file header comment 
llvm-svn: 28441
 2006-05-23 23:20:42 +00:00
Evan Cheng
3ef176507d Better way to check for vararg. 
llvm-svn: 28440
 2006-05-23 21:08:24 +00:00
Evan Cheng
65c3f3f26b Remove PreprocessCCCArguments and PreprocessFastCCArguments now that 
FORMAL_ARGUMENTS nodes include a token operand.

llvm-svn: 28439
 2006-05-23 21:06:34 +00:00
Chris Lattner
9aec97df10 Implement an annoying part of the Darwin/X86 abi: the callee of a struct 
return argument pops the hidden struct pointer if present, not the caller.

For example, in this testcase:

struct X { int D, E, F, G; };
struct X bar() {
  struct X a;
  a.D = 0;
  a.E = 1;
  a.F = 2;
  a.G = 3;
  return a;
}
void foo(struct X *P) {
  *P = bar();
}

We used to emit:

_foo:
        subl $28, %esp
        movl 32(%esp), %eax
        movl %eax, (%esp)
        call _bar
        addl $28, %esp
        ret
_bar:
        movl 4(%esp), %eax
        movl $0, (%eax)
        movl $1, 4(%eax)
        movl $2, 8(%eax)
        movl $3, 12(%eax)
        ret

This is correct on Linux/X86 but not Darwin/X86.  With this patch, we now
emit:

_foo:
        subl $28, %esp
        movl 32(%esp), %eax
        movl %eax, (%esp)
        call _bar
***     addl $24, %esp
        ret
_bar:
        movl 4(%esp), %eax
        movl $0, (%eax)
        movl $1, 4(%eax)
        movl $2, 8(%eax)
        movl $3, 12(%eax)
***     ret $4

For the record, GCC emits (which is functionally equivalent to our new code):

_bar:
        movl    4(%esp), %eax
        movl    $3, 12(%eax)
        movl    $2, 8(%eax)
        movl    $1, 4(%eax)
        movl    $0, (%eax)
        ret     $4
_foo:
        pushl   %esi
        subl    $40, %esp
        movl    48(%esp), %esi
        leal    16(%esp), %eax
        movl    %eax, (%esp)
        call    _bar
        subl    $4, %esp
        movl    16(%esp), %eax
        movl    %eax, (%esi)
        movl    20(%esp), %eax
        movl    %eax, 4(%esi)
        movl    24(%esp), %eax
        movl    %eax, 8(%esi)
        movl    28(%esp), %eax
        movl    %eax, 12(%esi)
        addl    $40, %esp
        popl    %esi
        ret

This fixes SingleSource/Benchmarks/CoyoteBench/fftbench with LLC and the
JIT, and fixes the X86-backend portion of PR729.  The CBE still needs to
be updated.

llvm-svn: 28438
 2006-05-23 18:50:38 +00:00
Evan Cheng
c25e986c9f A isel deficiency. 
llvm-svn: 28427
 2006-05-22 05:54:49 +00:00
Evan Cheng
52fde7f5ce Back out indirect branch load folding hack. It broke some tests. 
llvm-svn: 28425
 2006-05-21 06:28:50 +00:00
Owen Anderson
4a78af08aa Make TargetData strings less redundant. 
llvm-svn: 28423
 2006-05-20 23:28:54 +00:00
Evan Cheng
a0bbbba168 - Use of load's chain result should be redirected to load's chain operand. 
If it reads the chain result of the call, then the use, callseq_start,
  and call would form a cycle!
- Don't forget handle node replacement!
- There could also be a TokenFactor between the load and the callseq_start.

llvm-svn: 28420
 2006-05-20 09:21:39 +00:00
Evan Cheng
bb6733743e A new entry 
llvm-svn: 28419
 2006-05-20 07:44:53 +00:00
Evan Cheng
95259a0f68 Missing break statements. 
llvm-svn: 28418
 2006-05-20 07:44:28 +00:00
Evan Cheng
550e73a900 Remove unused patterns. 
llvm-svn: 28417
 2006-05-20 01:40:16 +00:00
Evan Cheng
c68ea538e7 Handle indirect call which folds a load manually. This never matches by 
the TableGen generated code since the load's chain result is read by
the callseq_start node.

llvm-svn: 28416
 2006-05-20 01:36:52 +00:00
Owen Anderson
c6947bf2ce Make all of the TargetMachine subclasses use the new string TargetData methods. 
This is part of the on-going work on PR 761.

llvm-svn: 28414
 2006-05-20 00:24:56 +00:00
Chris Lattner
6d6a4d0e49 CSRet allows varargs 
llvm-svn: 28409
 2006-05-19 21:34:04 +00:00
Chris Lattner
6ab04ce0cd Add a note 
llvm-svn: 28401
 2006-05-19 20:55:31 +00:00
Chris Lattner
49a93a0ec9 Split the SSE readme items out into their own README. 
llvm-svn: 28400
 2006-05-19 20:51:43 +00:00
Chris Lattner
95b6519d62 Split FP-stack notes out of the main readme. Next up: splitting out SSE. 
llvm-svn: 28399
 2006-05-19 20:45:52 +00:00
Chris Lattner
c29ff5f8b1 Particularly ugly code. 
llvm-svn: 28397
 2006-05-19 19:41:33 +00:00
Evan Cheng
fb2038985a These can be transformed into lea as well. Not that we use this feature 
currently...

llvm-svn: 28393
 2006-05-19 18:43:41 +00:00
Evan Cheng
3a90665f14 - Use exact-width integer types, e.g. int32_t, to avoid confusion. 
- Fix a couple of minor bugs in i16immSExt8 and i16immZExt8.
- Added loadiPTR fragment used for indirect jumps and calls.

llvm-svn: 28392
 2006-05-19 18:40:54 +00:00
Evan Cheng
ff19d6478e Explicitly specify MOV32mi can only be used store 32-bit GV, etc. 
llvm-svn: 28390
 2006-05-19 07:30:36 +00:00
Chris Lattner
c0653d237a add a note 
llvm-svn: 28383
 2006-05-18 17:38:16 +00:00
Evan Cheng
d49a6d7065 ImmMask should be 3 for a two-bit field; Compact X86II 
llvm-svn: 28381
 2006-05-18 06:27:15 +00:00
Evan Cheng
667b133ab9 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
llvm-svn: 28378
 2006-05-18 00:12:58 +00:00
Evan Cheng
070813257a Use generic iPTR instead i32 to represent pointer type. 
llvm-svn: 28371
 2006-05-17 21:21:41 +00:00
Evan Cheng
3034b633f6 Another entry 
llvm-svn: 28370
 2006-05-17 21:20:51 +00:00
Evan Cheng
ea24815aa3 Remove PointerType from class Target 
llvm-svn: 28368
 2006-05-17 21:20:27 +00:00
Evan Cheng
d282cb8542 Should pass by reference. 
llvm-svn: 28357
 2006-05-17 19:07:40 +00:00
Evan Cheng
b84a79a336 Another entry 
llvm-svn: 28356
 2006-05-17 19:05:31 +00:00
Chris Lattner
c04371da56 Implement the custom lowering hook right, returning values for all of the 
arguments at once.

llvm-svn: 28327
 2006-05-16 17:14:26 +00:00
Chris Lattner
f501a979ec Fix a bug I introduced yesterday, which broke functions with *no* arguments. 
llvm-svn: 28326
 2006-05-16 17:08:35 +00:00
Evan Cheng
dc9b5f5fc0 X86 integer register classes naming changes. Make them consistent with FP, vector classes. 
llvm-svn: 28324
 2006-05-16 07:21:53 +00:00
Chris Lattner
ba1dfc1da7 Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend, 
it doesn't currently use/maintain the chain properly.  Also, make the
X86ISelLowering.cpp file 80-col clean.

llvm-svn: 28320
 2006-05-16 06:45:34 +00:00
Chris Lattner
dbbbabb17b More coverity fixes 
llvm-svn: 28266
 2006-05-12 21:14:20 +00:00
Chris Lattner
db8caed257 Dead variable 
llvm-svn: 28265
 2006-05-12 21:12:22 +00:00
Evan Cheng
871a83d4d0 Remove dead code 
llvm-svn: 28261
 2006-05-12 19:03:56 +00:00
Owen Anderson
29e4d70aed Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
 2006-05-12 06:33:49 +00:00
Evan Cheng
6a08dd641a Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot 
llvm-svn: 28223
 2006-05-11 07:33:49 +00:00
Evan Cheng
1f5c530d04 Remove a completed entry. 
llvm-svn: 28199
 2006-05-09 06:54:05 +00:00
Chris Lattner
b7152b0b42 Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code. 
llvm-svn: 28194
 2006-05-09 05:33:48 +00:00
Chris Lattner
85032c8c5c MASM doesn't have one of these. 
llvm-svn: 28190
 2006-05-09 05:21:47 +00:00
Chris Lattner
8301da3ffe Preserve prior behavior 
llvm-svn: 28187
 2006-05-09 05:15:24 +00:00
Chris Lattner
0c4a1e56f4 Fix the MASM asmprinter's lies. It does not want to emit code to .text/.data 
it wants it emitted to _text/_data.

llvm-svn: 28185
 2006-05-09 05:12:53 +00:00
Chris Lattner
f45b6d5c08 Split SwitchSection into SwitchTo{Text|Data}Section methods. 
llvm-svn: 28184
 2006-05-09 04:59:56 +00:00
Chris Lattner
5609ba71a5 Another bad case I noticed 
llvm-svn: 28177
 2006-05-08 21:39:45 +00:00
Chris Lattner
4f3345f1f1 add a note 
llvm-svn: 28176
 2006-05-08 21:24:21 +00:00
Evan Cheng
0fb3fc3626 Fixing truncate. Previously we were emitting truncate from r16 to r8 as 
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

llvm-svn: 28164
 2006-05-08 08:01:26 +00:00
Evan Cheng
698b0517b5 Typo's 
llvm-svn: 28158
 2006-05-07 10:10:20 +00:00
Jeff Cohen
248e133255 Fix some loose ends in MASM support. 
llvm-svn: 28148
 2006-05-06 21:27:14 +00:00
Chris Lattner
89fa42b51e Teach the X86 backend about non-i32 inline asm register classes. 
llvm-svn: 28139
 2006-05-06 00:29:37 +00:00
Chris Lattner
12bb901c93 Print *some* grouping around inline asm blocks so we know where they are. 
llvm-svn: 28133
 2006-05-05 21:48:50 +00:00
Chris Lattner
a03676690b Teach the code generator to use cvtss2sd as extload f32 -> f64 
llvm-svn: 28131
 2006-05-05 21:35:18 +00:00
Evan Cheng
0e9ec8d566 Need extload patterns after Chris' DAG combiner changes 
llvm-svn: 28127
 2006-05-05 08:23:07 +00:00
Evan Cheng
84612a59c2 Better implementation of truncate. ISel matches it to a pseudo instruction 
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.

llvm-svn: 28119
 2006-05-05 05:40:20 +00:00
Chris Lattner
075404adaa Remove and simplify some more machineinstr/machineoperand stuff. 
llvm-svn: 28105
 2006-05-04 18:16:01 +00:00
Chris Lattner
eb41c99161 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
llvm-svn: 28104
 2006-05-04 18:05:43 +00:00
Chris Lattner
685568510a Move some methods out of MachineInstr into MachineOperand 
llvm-svn: 28102
 2006-05-04 17:52:23 +00:00
Chris Lattner
97f1af2f14 There shalt be only one "immediate" operand type! 
llvm-svn: 28099
 2006-05-04 17:21:20 +00:00
Jeff Cohen
097cc5d00b Make external globals public; other minor cleanup. 
llvm-svn: 28096
 2006-05-04 16:20:22 +00:00
Jeff Cohen
a954c15ea1 Make Intel syntax the default when LLVM is built with VC++. 
llvm-svn: 28095
 2006-05-04 16:19:27 +00:00
Chris Lattner
a39a7f900f Remove a bunch more dead V9 specific stuff 
llvm-svn: 28094
 2006-05-04 01:26:39 +00:00
Chris Lattner
c779fca289 Remove a bunch more SparcV9 specific stuff 
llvm-svn: 28093
 2006-05-04 01:15:02 +00:00
Chris Lattner
ed58ec2a57 Remove some more V9-specific stuff. 
llvm-svn: 28092
 2006-05-04 00:49:59 +00:00
Chris Lattner
0f89e6b11d Remove some more unused stuff from MachineInstr that was leftover from V9. 
llvm-svn: 28091
 2006-05-04 00:44:25 +00:00
Chris Lattner
b14a767a3e Simplify handling of relocations 
llvm-svn: 28090
 2006-05-04 00:42:08 +00:00
Evan Cheng
ef2fbe7460 Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when 
movlps cannot be used (e.g. when load from m64 has multiple uses).

llvm-svn: 28089
 2006-05-03 20:32:03 +00:00
Chris Lattner
f89e1162ad Change from using MachineRelocation ctors to using static methods 
in MachineRelocation to create Relocations.

llvm-svn: 28088
 2006-05-03 20:30:20 +00:00
Chris Lattner
87fa1cef04 inline a simple method 
llvm-svn: 28083
 2006-05-03 17:21:32 +00:00
Chris Lattner
d36b66d6dc Suck block address tracking out of targets into the JIT Emitter. This 
simplifies the MachineCodeEmitter interface just a little bit and makes
BasicBlocks work like constant pools and jump tables.

llvm-svn: 28082
 2006-05-03 17:10:41 +00:00