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Commit Graph

74191 Commits

Author SHA1 Message Date
David Majnemer
1cfeb2ac04 obj2yaml, yaml2obj: Add support for COFF executables
In support of serializing executables, obj2yaml now records the virtual address
and size of sections.  It also serializes whatever we strictly need from
the PE header, it expects that it can reconstitute everything else via
inference.

yaml2obj can reconstitute a fully linked executable.

In order to get executables correctly serialized/deserialized, other
bugs were fixed as a circumstance.  We now properly respect file and
section alignments.  We also avoid writing out string tables unless they
are strictly necessary.

llvm-svn: 221975
2014-11-14 08:15:42 +00:00
NAKAMURA Takumi
d1ba90ee16 SearchForAddressOfSymbol(): Disable 3 symbols, copysignf, fminf, and fmaxf, on msc17. *These were added in VS 2013*
llvm-svn: 221971
2014-11-14 04:53:55 +00:00
Matt Arsenault
2fc74d5147 R600/SI: Make constant array static
llvm-svn: 221965
2014-11-14 02:21:58 +00:00
Justin Bogner
8365fe2ec3 llvm-cov: Sink some reporting logic into CoverageMapping
This teaches CoverageMapping::getCoveredFunctions to filter to a
particular file and uses that to replace most of the logic found in
llvm-cov report.

llvm-svn: 221962
2014-11-14 01:50:32 +00:00
Tim Northover
3a30fb90f5 X86: use getConstant rather than getTargetConstant behind BUILD_VECTOR.
getTargetConstant should only be used when you can guarantee the instruction
selected will be able to cope with the raw value. BUILD_VECTOR is rather too
generic for this so we should use getConstant instead. In that case, an
instruction can still consume the constant, but if it doesn't it'll be
materialised through its own round of ISel.

Should fix PR21352.

llvm-svn: 221961
2014-11-14 01:30:14 +00:00
Duncan P. N. Exon Smith
f5a21bad60 IR: Rewrite uniquing and creation of MDString
Stop using `Value::getName()` to get the string behind an `MDString`.
Switch to `StringMapEntry<MDString>` so that we can find the string by
its coallocation.

This is part of PR21532.

llvm-svn: 221960
2014-11-14 01:17:09 +00:00
David Blaikie
c195bf7317 Fix 80 cols caught by the linter...
We have a linter running in our build now?

llvm-svn: 221957
2014-11-14 00:41:42 +00:00
Reid Kleckner
2a9158eca3 Fix build of Mips code with MSVC by using our macro instead of __attribute__((unused)) directly
llvm-svn: 221956
2014-11-14 00:39:33 +00:00
Reid Kleckner
c90bcabd2d Allow the use of functions as typeinfo in landingpad clauses
This is one step towards supporting SEH filter functions in LLVM.

llvm-svn: 221954
2014-11-14 00:35:50 +00:00
Duncan P. N. Exon Smith
64f455849e IR: Make MDString::getName() private
Hide the fact that `MDString`'s string is stored in `Value::Name` --
that's going to change soon.  Update the only in-tree client that was
using it instead of `Value::getString()`.

Part of PR21532.

llvm-svn: 221951
2014-11-13 23:59:16 +00:00
Reid Kleckner
824f28d87f Fix the VS 2012 build
VS 2012 doesn't have fminf or fmaxf.

llvm-svn: 221949
2014-11-13 23:45:50 +00:00
Reed Kotler
664c8f453d First stage of call lowering for Mips fast-isel
Summary:
This has most of what is needed for mips fast-isel call lowering for O32.
What is missing I will add on the next patch because this patch is already too large.
It should not be doing anything wrong but it will punt on some cases that it is basically
capable of doing.

The mechanism is there for parameters to be passed on the stack but I have not enabled it because it serves as a way for now to prevent some of the strange cases of O32 register passing that I have not fully checked yet and have some issues.

The Mips O32 abi rules are very complicated as far how data is passed in floating and integer registers.

However there is a way to think about this all very simply and this implementation reflects that.

Basically, the ABI rules are written as if everything is passed on the stack and aligned as such.
Once that is conceptually done, it is nearly trivial to reassign those locations to registers and
then all the complexity disappears.

So I have told tablegen that all the data is passed on the stack and during the lowering I fix
this by assigning to registers as per the ABI doc.

This has been my approach and you can line up what I did with the ABI document and see 1 to 1 what
is going on.



Test Plan: callabi.ll

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: jholewinski, echristo, ahatanak, llvm-commits, rfuhler

Differential Revision: http://reviews.llvm.org/D5714

llvm-svn: 221948
2014-11-13 23:37:45 +00:00
Reid Kleckner
b9aef21886 Fix symbol resolution of floating point libc builtins in MCJIT
Fix for LLI failure on Windows\X86: http://llvm.org/PR5053

LLI.exe crashes on Windows\X86 when single precession floating point
intrinsics like the following are used: acos, asin, atan, atan2, ceil,
copysign, cos, cosh, exp, floor, fmin, fmax, fmod, log, pow, sin, sinh,
sqrt, tan, tanh

The above intrinsics are defined as inline-expansions in math.h, and are
not exported by msvcr120.dll (Win32 API GetProcAddress returns null).

For an FREM instruction, the JIT compiler generates a call to a stub for
the fmodf() intrinsic, and adds a relocation to fixup at load time. The
loader searches the libraries for the function, but fails because the
symbol is not exported. So, the call target remains NULL and the
execution crashes.

Since the math functions are loaded at JIT/runtime, the JIT can patch
CALL instruction directly instead of the searching the libraries'
exported symbols.  However, this fix caused build failures due to
unresolved symbols like _fmodf at link time.

Therefore, the current fix defines helper functions in the Runtime
link/load library to perform the above operations.  The address of these
helper functions are used to patch up the CALL instruction at load time.

Reviewers: lhames, rnk

Reviewed By: rnk

Differential Revision: http://reviews.llvm.org/D5387

Patch by Swaroop Sridhar!

llvm-svn: 221947
2014-11-13 23:32:52 +00:00
Reid Kleckner
3ca585c8b7 Silence MSVC warning on missing return after fully covered switch
llvm-svn: 221943
2014-11-13 23:07:22 +00:00
Matt Arsenault
08233590d4 R600/SI: Fix fmin_legacy / fmax_legacy matching for SI
select_cc is expanded on SI, so this was never matched.

llvm-svn: 221941
2014-11-13 23:03:09 +00:00
Reid Kleckner
2fa78fff68 Use nullptr instead of NULL for variadic sentinels
Windows defines NULL to 0, which when used as an argument to a variadic
function, is not a null pointer constant. As a result, Clang's
-Wsentinel fires on this code. Using '0' would be wrong on most 64-bit
platforms, but both MSVC and Clang make it work on Windows. Sidestep the
issue with nullptr.

llvm-svn: 221940
2014-11-13 22:55:19 +00:00
Chad Rosier
b78b0f87d3 Revert "[GVN] Perform Scalar PRE on gep indices that feed loads before doing Load PRE."
This reverts commit r221924.  It appears the commit was a bit premature and is causing
bot failures that need further investigation.

llvm-svn: 221939
2014-11-13 22:54:59 +00:00
Rafael Espindola
77ea46e343 Move calls to push_back out of readAbbreviated(Literal|Field).
These functions always return a single value and not all callers want to
push them into a SmallVector.

llvm-svn: 221934
2014-11-13 22:29:02 +00:00
Reid Kleckner
aa6f2355ba Avoid usage of char16_t as MSVC "14" doesn't appear to support it
Fixes the MSVC "14" build.

llvm-svn: 221932
2014-11-13 22:09:56 +00:00
Rafael Espindola
21641494c7 Make a few helper functions static. NFC.
llvm-svn: 221930
2014-11-13 21:54:59 +00:00
Aditya Nandakumar
4d9c1ff994 We can get the TLOF from the TargetMachine - so constructor no longer requires TargetLoweringObjectFile to be passed.
llvm-svn: 221926
2014-11-13 21:29:21 +00:00
Chad Rosier
9c48d1f2b8 [GVN] Perform Scalar PRE on gep indices that feed loads before doing Load PRE.
Phabricator Revision: http://reviews.llvm.org/D6103
Patch by "Balaram Makam" <bmakam@codeaurora.org>!

llvm-svn: 221924
2014-11-13 21:17:58 +00:00
Juergen Ributzka
fb67fff9cb [FastISel][AArch64] Don't bail during simple GEP instruction selection.
The generic FastISel code would bail, because it can't emit a sign-extend for
AArch64. This copies the code over and uses AArch64 specific emit functions.

This is not ideal and 'computeAddress' should handles this, so it can fold the
address computation into the memory operation.

I plan to clean up 'computeAddress' anyways, so I will add that in a future
commit.

Related to rdar://problem/18962471.

llvm-svn: 221923
2014-11-13 20:50:44 +00:00
Matt Arsenault
d222be0dd7 R600/SI: Use s_movk_i32
llvm-svn: 221922
2014-11-13 20:44:23 +00:00
Matt Arsenault
95ce2351ba R600/SI: Fix definition for s_cselect_b32
These were directly using the old base instruction
class, and specifying the wrong register classes
for operands. The operands can be the other special
inputs besides SGPRs. The op name was also being
directly used for the asm string, so this was printed
without any operands.

llvm-svn: 221921
2014-11-13 20:23:36 +00:00
Matt Arsenault
2ef28e2234 R600: Fix assert on empty function
If a function is just an unreachable, this would hit a
"this is not a MachO target" assertion because of setting
HasSubsectionViaSymbols.

llvm-svn: 221920
2014-11-13 20:07:40 +00:00
Rui Ueyama
3ed9ac191d Un-break the big-endian buildbots
llvm-svn: 221919
2014-11-13 20:07:06 +00:00
Matt Arsenault
8f277a520f R600: Error on initializer for LDS.
Also give a proper error for other address spaces.

llvm-svn: 221917
2014-11-13 19:56:13 +00:00
Matt Arsenault
5487619f0a R600/SI: Get rid of FCLAMP_SI pseudo
It's not necessary. Also use complex patterns to allow
src modifier usage.

llvm-svn: 221916
2014-11-13 19:49:04 +00:00
David Majnemer
8e7c697444 Object, Mach-O: Refactor and clean code up
Don't assert if we can return an error code, reuse existing
functionality like is64Bit().

llvm-svn: 221915
2014-11-13 19:48:56 +00:00
Matt Arsenault
41886925dc R600/SI: Allow commuting with src2_modifiers
llvm-svn: 221911
2014-11-13 19:26:50 +00:00
Matt Arsenault
a919d1ac8d R600/SI: Allow commuting some 3 op instructions
e.g. v_mad_f32 a, b, c -> v_mad_f32 b, a, c

This simplifies matching v_madmk_f32.

This looks somewhat surprising, but it appears to be
OK to do this. We can commute src0 and src1 in all
of these instructions, and that's all that appears
to matter.

llvm-svn: 221910
2014-11-13 19:26:47 +00:00
Tim Northover
8c9fca07bd ARM: allow constpool entry to be moved to the user's block in all cases.
Normally entries can only move to a lower address, but when that wasn't viable,
the user's block was considered anyway. Unfortunately, it went via
createNewWater which wasn't designed to handle the case where there's already
an island after the block.

Unfortunately, the test we have is slow and fragile, and I couldn't reduce it
to anything sane even with the @llvm.arm.space intrinsic. The test change here
is recreating the previous one after the change.

rdar://problem/18545506

llvm-svn: 221905
2014-11-13 17:58:53 +00:00
Tim Northover
a52b6a893f ARM: avoid duplicating branches during constant islands.
We were using a naive heuristic to determine whether a basic block already had
an unconditional branch at the end. This mostly corresponded to reality
(assuming branches got optimised) because there's not much point in a branch to
the next block, but could go wrong.

llvm-svn: 221904
2014-11-13 17:58:51 +00:00
Tim Northover
5807daa475 ARM: add @llvm.arm.space intrinsic for testing ConstantIslands.
Creating tests for the ConstantIslands pass is very difficult, since it depends
on precise layout details. Having the ability to precisely inject a number of
bytes into the stream helps greatly.

llvm-svn: 221903
2014-11-13 17:58:48 +00:00
Rafael Espindola
c534aef78e Fix a regression on the disassembling C API.
The fix is easy. Unfortunately, we had 0 tests, so adding one was somewhat
complicated.

Thanks to Kevin Enderby for the report.

llvm-svn: 221899
2014-11-13 16:52:07 +00:00
Colin LeMahieu
00e705c691 [Hexagon]
NFC Renaming reserved identifier.

llvm-svn: 221898
2014-11-13 16:36:30 +00:00
Chad Rosier
164ded07a4 [Reassociate] Update comment. NFC.
llvm-svn: 221894
2014-11-13 15:40:20 +00:00
Aaron Ballman
f9b64b77a6 Fixing -Wtype-limits warnings with the asserts (the expression would always evaluate to true). Also fixing a -Wcast-qual warning, where the cast expression isn't required.
llvm-svn: 221888
2014-11-13 13:55:13 +00:00
Duncan P. N. Exon Smith
90fbefa579 IR: Create the Metadata class
This will become the root of a new class hierarchy separate from
`Value`.  As a first step, stick it between `Value` and `MDNode`.

This is part of PR21532.

llvm-svn: 221886
2014-11-13 13:17:47 +00:00
Elena Demikhovsky
9da1df2e58 AVX-512: SINT_TO_FP cost model and some bugfixes
Checked some corner cases, for example translation
of <8 x i1> to <8 x double>

llvm-svn: 221883
2014-11-13 11:46:16 +00:00
David Majnemer
0b6910895b Object, COFF: Refactor code to get relocation iterators
No functional change intended.

llvm-svn: 221880
2014-11-13 09:50:18 +00:00
Aditya Nandakumar
b93fb292df This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively
llvm-svn: 221878
2014-11-13 09:26:31 +00:00
Hal Finkel
f6f1c7d61b Revert r219432 - "Revert "[BasicAA] Revert "Revert r218714 - Make better use of zext and sign information."""
Let's try this again...

This reverts r219432, plus a bug fix.

Description of the bug in r219432 (by Nick):

The bug was using AllPositive to break out of the loop; if the loop break
condition i != e is changed to i != e && AllPositive then the
test_modulo_analysis_with_global test I've added will fail as the Modulo will
be calculated incorrectly (as the last loop iteration is skipped, so Modulo
isn't updated with its Scale).

Nick also adds this comment:

ComputeSignBit is safe to use in loops as it takes into account phi nodes, and
the  == EK_ZeroEx check is safe in loops as, no matter how the variable changes
between iterations, zero-extensions will always guarantee a zero sign bit. The
isValueEqualInPotentialCycles check is therefore definitely not needed as all
the variable analysis holds no matter how the variables change between loop
iterations.

And this patch also adds another enhancement to GetLinearExpression - basically
to convert ConstantInts to Offsets (see test_const_eval and
test_const_eval_scaled for the situations this improves).

Original commit message:

This reverts r218944, which reverted r218714, plus a bug fix.

Description of the bug in r218714 (by Nick):

The original patch forgot to check if the Scale in VariableGEPIndex flipped the
sign of the variable. The BasicAA pass iterates over the instructions in the
order they appear in the function, and so BasicAliasAnalysis::aliasGEP is
called with the variable it first comes across as parameter GEP1. Adding a
%reorder label puts the definition of %a after %b so aliasGEP is called with %b
as the first parameter and %a as the second. aliasGEP later calculates that %a
== %b + 1 - %idxprom where %idxprom >= 0 (if %a was passed as the first
parameter it would calculate %b == %a - 1 + %idxprom where %idxprom >= 0) -
ignoring that %idxprom is scaled by -1 here lead the patch to incorrectly
conclude that %a > %b.

Revised patch by Nick White, thanks! Thanks to Lang to isolating the bug.
Slightly modified by me to add an early exit from the loop and avoid
unnecessary, but expensive, function calls.

Original commit message:

Two related things:

 1. Fixes a bug when calculating the offset in GetLinearExpression. The code
    previously used zext to extend the offset, so negative offsets were converted
    to large positive ones.

 2. Enhance aliasGEP to deduce that, if the difference between two GEP
    allocations is positive and all the variables that govern the offset are also
    positive (i.e. the offset is strictly after the higher base pointer), then
    locations that fit in the gap between the two base pointers are NoAlias.

Patch by Nick White!

llvm-svn: 221876
2014-11-13 09:16:54 +00:00
David Majnemer
7366e9380f Object, COFF: Increase code reuse
Split getObject's smarts into checkOffset, use this to replace the
handwritten check in getSectionContents.  Similarly, replace checks in
section_rel_begin/section_rel_end with getNumberOfRelocations.

No functionality change intended.

llvm-svn: 221873
2014-11-13 08:46:37 +00:00
David Majnemer
854aeb4e3e Object, COFF: getRelocationSymbol shouldn't assert
lib/Object is supposed to be robust to malformed object files.  Don't
assert if we don't have a symbol table.  I'll try to come up with a test
case later.

llvm-svn: 221870
2014-11-13 07:42:11 +00:00
David Majnemer
c6acbb53c8 Object, COFF: Cleanup some code in getSectionName
Use StringRef::startswith to tidy up some code, no functionality change
intended.

llvm-svn: 221869
2014-11-13 07:42:09 +00:00
David Majnemer
249b5acb93 Object, COFF: Fix some theoretical bugs
getObject didn't consider the case where a pointer came before the start
of the object file.  No test is included, trying to come up with
something reasonable.

llvm-svn: 221868
2014-11-13 07:42:07 +00:00
Rafael Espindola
ad6b4ce7dc Read 64 bits at a time in the bitcode reader.
The reading of 64 bit values could still be optimized, but at least this cuts
down on the number of virtual calls to fetch more data.

llvm-svn: 221865
2014-11-13 07:23:22 +00:00
Chandler Carruth
2a4813287b [x86] Teach the vector shuffle lowering to make a more nuanced decision
between splitting a vector into 128-bit lanes and recombining them vs.
decomposing things into single-input shuffles and a final blend.

This handles a large number of cases in AVX1 where the cross-lane
shuffles would be much more expensive to represent even though we end up
with a fast blend at the root. Instead, we can do a better job of
shuffling in a single lane and then inserting it into the other lanes.

This fixes the remaining bits of Halide's regression captured in PR21281
for AVX1. However, the bug persists in AVX2 because I've made this
change reasonably conservative. The cases where it makes sense in AVX2
to split into 128-bit lanes are much more rare because we can often do
full permutations across all elements of the 256-bit vector. However,
the particular test case in PR21281 is an example of one of the rare
cases where it is *always* better to work in a single 128-bit lane. I'm
going to try to teach the logic to detect and form the good code even in
AVX2 next, but it will need to use a separate heuristic.

Finally, there is one pesky regression here where we previously would
craftily use vpermilps in AVX1 to shuffle both high and low halves at
the same time. We no longer pull that off, and not for any really good
reason. Ultimately, I think this is just another missing nuance to the
selection heuristic that I'll try to add in afterward, but this change
already seems strictly worth doing considering the magnitude of the
improvements in common matrix math shuffle patterns.

As always, please let me know if this causes a surprising regression for
you.

llvm-svn: 221861
2014-11-13 04:06:10 +00:00