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Commit Graph

169644 Commits

Author SHA1 Message Date
Jorge Gorbe Moya
fabad40505 Test commit. Removed a blank line.
llvm-svn: 342771
2018-09-21 20:45:08 +00:00
Thomas Lively
9ae5ad4261 [WebAssembly][NFC] Rename simd-conversions test to simd-bitcasts
Summary:
This name is more accurate and I want to reuse the simd-conversions
name for testing the actual conversion ops.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52333

llvm-svn: 342761
2018-09-21 18:46:39 +00:00
Caroline Tice
c0b1b6c031 Pass code-model through Module IR to LTO which will use it.
Currently the code-model does not get saved in the module IR,
so if a code model is specified when compiling with LTO,
it gets lost and is not propagated properly to LTO. This patch,
along with one for the front end, fixes that.

Differential Revision: https://reviews.llvm.org/D52322

llvm-svn: 342760
2018-09-21 18:41:31 +00:00
JF Bastien
5e7bfbaecc [NFC] use bit_cast in PointerSumType
The code was already using union and memcpy to do this. Remove the memcpy. We can't just change the union because a reference to its member is returned.

llvm-svn: 342759
2018-09-21 18:35:32 +00:00
Sanjay Patel
a80f68a4d0 [x86] add (negative) andnp test for D52318; NFC
llvm-svn: 342756
2018-09-21 18:24:53 +00:00
Sanjay Patel
4cd15b2a42 [x86] add test with optsize attribute for scalar->vector transform; NFC
llvm-svn: 342755
2018-09-21 18:03:49 +00:00
Wouter van Oortmerssen
bf8ad91f87 [WebAssembly] Made assembler only use stack instruction tablegen defs
Summary:
This ensures we have the non-register version of the instruction.

The stack version of call_indirect now wants a type index argument,
so that has been added in the existing tests.

Tested:
llvm-lit -v `find test -name WebAssembly`

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51662

llvm-svn: 342753
2018-09-21 17:47:58 +00:00
Krzysztof Parzyszek
6667aebec6 [Hexagon] Avoid functions with exception handling in HexagonConstExtenders
The constant-extender optimization does a form of code motion, which is
complicated in the presence of exception handling.

llvm-svn: 342751
2018-09-21 17:40:35 +00:00
Daniel Sanders
fc637bb564 [tblgen] Fix undefined behaviour when assigning integers to large bits<n>'s
This code:
  bits<96> X = 0;
was triggering undefined behaviour since it iterates over bits 0..95 and tests
them against the IntInit using 1LL << I.

This patch resolves the undefined behaviour by continuing to treat the IntInit
as a 64-bit value and simply causing all bit tests in excess of 64-bits to report
false. As a result,
  bits<96> X = -1;
will be equivalent to:
  bits<96> X;
  let X{0-63} = -1;
  let X{64-95} = 0;

llvm-svn: 342744
2018-09-21 16:32:49 +00:00
Sameer Sahasrabuddhe
75615ce56c revert changes from r342722
"[AMDGPU] lower-switch in preISel as a workaround for legacy DA"

This broke regression tests. The first breakage was noticed here:
http://lab.llvm.org:8011/builders/lld-x86_64-freebsd/builds/23549

llvm-svn: 342743
2018-09-21 16:31:51 +00:00
Matthias Braun
5b52412a7c AArch64FastISel: Abort if we failed to select operand of intrinsic
rdar://44642447

Differential Revision: https://reviews.llvm.org/D52335

llvm-svn: 342742
2018-09-21 15:47:41 +00:00
Sanjay Patel
99ef9d6383 [InstCombine] add tests for extractelement; NFC
There are folds under visitExtractElementInst() that don't appear
to have any test coverage, so adding a few basic cases here.

llvm-svn: 342740
2018-09-21 14:43:49 +00:00
JF Bastien
5c6ce4adfa [ADT] restrict bit_cast to trivially-constructible To
Summary: As discussed in r341853 by blaikie, the reinterpret_cast was technically an aliasing violation. Restrict our bit_cast implementation to To which are trivially-constructible (and note the existing restriction to constexpr). Once we move to C++17 we can use a version of bit_cast without these restrictions, or if we care we can SFINAE a different implementation when To isn't trivially-constructible.

Originally landed in r342710 and reverted in r342711 because is_trivially_copyable is only in GCC 5.1 and later.

Reviewers: dblaikie, rsmith

Subscribers: dexonsmith, kristina, llvm-commits

Differential Revision: https://reviews.llvm.org/D52332

llvm-svn: 342739
2018-09-21 14:31:25 +00:00
Clement Courbet
c7ddbc8ea9 [X86][Sched] Add zero idiom sched data to the SNB model.
Summary:
On SNB, renamer-based zeroing does not work for:
 - 16 and 8-bit GPRs[1].
 - MMX [2].
 - ANDN variants [3]

[1] echo 'sub %ax, %ax' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
[2] echo 'pxor %mm0, %mm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=-
[3] echo 'andnps %xmm0, %xmm0' | /tmp/llvm-exegesis -mode=uops -snippets-file=-

Reviewers: RKSimon, andreadb

Subscribers: gbedwell, craig.topper, llvm-commits

Differential Revision: https://reviews.llvm.org/D52358

llvm-svn: 342736
2018-09-21 14:07:20 +00:00
Andrea Di Biagio
30d18f3d4f [X86][BtVer2] Fix latency and resource cycles of AVX 256-bit zero-idioms.
This patch introduces a SchedWriteVariant to describe zero-idiom VXORP(S|D)Yrr
and VANDNP(S|D)Yrr.

This is a follow-up of r342555.

On Jaguar, a VXORPSYrr is 2 macro opcodes. Only one opcode is eliminated at
register-renaming stage. The other opcode has to be executed to set the upper
half of the destination YMM.
Same for VANDNP(S|D)Yrr.

Differential Revision: https://reviews.llvm.org/D52347

llvm-svn: 342728
2018-09-21 12:43:07 +00:00
Jonas Devlieghere
ada9770646 [test] Fix Assembler/debug-info.ll
Update Assembler/debug-info.ll to contain discriminator.

llvm-svn: 342727
2018-09-21 12:28:44 +00:00
Andrea Di Biagio
4d5899d988 [X86] Add scheduling tests for AVX1 256-bit zero-idioms. NFC
llvm-svn: 342726
2018-09-21 12:22:14 +00:00
Jonas Devlieghere
1e0529ec4c Ensure that variant part discriminator is read by MetadataLoader
https://reviews.llvm.org/D42082 introduced variant parts to debug info
in LLVM. Subsequent work on the Rust compiler has found a bug in that
patch; namely, there is a path in MetadataLoader that fails to restore
the discriminator.

This patch fixes the bug.

Patch by: Tom Tromey

Differential revision: https://reviews.llvm.org/D52340

llvm-svn: 342725
2018-09-21 12:03:14 +00:00
Jonas Devlieghere
5ed8173380 [dsymutil] Suppress CoreFoundation leaks in tests.
This suppresses CoreFoundation originated leaks in the dsymutil tests.
I'm not sure if this is a false positive or not, but either way we don't
have control over it and shouldn't keep the bot red.

http://lab.llvm.org:8080/green/job/clang-stage2-cmake-RgSan/

llvm-svn: 342724
2018-09-21 11:55:17 +00:00
Benjamin Kramer
90f7b06f3e [ADT] Hack around GCC 5.4 miscompiling Optional of enum.
I'm still not 100% sure that this is not UB lingering (Optional has UB
and should use std::launder, but we don't have std::launder)

llvm-svn: 342723
2018-09-21 11:38:35 +00:00
Sameer Sahasrabuddhe
460e2aae48 [AMDGPU] lower-switch in preISel as a workaround for legacy DA
Summary:
The default target of the switch instruction may sometimes be an
"unreachable" block, when it is guaranteed that one of the cases is
always taken. The dominator tree concludes that such a switch
instruction does not have an immediate post dominator. This confuses
divergence analysis, which is unable to propagate sync dependence to
the targets of the switch instruction.

As a workaround, the AMDGPU target now invokes lower-switch as a
preISel pass. LowerSwitch is designed to handle the unreachable
default target correctly, allowing the divergence analysis to locate
the correct immediate dominator of the now-lowered switch.

Reviewers: arsenm, nhaehnle

Reviewed By: nhaehnle

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits, simoll

Differential Revision: https://reviews.llvm.org/D52221

llvm-svn: 342722
2018-09-21 11:26:55 +00:00
Alexander Timofeev
11308327e5 [AMDGPU] Divergence driven instruction selection. Part 1.
Summary: This change is the first part of the AMDGPU target description
    change. The aim of it is the effective splitting the vector and scalar
    flows at the selection stage. Selection uses predicate functions based
    on the framework implemented earlier - https://reviews.llvm.org/D35267

    Differential revision: https://reviews.llvm.org/D52019

    Reviewers: rampitec

llvm-svn: 342719
2018-09-21 10:31:22 +00:00
Jonas Devlieghere
4fd376d8a9 [dwarfdump] Verify DW_AT_type is set and points to a compatible DIE.
This extends the verifier to catch three new errors:

  * Missing DW_AT_type attributes for DW_TAG_formal_parameter,
    DW_TAG_variable and DW_TAG_array_type.

  * Valid references for DW_AT_type pointing to a non-type tag.

Differential revision: https://reviews.llvm.org/D52223

llvm-svn: 342713
2018-09-21 07:50:21 +00:00
Jonas Devlieghere
11cdf25953 [dwarfdump] Verify compatibility of attribute TAGs.
Verify that DW_AT_specification and DW_AT_abstract_origin reference a
DIE with a compatible tag.

Differential revision: https://reviews.llvm.org/D38719

llvm-svn: 342712
2018-09-21 07:49:29 +00:00
JF Bastien
f5e055050a Revert "[ADT] restrict bit_cast to trivially-constructible To"
Of course some bots don't have std::is_trivially_constructible...

llvm-svn: 342711
2018-09-21 05:34:12 +00:00
JF Bastien
a2bf565667 [ADT] restrict bit_cast to trivially-constructible To
Summary: As discussed in r341853 by blaikie, the reinterpret_cast was technically an aliasing violation. Restrict our bit_cast implementation to To which are trivially-constructible (and note the existing restriction to constexpr). Once we move to C++17 we can use a version of bit_cast without these restrictions, or if we care we can SFINAE a different implementation when To isn't trivially-constructible.

Reviewers: dblaikie, rsmith

Subscribers: dexonsmith, kristina, llvm-commits

Differential Revision: https://reviews.llvm.org/D52332

llvm-svn: 342710
2018-09-21 05:18:49 +00:00
JF Bastien
4bd103b312 Merge clang's isRepeatedBytePattern with LLVM's isBytewiseValue
Summary:
his code was in CGDecl.cpp and really belongs in LLVM's isBytewiseValue. Teach isBytewiseValue the tricks clang's isRepeatedBytePattern had, including merging undef properly, and recursing on more types.

clang part of this patch: D51752

Subscribers: dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D51751

llvm-svn: 342709
2018-09-21 05:17:42 +00:00
Dan Gohman
9d6986a7f5 [WebAssembly] Revert r342701, "Add WebAssembly to LLVM_ALL_TARGTS."
There is a memory leak which is detected in some of the sanitizer builds.
MCSymbolWasm contains SmallVectors for holding signature information,
however MCContext doesn't run destructors for MCSymbols, so in cases
where the SmallVectors heap-allocate, the memory is leaked.

llvm-svn: 342707
2018-09-21 03:24:42 +00:00
Dean Michael Berris
ad526e2931 [MCA] Remove dependency on CodeGen.
Summary:
There isn't any actual dependency - there's one #include from CodeGen
but nothing from the header is actually used.

With this change we can use the MCA library from CodeGen without
circular dependencies (e.g. for scheduling).

Reviewers: andreadb

Reviewed By: andreadb

Authored By: orodley

Subscribers: mgorny, gbedwell, llvm-commits

Differential Revision: https://reviews.llvm.org/D52288

llvm-svn: 342706
2018-09-21 01:54:08 +00:00
Kristina Brooks
3f85f9ee6d [Docs] [Support] Correct a missed reference and use up to date .inc examples.
In my original diff I missed #include "llvm/System/Thing.h" and forgot to update a
reference to .inc files a few lines down. This patch corrects these things as 
they were missed in revision 342500.

llvm-svn: 342705
2018-09-21 01:53:51 +00:00
Justin Bogner
e134a7d664 [MachineCopyPropagation] Refactor copy tracking into a class. NFC
This is a bit easier to follow than handling the copy and src maps
directly in the pass, and will make upcoming changes to how this is
done easier to follow.

llvm-svn: 342703
2018-09-21 00:51:04 +00:00
Jordan Rupprecht
40ef1c1438 [llvm-objcopy/llvm-strip]: handle --version
Summary:
Implement --version for objcopy and strip.

I think there are LLVM utilities that automatically handle this, but that doesn't seem to work with custom parsing since this binary handles both objcopy and strip, so it uses custom parsing.

This fixes PR38298

Reviewers: jhenderson, alexshap, jakehehrlich

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52328

llvm-svn: 342702
2018-09-21 00:47:31 +00:00
Dan Gohman
434bef92c7 [WebAssembly] Add WebAssembly to LLVM_ALL_TARGTS.
This makes WebAssembly build by default, rather than requiring
LLVM_EXPERIMENTAL_TARGETS_TO_BUILD!

Differential Revision: https://reviews.llvm.org/D43211

llvm-svn: 342701
2018-09-21 00:39:57 +00:00
Justin Bogner
3084f13b69 [MachineCopyPropagation] Minor clang-formatting. NFC
llvm-svn: 342700
2018-09-21 00:08:33 +00:00
David Blaikie
52acbfa5ef Fix DenseSet::ConstIterator typedefs
Fix DenseSet::ConstIterator pointer/reference typedefs to be const

Patch by Brad Moody!

Differential Revision: https://reviews.llvm.org/D52260

llvm-svn: 342697
2018-09-20 23:11:27 +00:00
Aditya Nandakumar
a93d44369b Add the ability to register callbacks for removal and insertion of MachineInstrs
https://reviews.llvm.org/D52127

This patch adds the ability to watch for insertions/deletions of
MachineInstructions similar to MachineRegisterInfo.

llvm-svn: 342696
2018-09-20 23:01:56 +00:00
David Blaikie
a3e594d708 Remove an unused function
llvm-svn: 342694
2018-09-20 22:48:09 +00:00
Yonghong Song
3158f2e27c bpf: check illegal usage of XADD insn return value
Currently, BPF has XADD (locked add) insn support and the
asm looks like:
  lock *(u32 *)(r1 + 0) += r2
  lock *(u64 *)(r1 + 0) += r2
The instruction itself does not have a return value.

At the source code level, users often use
  __sync_fetch_and_add()
which eventually translates to XADD. The return value of
__sync_fetch_and_add() is supposed to be the old value
in the xadd memory location. Since BPF::XADD insn does not
support such a return value, this patch added a PreEmit
phase to check such a usage. If such an illegal usage
pattern is detected, a fatal error will be reported like
  line 4: Invalid usage of the XADD return value
if compiled with -g, or
  Invalid usage of the XADD return value
if compiled without -g.

Signed-off-by: Yonghong Song <yhs@fb.com>
Acked-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 342692
2018-09-20 22:24:27 +00:00
Thomas Lively
035941e98c [WebAssembly][NFC] Add missing tests for indirect calls
Summary: Depends on D52105.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52254

llvm-svn: 342691
2018-09-20 22:08:27 +00:00
Thomas Lively
d0c3aa92e3 [WebAssembly] Add V128 value type to binary format
Summary: Adds the necessary support to lib/ObjectYAML and fixes SIMD
calls to allow the tests to work. Also removes some dead code that
would otherwise have to have been updated.

Reviewers: aheejin, dschuff, sbc100

Subscribers: jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52105

llvm-svn: 342689
2018-09-20 22:04:44 +00:00
Jessica Paquette
862f54a7b4 [MachineOutliner][NFC] Don't add MBBs with a size < 2 to the search space
The suffix tree won't ever consider sequences with a length less than 2.

Therefore, we really ought to not even consider them in the first place.

Also add a FIXME explaining that this should be defined in terms of the size
in B of an outlined call versus the size in B of the MBB.

llvm-svn: 342688
2018-09-20 21:53:25 +00:00
Xin Tong
c02a1f0f63 [GlobalDCE] AvailableExternal linkage is checked in isDiscardableIfUnused [NFC].
Summary:
AvailableExternal was not handled in isDiscardableIfUnused when isDiscardableIfUnused
was added in r158476. Till it was handled in r247044. This is a NFC.

Reviewers: pcc, tejohnson

Reviewed By: tejohnson

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52319

llvm-svn: 342684
2018-09-20 21:16:16 +00:00
Sanjay Patel
a230162583 [InstCombine] rename test file, simplify tests, regenerate full checks; NFC
Fast-math is irrelevant for these transforms.

llvm-svn: 342683
2018-09-20 21:10:14 +00:00
Walter Lee
b444048e49 [RegAllocGreedy] Fix crash in tryLocalSplit
tryLocalSplit only handles a single use block, but an interval may
have multiple use blocks.  So don't crash in that case.  This fixes
PR38795.

Differential revision: https://reviews.llvm.org/D52277

llvm-svn: 342682
2018-09-20 20:05:57 +00:00
Zachary Turner
78f9606ec6 [PDB] Fix -Wcovered-switch-default warning.
llvm-svn: 342681
2018-09-20 19:57:49 +00:00
Vedant Kumar
3117751229 [Bitcode] Address backwards compat bug in r342631
r342631 expanded bitc::METADATA_LOCATION by one element. The bitcode
metadata loader was changed in a backwards-incompatible way, leading to
crashes when disassembling old bitcode:

  assertion: empty() && "PlaceholderQueue hasn't been flushed before being destroyed"
  Assertion failed: (empty() && "PlaceholderQueue hasn't been flushed before being destroyed")

This commit teaches the metadata loader to assume that the newly-added
IsImplicitCode bit is 'false' when not present in old bitcode. I've added a
bitcode compat regression test.

rdar://44645820

llvm-svn: 342678
2018-09-20 18:59:33 +00:00
Jessica Paquette
8852ffb12f [MachineOutliner][NFC] Move debug info emission to createOutlinedFunction
When you create an outlined function, you know everything you need to know
to decide if debug info should be created. If we emit debug info in
createOutlinedFunction, then we don't need to keep track of every IR function
we create.

llvm-svn: 342677
2018-09-20 18:53:53 +00:00
Sameer AbuAsal
6c1297ecd0 [inline Cost] Don't mark functions accessing varargs as non-inlinable
Summary:
rL323619 marks functions that are calling va_end as not viable for
inlining. This patch reverses that since this va_end doesn't need
access to the vriadic arguments list that are saved on the stack, only
va_start does.

Reviewers: efriedma, fhahn

Reviewed By: fhahn

Subscribers: eraman, haicheng, llvm-commits

Differential Revision: https://reviews.llvm.org/D52067

llvm-svn: 342675
2018-09-20 18:39:34 +00:00
Rui Ueyama
31ce2bb730 Fix -Wtrigraphs.
llvm-svn: 342674
2018-09-20 18:26:38 +00:00
Zachary Turner
7ff8bcc851 Fix warnings.
llvm-svn: 342670
2018-09-20 17:48:44 +00:00