1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 20:43:44 +02:00
Commit Graph

6 Commits

Author SHA1 Message Date
Evan Cheng
632cb17357 Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction.
The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that.

Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010.

llvm-svn: 104094
2010-05-19 01:08:17 +00:00
Bob Wilson
011e458c11 Merge a bunch of NEON tests into larger files so they run faster.
llvm-svn: 83667
2009-10-09 20:20:54 +00:00
Dan Gohman
142428ce64 Eliminate more uses of llvm-as and llvm-dis.
llvm-svn: 81293
2009-09-09 00:09:15 +00:00
Bob Wilson
2195d82b90 Convert more Neon tests to use FileCheck.
llvm-svn: 78648
2009-08-11 05:51:19 +00:00
Chris Lattner
2939f0a318 Change these tests to use [fi]cmp+sext instead of v[fi]cmp. No
functionality change.

llvm-svn: 74979
2009-07-08 00:46:57 +00:00
Bob Wilson
6db76aaf10 Add support for ARM's Advanced SIMD (NEON) instruction set.
This is still a work in progress but most of the NEON instruction set
is supported.

llvm-svn: 73919
2009-06-22 23:27:02 +00:00