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Commit Graph

124317 Commits

Author SHA1 Message Date
Weiming Zhao
2d64bb7e78 [Utils] Put includes in correct order. NFC.
Summary:
    Followed the guidelines in:
    http://llvm.org/docs/CodingStandards.html#include-style
    
    However, I noticed that uppercase named headers come before lowercase ones
    throughout the codebase. So kept them as is.
    
    Patch by Mandeep Singh Grang <mgrang@codeaurora.org>

Reviewers: majnemer, davide, jmolloy, atrick

Subscribers: sanjoy

Differential Revision: http://reviews.llvm.org/D14939

llvm-svn: 254005
2015-11-24 18:57:06 +00:00
Xinliang David Li
620aee58f0 [PGO] Small interface change to be profile rt ready
Convert two C++ static member functions to be C APIs. This
is one of the many steps to get ready to share VP writer code
with profiler runtime. 

llvm-svn: 253999
2015-11-24 18:15:46 +00:00
Sanjay Patel
cca965412e [InstCombine] fix propagation of fast-math-flags
Noticed while working on D4583:
http://reviews.llvm.org/D4583

llvm-svn: 253997
2015-11-24 17:51:20 +00:00
Sanjay Patel
f8b768cb06 use convenience function for copying IR flags; NFCI
llvm-svn: 253996
2015-11-24 17:16:33 +00:00
Xinliang David Li
57937fbcb6 Minor refactor to make VP writing more efficient
llvm-svn: 253994
2015-11-24 17:03:24 +00:00
Rafael Espindola
59fb3a9087 Make this test a bit more strict.
It now tests with files in both orders.

llvm-svn: 253993
2015-11-24 16:43:53 +00:00
Krzysztof Parzyszek
ce2383b240 Add vector types for intrinsics
Author: Ron Lieberman <ronl@codeaurora.org>
llvm-svn: 253992
2015-11-24 16:28:14 +00:00
Teresa Johnson
9c0a1779ce [ThinLTO] Fix FunctionImport alias checking and test
Skip imports for weak_any aliases as well. Fix the test to check
non-import of weak aliases and functions, and import of normal alias.

llvm-svn: 253991
2015-11-24 16:10:43 +00:00
Krzysztof Parzyszek
9a91695856 Add names for the new vector types in CodeGenTarget.cpp
llvm-svn: 253989
2015-11-24 15:50:22 +00:00
Sanjay Patel
5c5b0311b8 [x86] remove duplicate movq instruction defs (PR25554)
We had duplicated definitions for the same hardware '[v]movq' instructions. For example with SSE:

  def MOVZQI2PQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
                     "mov{d|q}\t{$src, $dst|$dst, $src}", // X86-64 only
                     [(set VR128:$dst, (v2i64 (X86vzmovl (v2i64 (scalar_to_vector GR64:$src)))))],
                     IIC_SSE_MOVDQ>;

  def MOV64toPQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src),
                     "mov{d|q}\t{$src, $dst|$dst, $src}",
                     [(set VR128:$dst, (v2i64 (scalar_to_vector GR64:$src)))],
                     IIC_SSE_MOVDQ>, Sched<[WriteMove]>;

As shown in the test case and PR25554:
https://llvm.org/bugs/show_bug.cgi?id=25554

This causes us to miss reusing an operand because later passes don't know these 'movq' are the same instruction.
This patch deletes one pair of these defs.
Sadly, this won't fix the original test case in the bug report. Something else is still broken.

Differential Revision: http://reviews.llvm.org/D14941

llvm-svn: 253988
2015-11-24 15:44:35 +00:00
Krzysztof Parzyszek
65a9ee0c69 [Hexagon] Add missing include of <cctype>
Lack thereof breaks Windows builds due to the use of std::isspace
in HexagonInstrInfo.cpp.

llvm-svn: 253987
2015-11-24 15:11:13 +00:00
Krzysztof Parzyszek
f41a043936 [Hexagon] Bring HexagonInstrInfo up to date
llvm-svn: 253986
2015-11-24 14:55:26 +00:00
Rafael Espindola
7781902df3 Add an already passing test.
This tests that a declaration can resolve to an alias.

I broke this locally while prototyping a change and it looks like a nice
test to have.

llvm-svn: 253984
2015-11-24 14:15:50 +00:00
Krzysztof Parzyszek
450319e8a0 Add new vector types for 512-, 1024- and 2048-bit vectors
Those types are needed to implement instructions for Hexagon Vector
Extensions (HVX): 16x32, 16x64, 32x16, 32x32, 32x64, 64x8, 64x16,
64x32, 128x8, 128x16, 256x8, 512x1, and 1024x1.

llvm-svn: 253978
2015-11-24 13:07:35 +00:00
Matt Arsenault
314bb34783 AMDGPU: Split LDS vector loads
If properly aligned this could allow using ds_read_b64.

llvm-svn: 253975
2015-11-24 12:18:54 +00:00
Matt Arsenault
1c34836bdc AMDGPU: Split x8 and x16 vector loads instead of scalarize
The one regression in the builtin tests is in the read2 test which now
(again) has many extra copies, but this should be solved once the pass
is replaced with a DAG combine.

llvm-svn: 253974
2015-11-24 12:05:03 +00:00
Ismail Donmez
266a7da4e3 Fix build after r253954
llvm-svn: 253969
2015-11-24 09:48:09 +00:00
Pavel Labath
f570e610a0 Fix non-PIC build after 253959
CMAKE_EXE_LINKER_FLAGS is a string. Appending a flag using list(APPEND) introduces an extra
semicolon which breaks stuff. Change this to append the value in the same way that everyone else
seems to be doing.

llvm-svn: 253968
2015-11-24 09:46:01 +00:00
Cong Hou
5747eb82f8 Let SelectionDAG start to use probability-based interface to add successors.
The patch in http://reviews.llvm.org/D13745 is broken into four parts:

1. New interfaces without functional changes.
2. Use new interfaces in SelectionDAG, while in other passes treat probabilities
as weights.
3. Use new interfaces in all other passes.
4. Remove old interfaces.

This the second patch above. In this patch SelectionDAG starts to use
probability-based interfaces in MBB to add successors but other MC passes are
still using weight-based interfaces. Therefore, we need to maintain correct
weight list in MBB even when probability-based interfaces are used. This is
done by updating weight list in probability-based interfaces by treating the
numerator of probabilities as weights. This change affects many test cases
that check successor weight values. I will update those test cases once this
patch looks good to you.


Differential revision: http://reviews.llvm.org/D14361

llvm-svn: 253965
2015-11-24 08:51:23 +00:00
Craig Topper
cb7feab115 [TableGen] Use std::remove_if instead of manually coded loops that call erase multiple times. NFC
llvm-svn: 253964
2015-11-24 08:20:47 +00:00
Craig Topper
b68a334495 [TableGen] Use the other version of EnforceVectorEltTypeIs inside the TypeSet version of EnforceVectorEltTypeIs to reduce duplicated code. NFC
llvm-svn: 253963
2015-11-24 08:20:45 +00:00
Craig Topper
2070f1ebe3 [TableGen] Fix formatting and use logical OR. NFC
llvm-svn: 253962
2015-11-24 08:20:44 +00:00
Craig Topper
0247a6313d [TableGen] Use std::set_intersection to merge TypeSets. NFC
llvm-svn: 253961
2015-11-24 08:20:42 +00:00
Craig Topper
c9d0ad15b8 [TableGen] Use SmallVector::assign instead of a resize and replace element.
llvm-svn: 253960
2015-11-24 08:20:41 +00:00
Chris Bieneman
fc7b01b423 [CMake] When disabling PIC, also pass -fno-pie when linking if it is supported.
Building clang with -fno-pie generates slightly faster code. In my not-very-rigorous testing I saw about a 4% speed up using the clang test-suite sources.

llvm-svn: 253959
2015-11-24 08:04:59 +00:00
Craig Topper
2c11bd56d2 Revert change that accidentally snuck into r253955.
llvm-svn: 253956
2015-11-24 06:24:06 +00:00
Craig Topper
6988e2723a [TableGen] Use array_pod_sort. NFC
llvm-svn: 253955
2015-11-24 06:22:43 +00:00
Mehdi Amini
2fe02188ef Add a FunctionImporter helper to perform summary-based cross-module function importing
Summary:
This is a helper to perform cross-module import for ThinLTO. Right now
it is importing naively every possible called functions.

Reviewers: tejohnson

Subscribers: dexonsmith, llvm-commits

Differential Revision: http://reviews.llvm.org/D14914

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 253954
2015-11-24 06:07:49 +00:00
Mehdi Amini
53aa625845 Add findFunctionInfoList() accessor to FunctionInfoIndex.
Summary:
This allows to query for a function in the map without creating an
entry, allowing to use a const FunctionInfoIndex.

Reviewers: tejohnson

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14912

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 253953
2015-11-24 06:07:42 +00:00
Cong Hou
6fe6cafdd5 [X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.
This patch detects the AVG pattern in vectorized code, which is simply
c = (a + b + 1) / 2, where a, b, and c have the same type which are vectors of
either unsigned i8 or unsigned i16. In the IR, i8/i16 will be promoted to
i32 before any arithmetic operations. The following IR shows such an example:

%1 = zext <N x i8> %a to <N x i32>
%2 = zext <N x i8> %b to <N x i32>
%3 = add nuw nsw <N x i32> %1, <i32 1 x N>
%4 = add nuw nsw <N x i32> %3, %2
%5 = lshr <N x i32> %N, <i32 1 x N>
%6 = trunc <N x i32> %5 to <N x i8>

and with this patch it will be converted to a X86ISD::AVG instruction.

The pattern recognition is done when combining instructions just before type
legalization during instruction selection. We do it here because after type
legalization, it is much more difficult to do pattern recognition based
on many instructions that are doing type conversions. Therefore, for
target-specific instructions (like X86ISD::AVG), we need to take care of type
legalization by ourselves. However, as X86ISD::AVG behaves similarly to
ISD::ADD, I am wondering if there is a way to legalize operands and result
types of X86ISD::AVG together with ISD::ADD. It seems that the current design
doesn't support this idea.

Tests are added for SSE2, AVX2, and AVX512BW and both i8 and i16 types of
variant vector sizes.


Differential revision: http://reviews.llvm.org/D14761

llvm-svn: 253952
2015-11-24 05:44:19 +00:00
Davide Italiano
44f68f6357 [DIE] Make DIE.h NDEBUG conditional-free.
Switch dump()/print() method definitions to LLVM_DUMP_METHOD instead.

llvm-svn: 253945
2015-11-24 02:21:43 +00:00
Chris Bieneman
a03449653c [CMake] export_executable_symbols also needs to add -rdynamic to the linker flags on Darwin
Without -rdynamic LLVM built with LTO fails to pass "check" due to loadable modules failing.

llvm-svn: 253944
2015-11-24 00:58:58 +00:00
Xinliang David Li
baa2f77b42 Use make_unique [NFC]
llvm-svn: 253942
2015-11-24 00:32:00 +00:00
Xinliang David Li
02a0716447 Remove trailing space in comments
llvm-svn: 253941
2015-11-24 00:31:41 +00:00
Sanjay Patel
2dc655e286 minimize test case but still show the bug
llvm-svn: 253940
2015-11-24 00:11:48 +00:00
Chris Bieneman
88e7e42aae NFC. Fixing my consistently incorrect spelling.
llvm-svn: 253936
2015-11-23 23:34:09 +00:00
Sanjay Patel
3a15ccb43d added comment (using freshly updated update_llc_test_checks.py)
llvm-svn: 253935
2015-11-23 23:22:05 +00:00
Sanjay Patel
415fbe0230 [x86] add test to show suboptimal codegen (PR25554)
llvm-svn: 253934
2015-11-23 23:18:20 +00:00
Sanjoy Das
ec2e5ad60c [RuntimeDyld] Avoid unused-private-field warning; NFC
Fixes the no asserts -Werror,-Wunused-private-field build.

llvm-svn: 253933
2015-11-23 22:59:36 +00:00
Dan Gohman
77556924fd [WebAssembly] Don't print the types of memory_size and grow_memory
This matches the current spec, for now.

llvm-svn: 253931
2015-11-23 22:37:29 +00:00
Xinliang David Li
1226a008ae [PGO] In llvm-profdata text dump, add comment lines as annotations
llvm-svn: 253930
2015-11-23 22:31:22 +00:00
Krzysztof Parzyszek
af76cac3cc Revert r253923.
Per Eric's request.

llvm-svn: 253928
2015-11-23 22:19:57 +00:00
Andy Ayers
5fba38a9da findDeadCallerSavedReg needs to pay attention to calling convention
Caller saved regs differ between SysV and Win64. Use the tail call available set to scavenge from.

Refactor register info to create new helper to get at tail call GPRs. Added a new test case for windows. Fixed up a number of X64 tests since now RCX is preferred over RDX on SysV.

Differential Revision: http://reviews.llvm.org/D14878

llvm-svn: 253927
2015-11-23 22:17:44 +00:00
Dan Gohman
1f81684b80 [WebAssembly] Don't special-case call operand order.
With the '=' suffix now indicating which operands are output operands, it's
no longer as important to distinguish between a call's inputs and its outputs
using operand ordering, so we can go back to printing them in the normal order.

llvm-svn: 253925
2015-11-23 22:04:06 +00:00
Rafael Espindola
bdc0b27af4 Don't create implicit comdats.
comdats are explicitly represented for some time now.

llvm-svn: 253924
2015-11-23 22:01:51 +00:00
Krzysztof Parzyszek
6c363eee43 Add new vector types for 512-, 1024- and 2048-bit vectors
Those types are needed to implement instructions for Hexagon Vector
Extensions (HVX): 16x32, 16x64, 32x16, 32x32, 32x64, 64x8, 64x16,
64x32, 128x8, 128x16, 256x8, 512x1, and 1024x1.

llvm-svn: 253923
2015-11-23 22:00:17 +00:00
Dan Gohman
2edbc2aed2 [WebAssembly] Suffix output operands with '='.
This distinguishes input operands from output operands. This is something of
a syntactic experiment to see whether the mild amount of clutter this adds is
outweighed by the extra information it conveys to the reader.

llvm-svn: 253922
2015-11-23 21:55:57 +00:00
Nathan Slingerland
a06290a805 [Support] Add optional argument to SaturatingAdd() and SaturatingMultiply() to indicate that overflow occurred
Summary: Adds the ability for callers to detect when saturation occurred on the result of saturating addition/multiplication.

Reviewers: davidxl, silvas, rsmith

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14931

llvm-svn: 253921
2015-11-23 21:54:22 +00:00
Sanjoy Das
1cbdd0c307 [RuntimeDyld] Don't allocate unnecessary stub buffer space
Summary:
For relocation types that are known to not require stub functions, there
is no need to allocate extra space for the stub functions.

Reviewers: lhames, reames, maksfb

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14676

llvm-svn: 253920
2015-11-23 21:47:51 +00:00
Sanjoy Das
ccf7f60ca4 [RuntimeDyld] Add bounds checking to SectionEntry::advanceStubOffset
Summary:
Change SectionEntry to keep track of the size of its underlying
allocation, and use that to bounds check advanceStubOffset.

Reviewers: lhames, andrew.w.kaylor, reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14675

llvm-svn: 253919
2015-11-23 21:47:46 +00:00