Jim Grosbach
21a9f8f50f
ARM assembly parsing and encoding for VMRS/FMSTAT.
...
llvm-svn: 141025
2011-10-03 21:12:43 +00:00
Akira Hatanaka
6c6ff6fde7
Add support for 64-bit divide instructions.
...
llvm-svn: 141024
2011-10-03 21:06:13 +00:00
Jim Grosbach
0e385170ee
Update test for 141010.
...
llvm-svn: 141022
2011-10-03 20:58:08 +00:00
Akira Hatanaka
e3c1d7eac0
Add support for 64-bit integer multiply instructions.
...
llvm-svn: 141017
2011-10-03 20:01:11 +00:00
Jim Grosbach
1651804363
Tidy up a bit. Formatting.
...
llvm-svn: 141010
2011-10-03 17:59:31 +00:00
Craig Topper
df04bee9b2
Add support for MOVBE and RDRAND instructions for the assembler and disassembler. Includes feature flag checking, but no instrinsic support. Fixes PR10832, PR11026 and PR11027.
...
llvm-svn: 141007
2011-10-03 17:28:23 +00:00
Rafael Espindola
4700f53cee
Add the returns_twice attribute to LLVM.
...
llvm-svn: 141001
2011-10-03 14:45:37 +00:00
Craig Topper
4456c94f70
Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode.
...
llvm-svn: 140997
2011-10-03 08:14:29 +00:00
Craig Topper
a3372bd949
Test updates that were supposed to go with r140993.
...
llvm-svn: 140994
2011-10-03 07:53:59 +00:00
Nick Lewycky
4898eef762
Reapply r140979 with fix! We never did get a testcase, but careful review of the
...
logic by David Meyer revealed this bug.
llvm-svn: 140992
2011-10-03 07:10:45 +00:00
Torok Edwin
b7495041db
attempt to fix ocaml bindings: landing pads
...
llvm-svn: 140991
2011-10-03 06:41:46 +00:00
Nick Lewycky
79fec8116f
Revert r140979 due to reports of bootstrap failure.
...
llvm-svn: 140980
2011-10-03 05:14:59 +00:00
Nick Lewycky
a760a29395
Add one more case we compute a max trip count.
...
llvm-svn: 140979
2011-10-03 01:03:57 +00:00
Craig Topper
f776e3b410
Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST.
...
llvm-svn: 140974
2011-10-02 21:08:12 +00:00
Craig Topper
5c8feca34f
Special case disassembler handling of REX.B prefix on NOP instruction to decode as XCHG R8D, EAX instead. Fixes PR10344.
...
llvm-svn: 140971
2011-10-02 16:56:09 +00:00
Nick Lewycky
7cd1bfb89d
Add a new icmp+select optz'n. Also shows off the load(cst) folding added in
...
r140966.
llvm-svn: 140969
2011-10-02 10:37:37 +00:00
Craig Topper
43fd621df8
Fix disassembling of INVEPT and INVVPID to take operands
...
llvm-svn: 140955
2011-10-01 21:20:14 +00:00
Craig Topper
99ad3cc23e
Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702.
...
llvm-svn: 140954
2011-10-01 19:54:56 +00:00
Bill Wendling
98db234c02
Filecheck-ize.
...
llvm-svn: 140904
2011-09-30 23:40:29 +00:00
Bill Wendling
252b649025
Add new line at end of file.
...
llvm-svn: 140903
2011-09-30 23:21:11 +00:00
Bill Wendling
fcf3096d9b
When inferring the pointer alignment, if the global doesn't have an initializer
...
and the alignment is 0 (i.e., it's defined globally in one file and declared in
another file) it could get an alignment which is larger than the ABI allows for
that type, resulting in aligned moves being used for unaligned loads.
For instance, in file A.c:
struct S s;
In file B.c:
struct {
// something long
};
extern S s;
void foo() {
struct S p = s;
// ...
}
this copy is a 'memcpy' which is turned into a series of 'movaps' instructions
on X86. But this is wrong, because 'struct S' has alignment of 4, not 16.
llvm-svn: 140902
2011-09-30 23:19:55 +00:00
David Greene
7a9ac03042
Test More Complicated Lists
...
Test of indexing lists of lists of lists works. This also exercises
some operators.
llvm-svn: 140884
2011-09-30 20:59:52 +00:00
David Greene
c5830e015f
Test VarListElementInit:: resolveListElementReference
...
Add a TableGen test to check if indexing lists of lists works.
llvm-svn: 140883
2011-09-30 20:59:51 +00:00
Akira Hatanaka
5479850400
Remove unnecessary checking of register operands.
...
llvm-svn: 140872
2011-09-30 19:18:24 +00:00
Akira Hatanaka
c9268767d6
Add definitions of Mips64 rotate instructions.
...
llvm-svn: 140870
2011-09-30 18:51:46 +00:00
Jim Grosbach
d35eaaeb6e
float comparison to double 'zero' constant can just be a float 'zero.'
...
InstCombine was incorrectly considering the conversion of the constant
zero to be unsafe.
We want to transform:
define float @bar(float %x) nounwind readnone optsize ssp {
%conv = fpext float %x to double
%cmp = fcmp olt double %conv, 0.000000e+00
%conv1 = zext i1 %cmp to i32
%conv2 = sitofp i32 %conv1 to float
ret float %conv2
}
Into:
define float @bar(float %x) nounwind readnone optsize ssp {
%cmp = fcmp olt float %x, 0.000000e+00 ; <---- This
%conv1 = zext i1 %cmp to i32
%conv2 = sitofp i32 %conv1 to float
ret float %conv2
}
rdar://10215914
llvm-svn: 140869
2011-09-30 18:45:50 +00:00
Jim Grosbach
44047da675
ARM Darwin default relocation model is PIC.
...
This matches clang, so default options in llc and friends are now closer to
clang's defaults.
llvm-svn: 140863
2011-09-30 17:41:35 +00:00
Akira Hatanaka
ffa28d49f1
Check values of immediate operands.
...
llvm-svn: 140860
2011-09-30 17:19:21 +00:00
Duncan Sands
14b9c222c6
Add forgotten tests that the cleanup flag is cleared if there
...
is a catch-all landingpad clause.
llvm-svn: 140858
2011-09-30 17:00:34 +00:00
Duncan Sands
b4c8b2d9fa
Inlining often produces landingpad instructions with repeated
...
catch or repeated filter clauses. Teach instcombine a bunch
of tricks for simplifying landingpad clauses. Currently the
code only recognizes the GNU C++ and Ada personality functions,
but that doesn't stop it doing a bunch of "generic" transforms
which are hopefully fine for any real-world personality function.
If these "generic" transforms turn out not to be generic, they
can always be conditioned on the personality function. Probably
someone should add the ObjC++ personality function. I didn't as
I don't know anything about it.
llvm-svn: 140852
2011-09-30 13:12:16 +00:00
Akira Hatanaka
dcd69c2e07
Mips64 shift instructions.
...
llvm-svn: 140841
2011-09-30 03:18:46 +00:00
Akira Hatanaka
4bdb4b1958
Mips64 arithmetic and logical instructions with one source register and
...
immediate.
llvm-svn: 140839
2011-09-30 02:08:54 +00:00
Akira Hatanaka
50a4f6d570
Fill delay slot with useful instructions. Modified from Sparc's version of delay
...
slot filler.
Patch by Reed Kotler at Mips Technologies.
llvm-svn: 140825
2011-09-29 23:52:13 +00:00
Dan Gohman
7dca165e93
When eliminating unnecessary retain+autorelease on return values,
...
handle the case where the retain is in a different basic block.
rdar://10210274.
llvm-svn: 140815
2011-09-29 22:27:34 +00:00
Dan Gohman
2df048a94b
Don't eliminate objc_retainBlock calls on stack objects if the
...
objc_retainBlock call is potentially responsible for copying
the block to the heap to extend its lifetime. rdar://10209613.
llvm-svn: 140814
2011-09-29 22:25:23 +00:00
Akira Hatanaka
70be05d5d0
Mips64 arithmetic and logical instructions with two source registers.
...
llvm-svn: 140806
2011-09-29 20:37:56 +00:00
Andrew Trick
e1d5ae73ac
LSR: rewrite inner loops only.
...
Rewriting the entire loop nest now requires -enable-lsr-nested.
See PR11035 for some performance data.
A few unit tests specifically test nested LSR, and are now under a flag.
llvm-svn: 140762
2011-09-29 01:33:38 +00:00
Andrew Trick
75c6a45d08
whitespace
...
llvm-svn: 140761
2011-09-29 01:31:48 +00:00
Justin Holewinski
4966d44b44
PTX: Add new patterns for bitconvert and any_extend
...
llvm-svn: 140753
2011-09-29 01:13:12 +00:00
Evan Cheng
1e53900b70
Tighten a ARM dag combine condition to avoid an identity transformation, which
...
ends up introducing a cycle in the DAG.
rdar://10196296
llvm-svn: 140733
2011-09-28 23:16:31 +00:00
Eli Friedman
81fc13efd2
PR11033: Make sure we don't generate PCMPGTQ and PCMPEQQ if the target CPU does not support them.
...
llvm-svn: 140723
2011-09-28 21:00:25 +00:00
Justin Holewinski
2f96de340f
PTX: MC-ize the PTX back-end (patch 1 of N)
...
Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.
llvm-svn: 140697
2011-09-28 14:32:04 +00:00
James Molloy
c4fcff419c
Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit.
...
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.
Add decoder and disassembler tests.
Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.
llvm-svn: 140696
2011-09-28 14:21:38 +00:00
Andrew Trick
5167b59724
Test case for r140670: indvars should hoist sext.
...
llvm-svn: 140671
2011-09-28 02:13:32 +00:00
Eli Friedman
f4f4a75d2b
PR10628: Fix getModRefInfo so it queries the underlying alias() implementation correctly while checking nocapture calls.
...
llvm-svn: 140666
2011-09-28 00:34:27 +00:00
Jakob Stoklund Olesen
2bf243f464
Remove X86-dependent stuff from SSEDomainFix.
...
This also enables domain swizzling for AVX code which required a few
trivial test changes.
The pass will be moved to lib/CodeGen shortly.
llvm-svn: 140659
2011-09-27 23:50:46 +00:00
Jim Grosbach
b503a2183e
ARM Thumb2 asm parsing [SU]XT[BH] without rotate but with .w.
...
Add inst alias to handle these assembly forms. Add tests, too.
rdar://10178799
llvm-svn: 140647
2011-09-27 22:18:54 +00:00
NAKAMURA Takumi
8095f04e96
test/CMakeLists.txt: Depend on llvm-objdump. "make check" is expected to resolve test-dependent targets on CMake build.
...
llvm-svn: 140641
2011-09-27 21:54:50 +00:00
Benjamin Kramer
355b353595
Stop emitting instructions with the name "tmp" they eat up memory and have to be uniqued, without any benefit.
...
If someone prefers %tmp42 to %42, run instnamer.
llvm-svn: 140634
2011-09-27 20:39:19 +00:00
Michael J. Spencer
89e83b38cd
Add binary archive support to llvm-nm.
...
llvm-svn: 140627
2011-09-27 19:37:18 +00:00