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Commit Graph

95783 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
21dfcf1c7d Add testcase for r190631
llvm-svn: 190807
2013-09-16 21:24:30 +00:00
Tim Northover
a89953876c TableGen: fix constness of new comparison function.
libc++ didn't seem to like a non-const call operator.

llvm-svn: 190797
2013-09-16 17:33:40 +00:00
Bill Schmidt
b9dc991f55 [PowerPC] Fix PR17155 - Ignore COPY_TO_REGCLASS during emit.
Fast-isel generates a COPY_TO_REGCLASS for widening f32 to f64, which
is a nop on PPC64.  This is needed to keep the register class system
happy, but on the fast-isel path it is not removed before emit as it
is for DAG select.  Ignore this op when emitting instructions.

llvm-svn: 190795
2013-09-16 17:25:12 +00:00
Tim Northover
efd2bb2366 TableGen: give asm match classes deterministic order.
TableGen was sorting the entries in some of its internal data
structures by pointer. This order filtered through to the final
matching table and affected the diagnostics produced on bad assembly
occasionally.

It also turns out STL algorithms are ridiculously easy to misuse on
containers with custom order methods. (No bugs before, or now that I
know of, but plenty in the middle).

This should fix the sanitizer bot, which ends up with weird pointers.

llvm-svn: 190793
2013-09-16 16:43:19 +00:00
Tim Northover
aa157f020e AsmMatcher: emit subtarget feature enum in deterministic order.
llvm-svn: 190792
2013-09-16 16:43:16 +00:00
Arnold Schwaighofer
11f318e34c Don't vectorize if there are outside loop users of the induction variable.
We would have to compute the pre increment value, either by computing it on
every loop iteration or by splitting the edge out of the loop and inserting a
computation for it there.

For now, just give up vectorizing such loops.

Fixes PR17179.

llvm-svn: 190790
2013-09-16 16:17:24 +00:00
Evgeniy Stepanov
f45c97a722 [msan] Check return value of main().
llvm-svn: 190782
2013-09-16 13:24:32 +00:00
Vladimir Medic
c143ef4d9e This patch implements Mips load/store instructions from/to coprocessor 2. Test cases are added.
llvm-svn: 190780
2013-09-16 10:29:42 +00:00
Benjamin Kramer
a65d61ae4b ARM: Deduplicate ConstantPoolValues.
llvm-svn: 190779
2013-09-16 10:17:31 +00:00
Daniel Sanders
e04b13b6d4 Fix the build for git repositories with multiple remotes.
Summary:
When a git repository had multiple remotes, ${repository} will be set to a multiline string. This causes compilation errors in SVNVersion.inc.

Fix this by limiting the output of utils/GetRepositoryPath to the first remote (which is reasonably likely to be 'origin').

Reviewers: jordan_rose

CC: llvm-commits, t.p.northover

Differential Revision: http://llvm-reviews.chandlerc.com/D1659

llvm-svn: 190778
2013-09-16 09:25:49 +00:00
Richard Sandiford
ea2b1a8b94 [SystemZ] Improve extload handling
The port originally had special patterns for extload, mapping them to the
same instructions as sextload.  It seemed neater to have patterns that
match "an extension that is allowed to be signed" and "an extension that
is allowed to be unsigned".

This was originally meant to be a clean-up, but it does improve the handling
of promoted integers a little, as shown by args-06.ll.

llvm-svn: 190777
2013-09-16 09:03:10 +00:00
Craig Topper
4edc623bda Make F16C feature flag imply AVX rather than just checking both at the patterns.
llvm-svn: 190775
2013-09-16 04:29:58 +00:00
Peter Collingbourne
cf3b1a2910 Implement function prefix data as an IR feature.
Previous discussion:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/063909.html

Differential Revision: http://llvm-reviews.chandlerc.com/D1191

llvm-svn: 190773
2013-09-16 01:08:15 +00:00
Hal Finkel
5bb449bca0 PPC: Don't restrict lvsl generation to after type legalization
This is a re-commit of r190764, with an extra check to make sure that we're not
performing the transformation on illegal types (a small test case has been
added for this as well).

Original commit message:

The PPC backend uses a target-specific DAG combine to turn unaligned Altivec
loads into a permutation-based sequence when possible. Unfortunately, the
target-specific DAG combine is not always called on all loads of interest
(sometimes the routines in DAGCombine call CombineTo such that the new node and
users are not added to the worklist); allowing the combine to trigger early
(before type legalization) mitigates this problem. Because the autovectorizers
only create legal vector types, I don't expect a lot of cases where this
optimization is enabled by type legalization in practice.

llvm-svn: 190771
2013-09-15 22:09:58 +00:00
Benjamin Kramer
b6950f09cc Replace some unnecessary vector copies with references.
llvm-svn: 190770
2013-09-15 22:04:42 +00:00
Benjamin Kramer
e8d495c088 ELF: Add support for the exclude section bit for gas compat.
llvm-svn: 190769
2013-09-15 19:53:20 +00:00
David Majnemer
29e93ff017 MC: Add support for '?' flags in .section directives
Summary:
The '?' flag uses the last section group if the last had a section
group.  We treat combining an explicit section group and the '?' as a
hard error.

This fixes PR17198.

Reviewers: rafael, bkramer

Reviewed By: bkramer

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1686

llvm-svn: 190768
2013-09-15 19:24:16 +00:00
Kai Nacke
9c30babbf2 Fix alignment of unwind data.
For alignment purposes, the instruction array will always have an even
number of entries, with the final entry potentially unused (in which
case the array will be one longer than indicated by the count of unwind
codes field).

Reviewed by Anton Korobeynikov, Charles Davis and Nico Rieck.

llvm-svn: 190767
2013-09-15 18:01:09 +00:00
Kai Nacke
1fb6384f6d Generate IMAGE_REL_AMD64_ADDR32NB relocations for SEH
data structures.

The Win64 EH data structures must be of type IMAGE_REL_AMD64_ADDR32NB
instead of IMAGE_REL_AMD64_ADDR32. This is easiely achieved by adding
the VK_COFF_IMGREL32 modifier to the symbol reference.
Change also references to start and end of the SEH range of a function
as offsets to start of the function.

Reviewed by Jim Grosbach, Charles Davis and Nico Rieck.

llvm-svn: 190766
2013-09-15 17:46:46 +00:00
Hal Finkel
c45bfe85cc Revert r190764: PPC: Don't restrict lvsl generation to after type legalization
This is causing test-suite failures.

Original commit message:

The PPC backend uses a target-specific DAG combine to turn unaligned Altivec
loads into a permutation-based sequence when possible. Unfortunately, the
target-specific DAG combine is not always called on all loads of interest
(sometimes the routines in DAGCombine call CombineTo such that the new node and
users are not added to the worklist); allowing the combine to trigger early
(before type legalization) mitigates this problem. Because the autovectorizers
only create legal vector types, I don't expect a lot of cases where this
optimization is enabled by type legalization in practice.

llvm-svn: 190765
2013-09-15 15:41:11 +00:00
Hal Finkel
ae7feec56e PPC: Don't restrict lvsl generation to after type legalization
The PPC backend uses a target-specific DAG combine to turn unaligned Altivec
loads into a permutation-based sequence when possible. Unfortunately, the
target-specific DAG combine is not always called on all loads of interest
(sometimes the routines in DAGCombine call CombineTo such that the new node and
users are not added to the worklist); allowing the combine to trigger early
(before type legalization) mitigates this problem. Because the autovectorizers
only create legal vector types, I don't expect a lot of cases where this
optimization is enabled by type legalization in practice.

llvm-svn: 190764
2013-09-15 15:20:54 +00:00
Hal Finkel
fc7b3598ec Prevent assert in CombinerGlobalAA with null values
DAGCombiner::isAlias can be called with SrcValue1 or SrcValue2 null, and we
can't use AA in this case (if we try, then the casting code in AA will assert).

llvm-svn: 190763
2013-09-15 02:19:49 +00:00
Reed Kotler
0d8133f6fe Expand the mask capability for deciding which functions are mips16 and mips32
so it can be better used for general interoperability testing between mips32
and mips16.

llvm-svn: 190762
2013-09-15 02:09:08 +00:00
Benjamin Kramer
7df265741c Remove unused StringRef that no compiler warned about, I wonder why.
llvm-svn: 190759
2013-09-14 22:55:54 +00:00
Ben Langmuir
1023593e49 Add the remaining Intel SHA instructions
Also assembly/disassembly tests, and for sha256rnds2, aliases with an explicit
xmm0 dependency.

llvm-svn: 190754
2013-09-14 15:03:21 +00:00
Robert Wilhelm
0ba533b69c Fix spelling.
llvm-svn: 190750
2013-09-14 09:34:59 +00:00
Robert Wilhelm
78f2958d70 Fix spelling.
llvm-svn: 190749
2013-09-14 09:34:24 +00:00
Chandler Carruth
d47d52e219 Remove the long, long defunct IR block placement pass.
This pass was based on the previous (essentially unused) profiling
infrastructure and the assumption that by ordering the basic blocks at
the IR level in a particular way, the correct layout would happen in the
end. This sometimes worked, and mostly didn't. It also was a really
naive implementation of the classical paper that dates from when branch
predictors were primarily directional and when loop structure wasn't
commonly available. It also didn't factor into the equation
non-fallthrough branches and other machine level details.

Anyways, for all of these reasons and more, I wrote
MachineBlockPlacement, which completely supercedes this pass. It both
uses modern profile information infrastructure, and actually works. =]

llvm-svn: 190748
2013-09-14 09:28:14 +00:00
Zoran Jovanovic
2922e5d9d9 Fixed bug when generating Load Upper Immediate microMIPS instruction.
llvm-svn: 190746
2013-09-14 07:35:41 +00:00
Zoran Jovanovic
8aeb0d5244 Support for microMIPS DIV instructions.
llvm-svn: 190745
2013-09-14 07:15:21 +00:00
Zoran Jovanovic
579084a489 Support for misc microMIPS instructions.
llvm-svn: 190744
2013-09-14 06:49:25 +00:00
Matt Arsenault
9196ae883b Add missing CHECK-LABEL
llvm-svn: 190740
2013-09-14 02:44:06 +00:00
Matt Arsenault
5525e4f3e8 Add test for untested path in SimplifyCFG
This case wasn't checked with a pointer condition.

llvm-svn: 190739
2013-09-14 02:44:02 +00:00
Daniel Dunbar
5862e31714 [lit] Add an --output option, for writing results in a machine readable form.
llvm-svn: 190738
2013-09-14 01:19:17 +00:00
Filip Pizlo
9a441082e4 Make PrettyStackTraceEntry use ManagedStatic for its ThreadLocal.
This was somewhat tricky because ~PrettyStackTraceEntry() may run after 
llvm_shutdown() has been called. This is rare and only happens for a common idiom 
used in the main() functions of command-line tools. This works around the idiom by 
skipping the stack clean-up if the PrettyStackTraceHead ManagedStatic is not 
constructed (i.e. llvm_shutdown() has been called).

llvm-svn: 190730
2013-09-13 22:59:47 +00:00
Hal Finkel
ac7ef3f74f Add missing break statement in PPCISelLowering
As it turns out, not a problem in practice, but it should be there.

llvm-svn: 190720
2013-09-13 20:09:02 +00:00
Preston Gurd
0411803c14 Adds support for Atom Silvermont (SLM) - -march=slm
Implements Instruction scheduler latencies for Silvermont,
using latencies from the Intel Silvermont Optimization Guide.

Auto detects SLM.

Turns on post RA scheduler when generating code for SLM.

llvm-svn: 190717
2013-09-13 19:23:28 +00:00
Quentin Colombet
4b46915824 [Peephole] Rewrite copies to avoid cross register banks copies.
By definition copies across register banks are not coalescable. Still, it may be
possible to get rid of such a copy when the value is available in another
register of the same register file.
Consider the following example, where capital and lower letters denote different
register file:
b = copy A <-- cross-bank copy
...
C = copy b <-- cross-bank copy

This could have been optimized this way:
b = copy A  <-- cross-bank copy
...
C = copy A <-- same-bank copy

Note: b and C's definitions may be in different basic blocks.

This patch adds a peephole optimization that looks through a chain of copies
leading to a cross-bank copy and reuses a source that is on the same register
file if available.

This solution could also be used to get rid of some copies (e.g., A could have
been used instead of C). However, we do not do so because:
- It may over constrain the coloring of the source register for coalescing.
- The register allocator may not be able to find a nice split point for the
  longer live-range, leading to more spill.

<rdar://problem/14742333>

llvm-svn: 190713
2013-09-13 18:26:31 +00:00
Benjamin Kramer
fba17fe3ca Add warn_unused_result to empty() on various containers.
empty() doesn't actually empty out the container, making this a common typo.

llvm-svn: 190708
2013-09-13 17:33:24 +00:00
Nuno Lopes
00eb997beb typo fix: use BUILD_ARCHIVE to build .a libs and not ARCHIVE_LIBRARY
llvm-svn: 190696
2013-09-13 15:01:54 +00:00
Amaury de la Vieuville
e347276ef1 Fix tests for hasFPARMv8 name change (r190692)
Patch by Bradley Smith

llvm-svn: 190694
2013-09-13 14:37:52 +00:00
Joey Gouly
0af412fe63 [ARMv8] Change hasV8Fp to hasFPARMv8, and other command line options
to be more consistent.

llvm-svn: 190692
2013-09-13 13:46:57 +00:00
Evgeniy Stepanov
47ad94a685 [msan] Add source file:line to stack origin reports.
Compiler part.

llvm-svn: 190689
2013-09-13 12:54:49 +00:00
Daniel Sanders
a53b2ec4ae Fix build failure reported by Tobias Markmann in bug 17203.
svn 1.8.0 emits an additional line matching 'URL:' in its 'svn info' command
('Relative URL:').
Changed the grep to match only the intended line so that a valid SVNVersion.inc
is generated.

The problem doesnt occur with the svn version I'm using (1.7.5) but Tobias has
confirmed that the change fixes the problem.

See http://llvm.org/bugs/show_bug.cgi?id=17203

llvm-svn: 190685
2013-09-13 12:41:38 +00:00
Joey Gouly
2b0127dd73 [ARMv8] Emit the proper .fpu directive.
Patch by Bradley Smith!

llvm-svn: 190683
2013-09-13 11:51:52 +00:00
Amaury de la Vieuville
c3c5a4a8aa Add "native" to config.available_features, to make it easier to disable non-x-compile-safe tests
Patch by Artyom Skrobov!

llvm-svn: 190679
2013-09-13 10:59:01 +00:00
Patrik Hagglund
ee9a7328a6 Fix for executing AutoRegen.sh. Revert a part of r187209.
Since r187209, which modified ltdl.m4, I was unable to execute
AutoRegen.sh, getting:

  ../configure:10779: error: possibly undefined macro: AC_LTDL_FUNC_ARGZ

This commit re-adds AC_LTDL_FUNC_ARGZ to ltdl.m4, as a quick fix. For me, this
corresponds to the configure file currently checked in.

(However, the ltdl library seems to be unused since r74924 in 2009,
except for the use of the LTDL_SHLIB_EXT macro in
bugpoint(?). Therefore, the right solution seems to try to get rid of
the local ltdl.m4 file, specified by autoconf/README.TXT.)

llvm-svn: 190677
2013-09-13 10:29:42 +00:00
Zoran Jovanovic
be019657bd Test commit to verify that commit access works.
llvm-svn: 190676
2013-09-13 10:08:05 +00:00
Richard Sandiford
c0e0e27a84 [SystemZ] Use getTarget{Insert,Extract}Subreg rather than getMachineNode
Just a clean-up, no behavioral change intended.

llvm-svn: 190673
2013-09-13 09:12:44 +00:00
Richard Sandiford
30374b51cb [SystemZ] Try to fold shifts into TMxx
E.g. "SRL %r2, 2; TMLL %r2, 1" => "TMLL %r2, 4".

llvm-svn: 190672
2013-09-13 09:09:50 +00:00