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820 Commits

Author SHA1 Message Date
Evan Cheng
168b8c5b29 No need to keep track of top and bottom nodes in a group since the vector is 
already in order. Thanks Jim for pointing it out.

llvm-svn: 25608
 2006-01-25 18:54:24 +00:00
Nate Begeman
c29fac7fce First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Jeff Cohen
7d0e421a42 Fix VC++ compilation error. 
llvm-svn: 25604
 2006-01-25 17:17:49 +00:00
Evan Cheng
0296933dbe Bottom up register usage reducing list scheduler. 
llvm-svn: 25601
 2006-01-25 09:14:32 +00:00
Evan Cheng
d95c4530e7 Keep track of bottom / top element of a set of flagged nodes. 
llvm-svn: 25600
 2006-01-25 09:13:41 +00:00
Evan Cheng
69d30b1c55 If scheduler choice is the default (-sched=default), use target scheduling 
preference to determine which scheduler to use. SchedulingForLatency ==
Breadth first; SchedulingForRegPressure == bottom up register reduction list
scheduler.

llvm-svn: 25599
 2006-01-25 09:12:57 +00:00
Chris Lattner
cfb7a75ce9 Fix an infinite loop I caused by making sure to legalize the flag operand 
of CALLSEQ_* nodes

llvm-svn: 25582
 2006-01-24 05:48:21 +00:00
Jeff Cohen
ed41a16e5f Fix VC++ compilation error. 
llvm-svn: 25577
 2006-01-24 04:43:17 +00:00
Andrew Lenharth
35efa9c2d9 another couple selects 
llvm-svn: 25551
 2006-01-23 21:51:14 +00:00
Andrew Lenharth
28a8d211f6 another selectto 
llvm-svn: 25548
 2006-01-23 20:59:12 +00:00
Jim Laskey
e4ff0868a1 Typo. 
llvm-svn: 25545
 2006-01-23 13:34:04 +00:00
Evan Cheng
f622869383 Skeleton of the list schedule. 
llvm-svn: 25544
 2006-01-23 08:26:10 +00:00
Evan Cheng
8cae3b8cdb Minor clean up. 
llvm-svn: 25543
 2006-01-23 08:25:34 +00:00
Chris Lattner
3b0a29a694 Fix Regression/CodeGen/SparcV8/2006-01-22-BitConvertLegalize.ll by making 
sure that the result of expanding a BIT_CONVERT node is itself legalized.

llvm-svn: 25538
 2006-01-23 07:30:46 +00:00
Evan Cheng
b6bc5af6c8 Remove a couple of unnecessary #include's 
llvm-svn: 25535
 2006-01-23 07:21:01 +00:00
Evan Cheng
37c62244a6 Factor out more instruction scheduler code to the base class. 
llvm-svn: 25532
 2006-01-23 07:01:07 +00:00
Chris Lattner
adb63115bc Fix bugs lowering stackrestore, fixing 2004-08-12-InlinerAndAllocas.c on 
PPC.

llvm-svn: 25522
 2006-01-23 05:22:07 +00:00
Chris Lattner
aafc339b4e Add explicit #includes of <iostream> 
llvm-svn: 25515
 2006-01-22 23:41:00 +00:00
Chris Lattner
a7ff02319f Fix a bug in a recent refactor that caused a bunch of programs to miscompile 
or the compiler to crash.

llvm-svn: 25503
 2006-01-21 19:12:11 +00:00
Chris Lattner
9f233fa260 Fix CodeGen/PowerPC/2006-01-20-ShiftPartsCrash.ll 
llvm-svn: 25496
 2006-01-21 04:27:00 +00:00
Evan Cheng
4a57a7551f Do some code refactoring on Jim's scheduler in preparation of the new list 
scheduler.

llvm-svn: 25493
 2006-01-21 02:32:06 +00:00
Chris Lattner
a348dc9195 remove some unintentionally committed code 
llvm-svn: 25483
 2006-01-20 18:40:10 +00:00
Chris Lattner
737a8dab41 If the target doesn't support f32 natively, insert the FP_EXTEND in target-indep 
code, so that the LowerReturn code doesn't have to handle it.

llvm-svn: 25482
 2006-01-20 18:38:32 +00:00
Evan Cheng
3f6b496700 Another typo 
llvm-svn: 25440
 2006-01-19 04:54:52 +00:00
Andrew Lenharth
c7a7422412 was ignoring the legalized chain in this case, fixed SPASS on alpha 
llvm-svn: 25428
 2006-01-18 23:19:08 +00:00
Nate Begeman
6b2bebd70a Get rid of code in the DAGCombiner that is duplicated in SelectionDAG.cpp 
Now all constant folding in the code generator is in one place.

llvm-svn: 25426
 2006-01-18 22:35:16 +00:00
Chris Lattner
9bc0f6cd90 Temporary work around for a libcall insertion bug: If a target doesn't 
support FSIN/FCOS nodes, do not lower sin/cos to them.

llvm-svn: 25425
 2006-01-18 21:50:14 +00:00
Chris Lattner
f7004ffd51 Fix a backwards conditional that caused an inf loop in some cases. This 
fixes: test/Regression/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll

llvm-svn: 25419
 2006-01-18 19:13:41 +00:00
Robert Bocchino
dc31d8561b Support for the insertelement operation. 
llvm-svn: 25405
 2006-01-17 20:06:42 +00:00
Evan Cheng
b456305355 Bug fix: missing LegalizeOp() on newly created nodes. 
llvm-svn: 25401
 2006-01-17 19:47:13 +00:00
Jim Laskey
0c4202b0ba Adding basic support for Dwarf line number debug information. 
I promise to keep future commits smaller.

llvm-svn: 25396
 2006-01-17 17:31:53 +00:00
Reid Spencer
3cecd3c4cf For PR411: 
This patch is an incremental step towards supporting a flat symbol table.
It de-overloads the intrinsic functions by providing type-specific intrinsics
and arranging for automatically upgrading from the old overloaded name to
the new non-overloaded name. Specifically:
  llvm.isunordered -> llvm.isunordered.f32, llvm.isunordered.f64
  llvm.sqrt -> llvm.sqrt.f32, llvm.sqrt.f64
  llvm.ctpop -> llvm.ctpop.i8, llvm.ctpop.i16, llvm.ctpop.i32, llvm.ctpop.i64
  llvm.ctlz -> llvm.ctlz.i8, llvm.ctlz.i16, llvm.ctlz.i32, llvm.ctlz.i64
  llvm.cttz -> llvm.cttz.i8, llvm.cttz.i16, llvm.cttz.i32, llvm.cttz.i64
New code should not use the overloaded intrinsic names. Warnings will be
emitted if they are used.

llvm-svn: 25366
 2006-01-16 21:12:35 +00:00
Nate Begeman
ea80828ef2 Constant fold ctpop/ctlz/cttz, and a couple other small cleanups 
llvm-svn: 25357
 2006-01-16 08:07:10 +00:00
Nate Begeman
61d6a364ed Expand case for 64b Legalize, even though no one should end up using this 
(itanium supports bswap natively, alpha should custom lower it using the
VAX floating point swapload, ha ha).

llvm-svn: 25356
 2006-01-16 07:59:13 +00:00
Chris Lattner
0feeddc8ee Disable two transformations that contribute to bus errors on SparcV8. 
llvm-svn: 25339
 2006-01-15 18:58:59 +00:00
Chris Lattner
4b3181512b Allow the target to specify 'expand' if they just require the amount to 
be subtracted from the stack pointer.

llvm-svn: 25331
 2006-01-15 08:54:32 +00:00
Chris Lattner
acf02c3510 Fix custom lowering of dynamic_stackalloc 
llvm-svn: 25329
 2006-01-15 08:43:08 +00:00
Chris Lattner
c23f5e6dc7 add a missing node name 
llvm-svn: 25327
 2006-01-15 08:39:35 +00:00
Chris Lattner
e92e4a4342 Token chain results are not always the first or last result. Consider copyfromreg nodes, where they are the middle result (the flag result is last) 
llvm-svn: 25325
 2006-01-14 22:41:46 +00:00
Nate Begeman
956b57ce43 Remove some duplicated code 
llvm-svn: 25313
 2006-01-14 03:18:27 +00:00
Nate Begeman
85b2dc0c4e bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Chris Lattner
91b83a2448 If a target specified a stack pointer with setStackPointerRegisterToSaveRestore, 
lower STACKSAVE/STACKRESTORE into a copy from/to that register.

llvm-svn: 25276
 2006-01-13 17:48:44 +00:00
Chris Lattner
4107b4d7ee Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allow 
targets to custom expand them as they desire.

llvm-svn: 25273
 2006-01-13 02:50:02 +00:00
Chris Lattner
fac137d4bd add stacksave/stackrestore nodes 
llvm-svn: 25270
 2006-01-13 02:39:42 +00:00
Chris Lattner
5ab0813f3a Add "support" for stacksave/stackrestore to the dag isel 
llvm-svn: 25268
 2006-01-13 02:24:42 +00:00
Chris Lattner
f997ab779f Add a simple missing fold to produce this: 
subfic r3, r2, 33

instead of this:

        subfic r2, r2, 32
        addi r3, r2, 1

llvm-svn: 25255
 2006-01-12 20:22:43 +00:00
Chris Lattner
ac8df987d5 Don't create rotate instructions in unsupported types, because we don't have 
promote/expand code yet.  This fixes the 177.mesa failure on PPC.

llvm-svn: 25250
 2006-01-12 18:57:33 +00:00
Evan Cheng
c2241561ae Allow custom lowering of DYNAMIC_STACKALLOC. 
llvm-svn: 25224
 2006-01-11 22:14:47 +00:00
Evan Cheng
7bd69b756e ignore register #0 
llvm-svn: 25223
 2006-01-11 22:13:48 +00:00
Nate Begeman
cff96008ac Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner
da0089a5c7 silence a warning 
llvm-svn: 25184
 2006-01-10 19:43:26 +00:00
Robert Bocchino
38060df8d1 Added selection DAG support for the extractelement operation. 
llvm-svn: 25179
 2006-01-10 19:04:57 +00:00
Chris Lattner
8026872e44 Fix an exponential function in libcall insertion to not be exponential. :) 
llvm-svn: 25165
 2006-01-09 23:21:49 +00:00
Evan Cheng
a8064e0723 * Allow custom lowering of ADD_PARTS, SUB_PARTS, SHL_PARTS, SRA_PARTS, 
and SRL_PARTS.
* Fix a bug that caused *_PARTS to be custom lowered twice.

llvm-svn: 25157
 2006-01-09 18:31:59 +00:00
Evan Cheng
7a32c047d9 New getNode() variants. 
llvm-svn: 25156
 2006-01-09 18:29:18 +00:00
Chris Lattner
ae1bace70a Unbreak the build :( 
llvm-svn: 25124
 2006-01-06 05:47:48 +00:00
Evan Cheng
105a0cc17e Revert the previous check-in. Leave shl x, 1 along for target to deal with. 
llvm-svn: 25121
 2006-01-06 01:56:02 +00:00
Evan Cheng
efe621adce fold (shl x, 1) -> (add x, x) 
llvm-svn: 25120
 2006-01-06 01:06:31 +00:00
Evan Cheng
133170cb5c Support for custom lowering of ISD::RET. 
llvm-svn: 25116
 2006-01-06 00:41:43 +00:00
Jim Laskey
5eddaee9f3 Added initial support for DEBUG_LABEL allowing debug specific labels to be 
inserted in the code.

llvm-svn: 25104
 2006-01-05 01:25:28 +00:00
Jim Laskey
61138e28ff Applied some recommend changes from sabre. The dominate one beginning "let the 
pass manager do it's thing."  Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.

llvm-svn: 25100
 2006-01-04 22:28:25 +00:00
Jim Laskey
897ad8ddb7 Add unique id to debug location for debug label use (work in progress.) 
llvm-svn: 25096
 2006-01-04 15:04:11 +00:00
Jim Laskey
1b0399e8f0 Change how MachineDebugInfo is fetched. 
llvm-svn: 25089
 2006-01-04 13:42:59 +00:00
Nate Begeman
25fe5b2b76 Make sure to pass the offset into the new node, so that we don't silently 
drop it on the floor.

llvm-svn: 25044
 2005-12-30 00:10:38 +00:00
Duraid Madina
b9197e021f purity++ 
llvm-svn: 25041
 2005-12-29 05:59:19 +00:00
Andrew Lenharth
a639cb7176 allow custom lowering to return null for legal results 
llvm-svn: 25007
 2005-12-25 01:07:37 +00:00
Andrew Lenharth
5cf1fcb844 Support Custom lowering of a few more operations. 
Alpha needs to custom lower *DIV and *REM

llvm-svn: 25006
 2005-12-24 23:42:32 +00:00
Jim Laskey
d8cc1062ed Remove redundant debug locations. 
llvm-svn: 24995
 2005-12-23 20:08:28 +00:00
Chris Lattner
c97655052a unbreak the build :-/ 
llvm-svn: 24992
 2005-12-23 16:12:20 +00:00
Evan Cheng
bcfef42cd4 Allow custom lowering of LOAD, EXTLOAD, ZEXTLOAD, STORE, and TRUNCSTORE. Not 
currently used.

llvm-svn: 24988
 2005-12-23 07:29:34 +00:00
Chris Lattner
0637d38ec2 Simplify store(bitconv(x)) to store(x). This allows us to compile this: 
void bar(double Y, double *X) {
  *X = Y;
}

to this:

bar:
        save -96, %o6, %o6
        st %i1, [%i2+4]
        st %i0, [%i2]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        st %i1, [%i6+-4]
        st %i0, [%i6+-8]
        ldd [%i6+-8], %f0
        std  %f0, [%i2]
        restore %g0, %g0, %g0
        retl
        nop

on sparcv8.

llvm-svn: 24983
 2005-12-23 05:48:07 +00:00
Chris Lattner
20e6338732 fold (conv (load x)) -> (load (conv*)x). 
This allows us to compile this:
void foo(double);
void bar(double *X) { foo(*X); }

To this:

bar:
        save -96, %o6, %o6
        ld [%i0+4], %o1
        ld [%i0], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        ldd [%i0], %f0
        std %f0, [%i6+-8]
        ld [%i6+-4], %o1
        ld [%i6+-8], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on SparcV8.

llvm-svn: 24982
 2005-12-23 05:44:41 +00:00
Chris Lattner
28887b3ca6 Fold bitconv(bitconv(x)) -> x. We now compile this: 
void foo(double);
void bar(double X) { foo(X); }

to this:

bar:
        save -96, %o6, %o6
        or %g0, %i0, %o0
        or %g0, %i1, %o1
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -112, %o6, %o6
        st %i1, [%i6+-4]
        st %i0, [%i6+-8]
        ldd [%i6+-8], %f0
        std %f0, [%i6+-16]
        ld [%i6+-12], %o1
        ld [%i6+-16], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on V8.

llvm-svn: 24981
 2005-12-23 05:37:50 +00:00
Chris Lattner
9ee4ecfe74 constant fold bits_convert in getNode and in the dag combiner for fp<->int 
conversions.  This allows V8 to compiles this:

void %test() {
        call float %test2( float 1.000000e+00, float 2.000000e+00, double 3.000000e+00, double* null )
        ret void
}

into:

test:
        save -96, %o6, %o6
        sethi 0, %o3
        sethi 1049088, %o2
        sethi 1048576, %o1
        sethi 1040384, %o0
        or %g0, %o3, %o4
        call test2
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of:

test:
        save -112, %o6, %o6
        sethi 0, %o4
        sethi 1049088, %l0
        st %o4, [%i6+-12]
        st %l0, [%i6+-16]
        ld [%i6+-12], %o3
        ld [%i6+-16], %o2
        sethi 1048576, %o1
        sethi 1040384, %o0
        call test2
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24980
 2005-12-23 05:30:37 +00:00
Chris Lattner
4bcbe2d378 Fix a pasto 
llvm-svn: 24973
 2005-12-23 00:52:30 +00:00
Chris Lattner
4a929edf04 fix a thinko in the bit_convert handling code 
llvm-svn: 24972
 2005-12-23 00:50:25 +00:00
Chris Lattner
a59cc5ebbb add very simple support for the BIT_CONVERT node 
llvm-svn: 24970
 2005-12-23 00:16:34 +00:00
Chris Lattner
73f38507d9 remove dead code 
llvm-svn: 24965
 2005-12-22 21:16:08 +00:00
Chris Lattner
6f708e886f The 81st column doesn't like code in it. 
llvm-svn: 24943
 2005-12-22 05:23:45 +00:00
Evan Cheng
fb6413e05a * Fix a GlobalAddress lowering bug. 
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.

llvm-svn: 24921
 2005-12-21 23:05:39 +00:00
Jim Laskey
d82881490c Disengage DEBUG_LOC from non-PPC targets. 
llvm-svn: 24919
 2005-12-21 20:51:37 +00:00
Evan Cheng
6f15189a77 * Added support for X86 RET with an additional operand to specify number of 
bytes to pop off stack.
* Added support for X86 SETCC.

llvm-svn: 24917
 2005-12-21 20:21:51 +00:00
Chris Lattner
6364b03742 make sure to relegalize all cases 
llvm-svn: 24911
 2005-12-21 19:40:42 +00:00
Chris Lattner
079443691c enable the gep isel opt 
llvm-svn: 24910
 2005-12-21 19:36:36 +00:00
Chris Lattner
15bf8f26f2 fix a bug I introduced that broke recursive expansion of nodes (e.g. scalarizing vectors) 
llvm-svn: 24905
 2005-12-21 18:02:52 +00:00
Chris Lattner
a7d3498167 Lower ConstantAggregateZero into zeros 
llvm-svn: 24890
 2005-12-21 02:43:26 +00:00
Evan Cheng
44e4e6a57f Added a hook to print out names of target specific DAG nodes. 
llvm-svn: 24877
 2005-12-20 06:22:03 +00:00
Chris Lattner
088b3ccdcc Fix a nasty latent bug in the legalizer that was triggered by my patch 
last night, breaking crafty and twolf.  Make sure that the newly found
legal nodes are themselves not re-legalized until the next iteration.

Also, since this functionality exists now, we can reduce number of legalizer
iterations by depending on this behavior instead of having to misuse 'do
another iteration' to get the same effect.

llvm-svn: 24875
 2005-12-20 00:53:54 +00:00
Evan Cheng
bb34a50cb0 X86 conditional branch support. 
llvm-svn: 24870
 2005-12-19 23:12:38 +00:00
Evan Cheng
503d37094f Print out opcode number if it's an unknown target node. 
llvm-svn: 24869
 2005-12-19 23:11:49 +00:00
Chris Lattner
91987b5c3c Fix a case where the DAG Combiner would accidentally CSE flag-producing nodes, 
creating graphs that cannot be scheduled.

llvm-svn: 24866
 2005-12-19 22:21:21 +00:00
Jim Laskey
2f4c62c51a Amend comment. 
llvm-svn: 24861
 2005-12-19 16:32:26 +00:00
Jim Laskey
57b66c8475 Create a strong dependency for loads following stores. This will leave a 
latency period between the two.

llvm-svn: 24860
 2005-12-19 16:30:13 +00:00
Chris Lattner
aeeb98a7dd Make sure to relegalize new nodes 
llvm-svn: 24843
 2005-12-18 23:54:29 +00:00
Jeff Cohen
d46f4d16d2 Keep VC++ happy. 
llvm-svn: 24835
 2005-12-18 22:20:05 +00:00
Chris Lattner
deb7eb58be More corrections for flagged copyto/from reg 
llvm-svn: 24828
 2005-12-18 15:36:21 +00:00
Chris Lattner
daa904e19a legalize copytoreg and copyfromreg nodes that have flag operands correctly. 
llvm-svn: 24826
 2005-12-18 15:27:43 +00:00
Jim Laskey
831eca00db Fix a bug Sabre was having where the DAG root was a group. The group dominator 
needed to be added to the ordering list, not the first member of the group.

llvm-svn: 24816
 2005-12-18 04:40:52 +00:00
Jim Laskey
a06085f024 Groups were not emitted if the dominator node and the node in the ordering list 
were not the same node.  Ultimately the test was bogus.

llvm-svn: 24815
 2005-12-18 03:59:21 +00:00
Chris Lattner
bb6af65f76 Simplify code 
llvm-svn: 24806
 2005-12-18 01:03:46 +00:00
Chris Lattner
bdb696294e allow custom expansion of BR_CC 
llvm-svn: 24804
 2005-12-17 23:46:46 +00:00
Evan Cheng
d51da93a03 X86 lowers SELECT to a cmp / test followed by a conditional move. 
llvm-svn: 24754
 2005-12-17 01:21:05 +00:00
Jim Laskey
37957b1ad3 Added source file/line correspondence for dwarf (PowerPC only at this point.) 
llvm-svn: 24748
 2005-12-16 22:45:29 +00:00
Chris Lattner
d4a3cb4d86 Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support 
if after legalize.  This fixes IA64 failures.

llvm-svn: 24725
 2005-12-15 19:02:38 +00:00
Chris Lattner
9bdaf3e826 When folding loads into ops, immediately replace uses of the op with the 
load.  This reduces number of worklist iterations and avoid missing optimizations
depending on folding of things into sext_inreg nodes (which aren't supported by
all targets).
Tested by Regression/CodeGen/X86/extend.ll:test2

llvm-svn: 24712
 2005-12-14 19:25:30 +00:00
Chris Lattner
790a35b33b Fix the (zext (zextload)) case to trigger, similarly for sign extends. 
Allow (zext (truncate)) to apply after legalize if the target supports
AND (which all do).

This compiles
short %foo() {
        %tmp.0 = load ubyte* %X         ; <ubyte> [#uses=1]
        %tmp.3 = cast ubyte %tmp.0 to short             ; <short> [#uses=1]
        ret short %tmp.3
}

to:
_foo:
        movzbl _X, %eax
        ret

instead of:

_foo:
        movzbl _X, %eax
        movzbl %al, %eax
        ret

thanks to Evan for pointing this out.

llvm-svn: 24709
 2005-12-14 19:05:06 +00:00
Chris Lattner
30ac1d4dbb Fix a miscompilation in crafty due to a recent patch 
llvm-svn: 24706
 2005-12-14 07:58:38 +00:00
Evan Cheng
65498e21ad Fold (zext (load x) to (zextload x). 
llvm-svn: 24702
 2005-12-14 02:19:23 +00:00
Chris Lattner
eff6e46178 Don't lump the filename and working dir together 
llvm-svn: 24697
 2005-12-13 17:40:33 +00:00
Nate Begeman
3d420d73e2 Lowering constant pool entries on ppc exposed a bug in the recently added 
ConstantVec legalizing code, which would return constantpool nodes that
were not of the target's pointer type.

llvm-svn: 24691
 2005-12-13 03:03:23 +00:00
Chris Lattner
b0b4e53b55 Accept and ignore prefetches for now 
llvm-svn: 24678
 2005-12-12 22:51:16 +00:00
Chris Lattner
ea3d25b64a Fix CodeGen/Generic/2005-12-12-ExpandSextInreg.ll 
llvm-svn: 24677
 2005-12-12 22:27:43 +00:00
Chris Lattner
a54452fd4f Minor tweak to get isel opt 
llvm-svn: 24663
 2005-12-11 09:05:13 +00:00
Nate Begeman
a0e26b25f4 Add support for TargetConstantPool nodes to the dag isel emitter, and use 
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
 2005-12-10 02:36:00 +00:00
Evan Cheng
0b7a482921 Added new getNode and getTargetNode variants for X86 stores. 
llvm-svn: 24653
 2005-12-10 00:37:58 +00:00
Chris Lattner
8f28525f54 Teach legalize how to promote sext_inreg to fix a problem Andrew pointed 
out to me.

llvm-svn: 24644
 2005-12-09 17:32:47 +00:00
Chris Lattner
e27671119a improve code insertion in two ways: 
1. Only forward subst offsets into loads and stores, not into arbitrary
   things, where it will likely become a load.
2. If the source is a cast from pointer, forward subst the cast as well,
   allowing us to fold the cast away (improving cases when the cast is
   from an alloca or global).

This hasn't been fully tested, but does appear to further reduce register
pressure and improve code.  Lets let the testers grind on it a bit. :)

llvm-svn: 24640
 2005-12-08 08:00:12 +00:00
Nate Begeman
589dff9a20 Fix a crash where ConstantVec nodes were being generated with the wrong 
type when the target did not support them.  Also teach Legalize how to
expand ConstantVecs.

This allows us to generate

_test:
        lwz r2, 12(r3)
        lwz r4, 8(r3)
        lwz r5, 4(r3)
        lwz r6, 0(r3)
        addi r2, r2, 4
        addi r4, r4, 3
        addi r5, r5, 2
        addi r6, r6, 1
        stw r2, 12(r3)
        stw r4, 8(r3)
        stw r5, 4(r3)
        stw r6, 0(r3)
        blr

For:

void %test(%v4i *%P) {
        %T = load %v4i* %P
        %S = add %v4i %T, <int 1, int 2, int 3, int 4>
        store %v4i %S, %v4i * %P
        ret void
}

On PowerPC.

llvm-svn: 24633
 2005-12-07 19:48:11 +00:00
Chris Lattner
055ecd8533 Only transform (sext (truncate x)) -> (sextinreg x) if before legalize or 
if the target supports the resultant sextinreg

llvm-svn: 24632
 2005-12-07 18:02:05 +00:00
Chris Lattner
8f17c95cc2 Teach the dag combiner to turn a truncate/sign_extend pair into a sextinreg 
when the types match up.  This allows the X86 backend to compile:

sbyte %toggle_value(sbyte* %tmp.1) {
        %tmp.2 = load sbyte* %tmp.1
        ret sbyte %tmp.2
}

to this:

_toggle_value:
        mov %EAX, DWORD PTR [%ESP + 4]
        movsx %EAX, BYTE PTR [%EAX]
        ret

instead of this:

_toggle_value:
        mov %EAX, DWORD PTR [%ESP + 4]
        movsx %EAX, BYTE PTR [%EAX]
        movsx %EAX, %AL
        ret

noticed in Shootout/objinst.

-Chris

llvm-svn: 24630
 2005-12-07 07:11:03 +00:00
Nate Begeman
6c1b8712c5 Teach the SelectionDAG ISel how to turn ConstantPacked values into 
constant nodes with vector types.  Also teach the asm printer how to print
ConstantPacked constant pool entries.  This allows us to generate altivec
code such as the following, which adds a vector constantto a packed float.

LCPI1_0:  <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 >
        .space  4
        .space  4
        .space  4
        .long   1065353216      ; float 1
        .text
        .align  4
        .globl  _foo
_foo:
        lis r2, ha16(LCPI1_0)
        la r2, lo16(LCPI1_0)(r2)
        li r4, 0
        lvx v0, r4, r2
        lvx v1, r4, r3
        vaddfp v0, v1, v0
        stvx v0, r4, r3
        blr

For the llvm code:

void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 >
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

llvm-svn: 24616
 2005-12-06 06:18:55 +00:00
Chris Lattner
46ac4d0810 Fix the #1 code quality problem that I have seen on X86 (and it also affects 
PPC and other targets).  In a particular, consider code like this:

struct Vector3 { double x, y, z; };
struct Matrix3 { Vector3 a, b, c; };
double dot(Vector3 &a, Vector3 &b) {
   return a.x * b.x  +  a.y * b.y  +  a.z * b.z;
}
Vector3 mul(Vector3 &a, Matrix3 &b) {
   Vector3 r;
   r.x = dot( a, b.a );
   r.y = dot( a, b.b );
   r.z = dot( a, b.c );
   return r;
}
void transform(Matrix3 &m, Vector3 *x, int n) {
   for (int i = 0; i < n; i++)
      x[i] = mul( x[i], m );
}

we compile transform to a loop with all of the GEP instructions for indexing
into 'm' pulled out of the loop (9 of them).  Because isel occurs a bb at a time
we are unable to fold the constant index into the loads in the loop, leading to
PPC code that looks like this:

LBB3_1: ; no_exit.preheader
        li r2, 0
        addi r6, r3, 64        ;; 9 values live across the loop body!
        addi r7, r3, 56
        addi r8, r3, 48
        addi r9, r3, 40
        addi r10, r3, 32
        addi r11, r3, 24
        addi r12, r3, 16
        addi r30, r3, 8
LBB3_2: ; no_exit
        lfd f0, 0(r30)
        lfd f1, 8(r4)
        fmul f0, f1, f0
        lfd f2, 0(r3)        ;; no constant indices folded into the loads!
        lfd f3, 0(r4)
        lfd f4, 0(r10)
        lfd f5, 0(r6)
        lfd f6, 0(r7)
        lfd f7, 0(r8)
        lfd f8, 0(r9)
        lfd f9, 0(r11)
        lfd f10, 0(r12)
        lfd f11, 16(r4)
        fmadd f0, f3, f2, f0
        fmul f2, f1, f4
        fmadd f0, f11, f10, f0
        fmadd f2, f3, f9, f2
        fmul f1, f1, f6
        stfd f0, 0(r4)
        fmadd f0, f11, f8, f2
        fmadd f1, f3, f7, f1
        stfd f0, 8(r4)
        fmadd f0, f11, f5, f1
        addi r29, r4, 24
        stfd f0, 16(r4)
        addi r2, r2, 1
        cmpw cr0, r2, r5
        or r4, r29, r29
        bne cr0, LBB3_2 ; no_exit

uh, yuck.  With this patch, we now sink the constant offsets into the loop, producing
this code:

LBB3_1: ; no_exit.preheader
        li r2, 0
LBB3_2: ; no_exit
        lfd f0, 8(r3)
        lfd f1, 8(r4)
        fmul f0, f1, f0
        lfd f2, 0(r3)
        lfd f3, 0(r4)
        lfd f4, 32(r3)       ;; much nicer.
        lfd f5, 64(r3)
        lfd f6, 56(r3)
        lfd f7, 48(r3)
        lfd f8, 40(r3)
        lfd f9, 24(r3)
        lfd f10, 16(r3)
        lfd f11, 16(r4)
        fmadd f0, f3, f2, f0
        fmul f2, f1, f4
        fmadd f0, f11, f10, f0
        fmadd f2, f3, f9, f2
        fmul f1, f1, f6
        stfd f0, 0(r4)
        fmadd f0, f11, f8, f2
        fmadd f1, f3, f7, f1
        stfd f0, 8(r4)
        fmadd f0, f11, f5, f1
        addi r6, r4, 24
        stfd f0, 16(r4)
        addi r2, r2, 1
        cmpw cr0, r2, r5
        or r4, r6, r6
        bne cr0, LBB3_2 ; no_exit

This is much nicer as it reduces register pressure in the loop a lot.  On X86,
this takes the function from having 9 spilled registers to 2.  This should help
some spec programs on X86 (gzip?)

This is currently only enabled with -enable-gep-isel-opt to allow perf testing
tonight.

llvm-svn: 24606
 2005-12-05 07:10:48 +00:00
Chris Lattner
07f4a0cb99 dbg.stoppoint returns a value, don't forget to init it 
llvm-svn: 24583
 2005-12-03 18:50:48 +00:00
Andrew Lenharth
a38ab7b996 bah, must generate all results 
llvm-svn: 24574
 2005-12-02 06:08:08 +00:00
Andrew Lenharth
9662af8cdc cycle counter fix 
llvm-svn: 24573
 2005-12-02 04:56:24 +00:00
Chris Lattner
b5cc216fad Don't remove two operand, two result nodes from the binary ops map. These 
should come from the arbitrary ops map.

This fixes Regression/CodeGen/PowerPC/2005-12-01-Crash.ll

llvm-svn: 24571
 2005-12-01 23:14:50 +00:00
Chris Lattner
29f6c8928b Promote line and column number information for our friendly 64-bit targets. 
llvm-svn: 24568
 2005-12-01 18:21:35 +00:00
Chris Lattner
282123f7fc This is a bugfix for SelectNodeTo. In certain situations, we could be 
selecting a node and use a mix of getTargetNode() and SelectNodeTo.  Because
SelectNodeTo didn't check the CSE maps for a preexisting node and didn't insert
its result into the CSE maps, we would sometimes miss a CSE opportunity.

This is extremely rare, but worth fixing for completeness.

llvm-svn: 24565
 2005-12-01 18:00:57 +00:00
Nate Begeman
811a41a87c Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Chris Lattner
7bed501258 Make SelectNodeTo return N 
llvm-svn: 24548
 2005-11-30 22:45:14 +00:00
Chris Lattner
5af54cb0fe CALLSEQ_START/END nodes don't get memoized, do not add them in when 
replaceAllUses'ing.

llvm-svn: 24539
 2005-11-30 18:20:52 +00:00
Andrew Lenharth
3836ea30ac At long last, you can say that f32 isn't supported for setcc 
llvm-svn: 24537
 2005-11-30 17:12:26 +00:00
Nate Begeman
31121419c8 First chunk of actually generating vector code for packed types. These 
changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}

llvm-svn: 24534
 2005-11-30 08:22:07 +00:00
Andrew Lenharth
e14b9bfddf add support for custom lowering SINT_TO_FP 
llvm-svn: 24531
 2005-11-30 06:43:03 +00:00
Reid Spencer
3bac59d2f0 Fix a problem with llvm-ranlib that (on some platforms) caused the archive 
file to become corrupted due to interactions between mmap'd memory segments
and file descriptors closing. The problem is completely avoiding by using
a third temporary file.

Patch provided by Evan Jones

llvm-svn: 24527
 2005-11-30 05:21:10 +00:00
Evan Cheng
08ab45044b Fixed a bug introduced by my last commit: TargetGlobalValues should key on 
GlobalValue * and index pair. Update getGlobalAddress() for symmetry.

llvm-svn: 24524
 2005-11-30 02:49:21 +00:00
Evan Cheng
025dab1137 Added an index field to GlobalAddressSDNode so it can represent X+12, etc. 
llvm-svn: 24523
 2005-11-30 02:04:11 +00:00
Chris Lattner
22327b9d12 Add support for a new STRING and LOCATION node for line number support, patch 
contributed by Daniel Berlin, with a few cleanups here and there by me.

llvm-svn: 24515
 2005-11-29 06:21:05 +00:00
Nate Begeman
a1c2df2471 Add the majority of the vector machien value types we expect to support, 
and make a few changes to the legalization machinery to support more than
16 types.

llvm-svn: 24511
 2005-11-29 05:45:29 +00:00
Nate Begeman
a90bb6d9b1 Check in code to scalarize arbitrarily wide packed types for some simple 
vector operations (load, add, sub, mul).

This allows us to codegen:
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

on ppc as:
_foo:
        lfs f0, 12(r3)
        lfs f1, 8(r3)
        lfs f2, 4(r3)
        lfs f3, 0(r3)
        fadds f0, f0, f0
        fadds f1, f1, f1
        fadds f2, f2, f2
        fadds f3, f3, f3
        stfs f0, 12(r3)
        stfs f1, 8(r3)
        stfs f2, 4(r3)
        stfs f3, 0(r3)
        blr

llvm-svn: 24484
 2005-11-22 18:16:00 +00:00
Nate Begeman
d2f6fcf327 Rather than attempting to legalize 1 x float, make sure the SD ISel never 
generates it.  Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.

The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.

llvm-svn: 24482
 2005-11-22 01:29:36 +00:00
Chris Lattner
bc0a6be68a Legalize MERGE_VALUES, expand READCYCLECOUNTER correctly, so it doesn't 
break control dependence.

llvm-svn: 24437
 2005-11-20 22:56:56 +00:00
Andrew Lenharth
b44263313a The first patch of X86 support for read cycle counter 
llvm-svn: 24429
 2005-11-20 21:32:07 +00:00
Chris Lattner
c830542c70 more progress towards bug 291 being finished. Patch by Owen Anderson, 
HAVE_GV case fixed up by me.

llvm-svn: 24428
 2005-11-20 03:45:52 +00:00
Chris Lattner
517942843d Unbreak codegen of bools. This should fix the llc/jit/llc-beta failures 
from last night.

llvm-svn: 24427
 2005-11-19 18:40:42 +00:00
Chris Lattner
fc1975aa3b Improve Selection DAG printer portability. Patch by Owen Anderson! 
llvm-svn: 24425
 2005-11-19 07:44:09 +00:00
Chris Lattner
72dc36da76 Teach the graph viewer to handle register operands that are zero. 
llvm-svn: 24421
 2005-11-19 06:58:46 +00:00
Chris Lattner
3a1a1557e1 Silence a bogus warning 
llvm-svn: 24420
 2005-11-19 05:51:46 +00:00
Chris Lattner
89056c7145 Add some method variants, patch by Evan Cheng 
llvm-svn: 24418
 2005-11-19 01:44:53 +00:00
Nate Begeman
7d513f65ae Teach LLVM how to scalarize packed types. Currently, this only works on 
packed types with an element count of 1, although more generic support is
coming.  This allows LLVM to turn the following code:

void %foo(<1 x float> * %a) {
entry:
  %tmp1 = load <1 x float> * %a;
  %tmp2 = add <1 x float> %tmp1, %tmp1
  store <1 x float> %tmp2, <1 x float> *%a
  ret void
}

Into:

_foo:
        lfs f0, 0(r3)
        fadds f0, f0, f0
        stfs f0, 0(r3)
        blr

llvm-svn: 24416
 2005-11-19 00:36:38 +00:00