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Commit Graph

8091 Commits

Author SHA1 Message Date
Craig Topper
231243e781 Use uint8_t instead of enums to store values in X86 disassembler table. Shaves 150k off the size of X86DisassemblerDecoder.o
llvm-svn: 151995
2012-03-04 02:16:41 +00:00
Chad Rosier
c6fad847e9 Prevent obscure and incorrect tail-call optimization.
In this instance we are generating the tail-call during legalizeDAG.  The 2nd
floor call can't be a tail call because it clobbers %xmm1, which is defined by
the first floor call.  The first floor call can't be a tail-call because it's
not in the tail position.  The only reasonable way I could think to fix this
in a target-independent manner was to check for glue logic on the copy reg.

rdar://10930395

llvm-svn: 151877
2012-03-02 02:50:46 +00:00
Michael J. Spencer
0eb4a851f6 Minimal changes for LLVM to compile under VS11.
llvm-svn: 151849
2012-03-01 22:42:52 +00:00
Kevin Enderby
46c639cf8a Added annotations for x86 pc relative loads to llvm's 'C' disassembler.
So with darwin's otool(1) an x86_64 hello world .o file will print:
leaq	L_.str(%rip), %rax ## literal pool for: Hello world

llvm-svn: 151769
2012-02-29 22:58:34 +00:00
Andrew Trick
cf63a3d03a Intel Atom instruction itineraries for mov sign extension and mov zero extension.
Patch by Tyler Nowicki!

llvm-svn: 151743
2012-02-29 19:44:41 +00:00
Derek Schuff
db82ff1e09 Make MemoryObject accessor members const again
llvm-svn: 151687
2012-02-29 01:09:06 +00:00
Evan Cheng
c5ead6c49e Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call.
llvm-svn: 151645
2012-02-28 18:51:51 +00:00
Daniel Dunbar
b448d31a6b Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part.
llvm-svn: 151630
2012-02-28 15:36:07 +00:00
Evan Cheng
d29a22e4b0 Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.

Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.

rdar://8979299

llvm-svn: 151623
2012-02-28 06:42:03 +00:00
Preston Gurd
e0609ed607 This patch adds instruction latencies for the SSE instructions
to the instruction scheduler for the Intel Atom.

llvm-svn: 151590
2012-02-27 23:35:03 +00:00
Chad Rosier
ff495392fa Add q suffix aliases for the fistp and fisttp mnemonics.
rdar://10921670
PR11935

llvm-svn: 151543
2012-02-27 19:43:12 +00:00
Craig Topper
ab46706aa9 X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo.
llvm-svn: 151510
2012-02-27 01:54:29 +00:00
NAKAMURA Takumi
17b6271b41 Target/X86: Fix assertion failures and warnings caused by r151382 _ftol2 lowering for i386-*-win32 targets. Patch by Joe Groff.
[Joe Groff] Hi everyone. My previous patch applied as r151382 had a few problems:
Clang raised a warning, and X86 LowerOperation would assert out for
fptoui f64 to i32 because it improperly lowered to an illegal
BUILD_PAIR. Here's a patch that addresses these issues. Let me know if
any other changes are necessary. Thanks.

llvm-svn: 151432
2012-02-25 03:37:25 +00:00
Michael J. Spencer
d2f0ce2674 Add WIN_FTOL_* psudo-instructions to model the unique calling convention
used by the Win32 _ftol2 runtime function. Patch by Joe Groff!

llvm-svn: 151382
2012-02-24 19:01:22 +00:00
Pete Cooper
135769381b Turn avx insert intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove duplicate patterns for selecting the intrinsics
llvm-svn: 151342
2012-02-24 03:51:49 +00:00
Kevin Enderby
4e089c2b5b Updated the llvm-mc disassembler C API to support for the X86 target.
rdar://10873652

As part of this I updated the llvm-mc disassembler C API to always call the
SymbolLookUp call back even if there is no getOpInfo call back.  If there is a
getOpInfo call back that is tried first and then if that gets no information
then the  SymbolLookUp is called.  I also made the code more robust by
memset(3)'ing to zero the LLVMOpInfo1 struct before then setting
SymbolicOp.Value before for the call to getOpInfo.  And also don't use any
values from the  LLVMOpInfo1 struct if getOpInfo returns 0.  And also don't
use any of the ReferenceType or ReferenceName values from SymbolLookUp if it
returns NULL. rdar://10873563 and rdar://10873683

For the X86 target also fixed bugs so the annotations get printed. 

Also fixed a few places in the ARM target that was not producing symbolic
operands for some instructions.  rdar://10878166

llvm-svn: 151267
2012-02-23 18:18:17 +00:00
Michael J. Spencer
24f6d49962 Properly emit _fltused with FastISel. Refactor to share code with SDAG.
Patch by Joe Groff!

llvm-svn: 151183
2012-02-22 19:06:13 +00:00
Chad Rosier
3703a1917a Remove extra semi-colons.
llvm-svn: 151169
2012-02-22 17:25:00 +00:00
Craig Topper
d8faffd93b Declare register classes as const. Fix a couple pointers to register classes that weren't already const.
llvm-svn: 151138
2012-02-22 07:28:11 +00:00
Craig Topper
3ed929de0a Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified.
llvm-svn: 151134
2012-02-22 05:59:10 +00:00
Aaron Ballman
a76a5b7265 Adding support for Microsoft's thiscall calling convention. LLVM side of the patch.
llvm-svn: 151123
2012-02-22 03:04:40 +00:00
Ahmed Charles
745c53c2a7 Remove dead code. Improve llvm_unreachable text. Simplify some control flow.
llvm-svn: 150918
2012-02-19 11:37:01 +00:00
Craig Topper
da569ead22 Remove some unneeded includes and fix ordering in X86ISelLowering.cpp. Remove unneeded 'using namespace'.
llvm-svn: 150916
2012-02-19 07:15:48 +00:00
Craig Topper
c35afe3434 Unify all shuffle mask checking functions take a mask and VT instead of VectorShuffleSDNode.
llvm-svn: 150913
2012-02-19 05:41:45 +00:00
Craig Topper
7582570aff Make a bunch of X86ISelLowering shuffle functions static now that they are no longer needed by isel.
llvm-svn: 150908
2012-02-19 02:53:47 +00:00
Jia Liu
6bb2f0f0e4 some comment fix for X86 and ARM
llvm-svn: 150902
2012-02-19 02:03:36 +00:00
Craig Topper
cfbfa3dcd1 Add vmfunc instruction to X86 assembler and disassembler.
llvm-svn: 150899
2012-02-19 01:39:49 +00:00
Jia Liu
b077b6085d Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
llvm-svn: 150878
2012-02-18 12:03:15 +00:00
Craig Topper
e42fa08789 Add X86InstrSVM.td that I forgot to add in r150873.
llvm-svn: 150874
2012-02-18 08:34:12 +00:00
Craig Topper
ecf21d8132 Add X86 assembler and disassembler support for AMD SVM instructions. Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication.
llvm-svn: 150873
2012-02-18 08:19:49 +00:00
Craig Topper
a25b84d986 Remove the last of the old vector_shuffle patterns from X86 isel.
llvm-svn: 150795
2012-02-17 07:02:34 +00:00
Jakob Stoklund Olesen
028db3e0e3 Remove the YMM_HI_6_15 hack.
Call clobbers are now represented with register mask operands.  The
regmask can easily represent the fact that xmm6 is call-preserved while
ymm6 isn't.  This is automatically computed by TableGen from the
CalleeSavedRegs containing xmm6.

llvm-svn: 150709
2012-02-16 17:56:06 +00:00
Jakob Stoklund Olesen
b498ebe5b7 Use the same CALL instructions for Windows as for everything else.
The different calling conventions and call-preserved registers are
represented with regmask operands that are added dynamically.

llvm-svn: 150708
2012-02-16 17:56:02 +00:00
Jakob Stoklund Olesen
278e98bcc9 Enable register mask operands for x86 calls.
Call instructions no longer have a list of 43 call-clobbered registers.
Instead, they get a single register mask operand with a bit vector of
call-preserved registers.

This saves a lot of memory, 42 x 32 bytes = 1344 bytes per call
instruction, and it speeds up building call instructions because those
43 imp-def operands no longer need to be added to use-def lists. (And
removed and shifted and re-added for every explicit call operand).

Passes like LiveVariables, LiveIntervals, RAGreedy, PEI, and
BranchFolding are significantly faster because they can deal with call
clobbers in bulk.

Overall, clang -O2 is between 0% and 8% faster, uniformly distributed
depending on call density in the compiled code.  Debug builds using
clang -O0 are 0% - 3% faster.

I have verified that this patch doesn't change the assembly generated
for the LLVM nightly test suite when building with -disable-copyprop
and -disable-branch-fold.

Branch folding behaves slightly differently in a few cases because call
instructions have different hash values now.

Copy propagation flushes its data structures when it crosses a register
mask operand. This causes it to leave a few dead copies behind, on the
order of 20 instruction across the entire nightly test suite, including
SPEC. Fixing this properly would require the pass to use different data
structures.

llvm-svn: 150638
2012-02-16 00:02:50 +00:00
Chad Rosier
889c968001 Use a temporary variable, rather then a series of redundant calls.
llvm-svn: 150538
2012-02-15 00:36:26 +00:00
Pete Cooper
21409dd760 Stop custom lowering forr x86 DEC64m from happening if the load in the lowered sequence has more than 1 user
llvm-svn: 150537
2012-02-15 00:33:37 +00:00
Craig Topper
a754fb54b1 Move old movl vector_shuffle patterns. Not needed anymore since vector_shuffles shouldn't reach isel.
llvm-svn: 150462
2012-02-14 08:14:53 +00:00
Craig Topper
f70ffc68b2 Still more vector_shuffle pattern removal.
llvm-svn: 150365
2012-02-13 07:23:41 +00:00
Ahmed Charles
bf926759cc Fix various issues (or do cleanups) found by enabling certain MSVC warnings.
- Use unsigned literals when the desired result is unsigned. This mostly allows unsigned/signed mismatch warnings to be less noisy even if they aren't on by default.
- Remove misplaced llvm_unreachable.
- Add static to a declaration of a function on MSVC x86 only.
- Change some instances of calling a static function through a variable to simply calling that function while removing the unused variable.

llvm-svn: 150364
2012-02-13 06:30:56 +00:00
Craig Topper
3073033e59 Remove more vector_shuffle patterns for unpack. These should be target specific nodes when they get to isel.
llvm-svn: 150363
2012-02-13 05:48:49 +00:00
Craig Topper
5cb2de69d8 Recommit r150328. Previous test failures should be fixed by r150360.
llvm-svn: 150362
2012-02-13 05:10:10 +00:00
Craig Topper
250c8fb194 Update CanXFormVExtractWithShuffleIntoLoad to ensure bitcasts of loads only have one use. Matches DAGCombiner and prevents vector_shuffles from reaching isel.
llvm-svn: 150360
2012-02-13 04:30:38 +00:00
NAKAMURA Takumi
50b0952aa9 Revert r150328, "Remove more vector_shuffle patterns."
It caused 3 failures on pre-penryn and non-x86(generic) hosts.

llvm-svn: 150357
2012-02-13 00:10:15 +00:00
Pete Cooper
b1229a8866 Fixed bug when custom lowering DEC64m on x86.
If the DEC node had more than one user, it was doing this lowering but
leaving the original DEC node around and so decrementing twice.

Fixes PR11964.

llvm-svn: 150356
2012-02-13 00:10:03 +00:00
Craig Topper
76547b82f2 Remove more vector_shuffle patterns.
llvm-svn: 150328
2012-02-12 08:14:35 +00:00
Craig Topper
96a1a31c5c Remove more vector_shuffle patterns.
llvm-svn: 150321
2012-02-12 01:07:34 +00:00
Craig Topper
7c85e63244 Remove more vector_shuffle patterns.
llvm-svn: 150314
2012-02-11 23:31:01 +00:00
Anton Korobeynikov
5996573d4b Add support for implicit TLS model used with MS VC runtime.
Patch by Kai Nacke!

llvm-svn: 150307
2012-02-11 17:26:53 +00:00
Benjamin Kramer
9a10a94e1a Don't mix declarations and code.
llvm-svn: 150305
2012-02-11 16:01:02 +00:00
Benjamin Kramer
44e872829d Make the EDis tables const.
llvm-svn: 150304
2012-02-11 14:51:07 +00:00