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231a9466df
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1183 Commits

Author SHA1 Message Date
Chris Lattner
231a9466df Fix a bug where the x86 backend would reject 64-bit r constraints when 
in 32-bit mode instead of assigning a register pair.  This has nothing to
do with PR2356, but I happened to notice it while working on it.

llvm-svn: 57704
 2008-10-17 17:59:52 +00:00
Chris Lattner
e2342cd790 Fix PR2356 on PowerPC: if we have an input and output that are tied together 
that have different sizes (e.g. i32 and i64) make sure to reserve registers for
the bigger operand.

llvm-svn: 57699
 2008-10-17 17:52:49 +00:00
Chris Lattner
d7b9ca9f8a remove an xfailed test. 
llvm-svn: 57695
 2008-10-17 17:26:48 +00:00
Chris Lattner
9876270b99 remove this test: it is xfailed anyway, and is failing for a reason 
other than why it was xfailed.

llvm-svn: 57694
 2008-10-17 17:26:19 +00:00
Evan Cheng
5fe2abfee8 Fix a very subtle spiller bug: UpdateKills should not forget to track defs of aliases. 
llvm-svn: 57673
 2008-10-17 06:16:07 +00:00
Dan Gohman
268cfea6bc Fun x86 encoding tricks: when adding an immediate value of 128, 
use a SUB instruction instead of an ADD, because -128 can be
encoded in an 8-bit signed immediate field, while +128 can't be.
This avoids the need for a 32-bit immediate field in this case.

A similar optimization applies to 64-bit adds with 0x80000000,
with the 32-bit signed immediate field.

To support this, teach tablegen how to handle 64-bit constants.

llvm-svn: 57663
 2008-10-17 01:33:43 +00:00
Dan Gohman
5d83bd89a5 Define patterns for shld and shrd that match immediate 
shift counts, and patterns that match dynamic shift counts
when the subtract is obscured by a truncate node.

Add DAGCombiner support for recognizing rotate patterns
when the shift counts are defined by truncate nodes.

Fix and simplify the code for commuting shld and shrd
instructions to work even when the given instruction doesn't
have a parent, and when the caller needs a new instruction.

These changes allow LLVM to use the shld, shrd, rol, and ror
instructions on x86 to replace equivalent code using two
shifts and an or in many more cases.

llvm-svn: 57662
 2008-10-17 01:23:35 +00:00
Dan Gohman
5a693288f6 Fix this test so it actually runs the grep lines. 
llvm-svn: 57653
 2008-10-16 23:57:54 +00:00
Duncan Sands
10e931facf Testcase for PR2762. 
llvm-svn: 57633
 2008-10-16 08:56:46 +00:00
Bill Wendling
8d26b9c07a Testcase for PR1638. 
llvm-svn: 57590
 2008-10-15 18:27:15 +00:00
Evan Cheng
cb8b4e9dd4 - Add target lowering hooks that specify which setcc conditions are illegal, 
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.

llvm-svn: 57542
 2008-10-15 02:05:31 +00:00
Dan Gohman
e08e0dcfcc When doing the very-late shift-and address-mode optimization, 
create a new DAG node to represent the new shift to keep the
DAG consistent, even though it'll almost always be folded into
the address.

If a user of the resulting address has multiple uses, the
nodes may get revisited by a later MatchAddress call, in which
case DAG inconsistencies do matter.

This fixes PR2849.

llvm-svn: 57465
 2008-10-13 20:52:04 +00:00
Evan Cheng
de99d94c58 FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington. 
llvm-svn: 57460
 2008-10-13 18:46:18 +00:00
Evan Cheng
731f400eac Also update sub-register intervals after a trivial computation is rematt'ed for a copy instruction. PR2775. 
llvm-svn: 57458
 2008-10-13 18:35:52 +00:00
Evan Cheng
023b124109 Add a test case for _Complex passed as a FCA. 
llvm-svn: 57456
 2008-10-13 18:13:07 +00:00
Chris Lattner
7910d59d44 Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as 
parameters instead of raw Constants.  This prevents the constants from
being selected by the isel pass, fixing PR2735.

llvm-svn: 57385
 2008-10-11 22:08:30 +00:00
Anton Korobeynikov
72e9aa27f0 Add testcase for 'r' inline asm operand 
llvm-svn: 57361
 2008-10-10 20:28:59 +00:00
Anton Korobeynikov
3f74df506c This does not fail anymore 
llvm-svn: 57360
 2008-10-10 20:28:32 +00:00
Anton Korobeynikov
40b8d5fc4d Add sparc test for memory operand used in inline asm 
llvm-svn: 57348
 2008-10-10 10:15:33 +00:00
Anton Korobeynikov
1134867d55 This is not failing anymore 
llvm-svn: 57347
 2008-10-10 10:15:18 +00:00
Chris Lattner
284ae75537 get CodeGen/Alpha/mul128.ll to work. 
llvm-svn: 57318
 2008-10-09 04:50:56 +00:00
Dan Gohman
08e60cee90 Remove -disable-fast-isel. Use cl::boolOrDefault with -fast-isel 
instead.

So now: -fast-isel or -fast-isel=true enable fast-isel, and
-fast-isel=false disables it. Fast-isel is also on by default
with -fast, and off by default otherwise.

llvm-svn: 57270
 2008-10-07 23:00:56 +00:00
Dan Gohman
bc47391399 Add a testcase for i256 add. i256 isn't fully supported in 
codegen right now, but add and subtract work.

llvm-svn: 57260
 2008-10-07 20:39:12 +00:00
Andrew Lenharth
dccb47de69 128 mul test, xfailed 
llvm-svn: 57250
 2008-10-07 17:13:32 +00:00
Anders Carlsson
a9c42526f8 Certain patterns involving the "movss" instruction were marked as requiring SSE2, when in reality movss is an SSE1 instruction. 
llvm-svn: 57246
 2008-10-07 16:14:11 +00:00
Andrew Lenharth
c00c2a0058 Expand arith on machines without carry flags 
llvm-svn: 57243
 2008-10-07 14:15:42 +00:00
Chris Lattner
75c684100c no need to write the output to the disk 
llvm-svn: 57232
 2008-10-07 04:06:55 +00:00
Andrew Lenharth
99c106c2a2 Add test case for ADDC ADDE expansion 
llvm-svn: 57228
 2008-10-07 02:30:13 +00:00
Dale Johannesen
40d00c0979 Be more precise about which conversions of NaNs 
are Inexact.  (These are not Inexact as defined
by IEEE754, but that seems like a reasonable way
to abstract what happens:  information is lost.)

llvm-svn: 57218
 2008-10-06 22:59:10 +00:00
Evan Cheng
88d76ffe8a Fix PR2850 and PR2863. Only generate movddup for 128-bit SSE vector shuffles. 
llvm-svn: 57210
 2008-10-06 21:13:08 +00:00
Anton Korobeynikov
4cc9051fbb Revert r56675 - it breaks unwinding runtime everywhere. 
llvm-svn: 57048
 2008-10-04 11:09:36 +00:00
Dan Gohman
638a8001c8 Fix a bug in the local allocator's liveness computation where it 
was setting kill flags on tied uses in two-address instructions.
The kill flags were causing the allocator to think it could
allocate the use and its tied def in different registers.

llvm-svn: 57039
 2008-10-04 00:31:14 +00:00
Dale Johannesen
dbd7b1bd33 Handle some 64-bit atomics on x86-32, some of the time. 
llvm-svn: 56963
 2008-10-02 18:53:47 +00:00
Dan Gohman
c48242640d Fix a think-o in isSafeToMove. This fixes it from thinking that 
volatile memory references are safe to move.

llvm-svn: 56948
 2008-10-02 15:04:30 +00:00
Dan Gohman
595edc380a Disable fast-isel for this test, as it doesn't emit the same 
number of instructions.

llvm-svn: 56940
 2008-10-01 23:48:35 +00:00
Devang Patel
a5cda569d3 Remove OptimizeForSize global. Use function attribute optsize. 
llvm-svn: 56937
 2008-10-01 23:18:38 +00:00
Dan Gohman
be88cf29b6 Split this test and move it into target-specific directories. 
This fixes failures on configurations that don't have one or the
other targets enabled.

llvm-svn: 56926
 2008-10-01 19:46:30 +00:00
Dan Gohman
5508abb3bf nounwind-ify this test. 
llvm-svn: 56918
 2008-10-01 15:07:14 +00:00
Bill Wendling
c807050f44 Moved this option to the front-end. 
llvm-svn: 56901
 2008-10-01 01:02:18 +00:00
Dan Gohman
d456cc01eb Use explicit target-triples to unbreak this test on non-darwin systems. 
llvm-svn: 56896
 2008-10-01 00:25:38 +00:00
Bill Wendling
618d422cdd Just don't transform this memset into "bzero" if no-builtin is specified. 
llvm-svn: 56888
 2008-09-30 22:05:33 +00:00
Bill Wendling
86f6fdc7e3 - Initialize "--no-builtin" to "false". 
- Testcase for r56885.

llvm-svn: 56886
 2008-09-30 21:40:30 +00:00
Evan Cheng
1c8ff02eeb Re-apply 56835 along with header file changes. 
llvm-svn: 56848
 2008-09-30 15:44:16 +00:00
Duncan Sands
a2c8482495 Revert commit 56835 since it breaks the build. 
"If a re-materializable instruction has a register
operand, the spiller will change the register operand's
spill weight to HUGE_VAL to avoid it being spilled.
However, if the operand is already in the queue ready
to be spilled, avoid re-materializing it".

llvm-svn: 56837
 2008-09-30 10:00:30 +00:00
Evan Cheng
4eee17f4fb If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. 
llvm-svn: 56835
 2008-09-30 06:36:58 +00:00
Evan Cheng
b749199c34 Fix PR2835. Do not change the width of a volatile load. 
llvm-svn: 56792
 2008-09-29 17:26:18 +00:00
Evan Cheng
28d9b3a8ad Re-apply 56683 with fixes. 
llvm-svn: 56748
 2008-09-27 01:56:22 +00:00
Devang Patel
47a504c87c Implement function notes as function attributes. 
llvm-svn: 56716
 2008-09-26 23:51:19 +00:00
Evan Cheng
d63fc80c1e Implement "punpckldq %xmm0, $xmm0" as "pshufd $0x50, %xmm0, %xmm" unless optimizing for code size. 
llvm-svn: 56711
 2008-09-26 23:41:32 +00:00
Bill Wendling
7273078850 Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc: 
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2  -O2 -g -O2  -DIN_GCC    -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition  -isystem ./include  -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED  -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include  -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...

llvm-svn: 56703
 2008-09-26 22:10:44 +00:00