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Commit Graph

130958 Commits

Author SHA1 Message Date
Amaury Sechet
23403dab1a Capitalize align argument in the C API as per convention. NFC
llvm-svn: 268175
2016-05-01 01:42:34 +00:00
Craig Topper
f3a74291c9 [AVX512] Add hasSideEffects/mayLoad/mayStore flags to some instructions.
llvm-svn: 268174
2016-05-01 01:03:56 +00:00
Lang Hames
c0a21714a1 [ORC] Save AArch64 NEON state in the JIT reentry block.
The earlier version of the resolver code did not save NEON state, so it would
have broken any callees that used floating point.

llvm-svn: 268173
2016-05-01 00:14:45 +00:00
Rui Ueyama
b8083864d1 [lit] Add %:[STpst] to represent paths without colons on Windows.
Summary:
We need these variables to concatenate two absolute paths to construct
a valid path. Currently, %t\%t is, for example, expanded to C:\foo\C:\foo,
which is not a valid path because ":" is not a valid path character
on Windows. With this patch, %t will be expanded to C\foo.

Differential Revision: http://reviews.llvm.org/D19757

llvm-svn: 268168
2016-04-30 21:32:12 +00:00
Simon Pilgrim
599ad3c0a2 [InstCombine][AVX2] Added VPERMD/VPERMPS shuffle combining placeholder tests.
For future support for VPERMD/VPERMPS to generic shuffles combines

llvm-svn: 268166
2016-04-30 20:41:52 +00:00
Saleem Abdulrasool
9ad277b577 CodeGen: convert to range based loops
Convert to using some range based loops, avoid unnecessary variables for
unchecked casts.  NFC.

llvm-svn: 268165
2016-04-30 18:15:34 +00:00
Craig Topper
01735085d2 [X86] Reduce memory usage of MemOp2RegOp and RegOp2MemOp folding maps.
llvm-svn: 268164
2016-04-30 17:59:49 +00:00
Rafael Espindola
634193bb09 Add missing override.
llvm-svn: 268163
2016-04-30 15:18:21 +00:00
Marcin Koscielnicki
8145a126c9 [ASan] Add shadow offset for SystemZ.
SystemZ on Linux currently has 53-bit address space.  In theory, the hardware
could support a full 64-bit address space, but that's not supported due to
kernel limitations (it'd require 5-level page tables), and there are no plans
for that.  The default process layout stays within first 4TB of address space
(to avoid creating 4-level page tables), so any offset >= (1 << 42) is fine.
Let's use 1 << 52 here, ie. exactly half the address space.

I've originally used 7 << 50 (uses top 1/8th of the address space), but ASan
runtime assumes there's some space after the shadow area.  While this is
fixable, it's simpler to avoid the issue entirely.

Also, I've originally wanted to have the shadow aligned to 1/8th the address
space, so that we can use OR like X86 to assemble the offset.  I no longer
think it's a good idea, since using ADD enables us to load the constant just
once and use it with register + register indexed addressing.

Differential Revision: http://reviews.llvm.org/D19650

llvm-svn: 268161
2016-04-30 09:57:34 +00:00
Simon Pilgrim
d377dbc835 [InstCombine][AVX] Split off VPERMILVAR tests and added additional tests for UNDEF mask elements
llvm-svn: 268159
2016-04-30 07:32:19 +00:00
Simon Pilgrim
895490c6cb [InstCombine][AVX] VPERMILVAR to shuffle combine to use general aggregate elements. NFCI.
Make use of Constant::getAggregateElement instead of checking constant types - first step towards adding support for UNDEF mask elements.

llvm-svn: 268158
2016-04-30 07:23:30 +00:00
Sriraman Tallam
ca3f439f16 Differential Revision: http://reviews.llvm.org/D19753
Delete Target Option PositionIndependentExecutable as PIE is now part of module flags.

llvm-svn: 268155
2016-04-30 04:18:52 +00:00
Tom Stellard
6245c9db08 AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits
This was supposed to be part of r268143.

llvm-svn: 268154
2016-04-30 04:04:48 +00:00
Hal Finkel
724aac3fce [PowerPC/QPX] Fix the load/splat peephole with overlapping reads
If, in between the splat and the load (which does an implicit splat), there is
a read of the splat register, then that register must have another earlier
definition. In that case, we can't replace the load's destination register with
the splat's destination register.

Unfortunately, I don't have a small or non-fragile test case.

llvm-svn: 268152
2016-04-30 01:59:28 +00:00
Amjad Aboud
bc689dbffb Reverting 268054 & 268063 as they caused PR27579.
llvm-svn: 268150
2016-04-30 01:44:07 +00:00
Sanjoy Das
0d28098245 [LowerGuardIntrinsics] Keep track of !make.implicit metadata
If a guard call being lowered by LowerGuardIntrinsics has the
`!make.implicit` metadata attached, then reattach the metadata to the
branch in the resulting expanded form of the intrinsic.  This allows us
to implement null checks as guards and still get the benefit of implicit
null checks.

llvm-svn: 268148
2016-04-30 00:55:59 +00:00
Lawrence Hu
840b3f8ac8 Reroll loops with multiple IV and negative step part 3
support multiple induction variables

    This patch enable loop reroll for the following case:
        for(int i=0;  i<N; i += 2) {
           S += *a++;
           S += *a++;
        };

Differential Revision: http://reviews.llvm.org/D16550

llvm-svn: 268147
2016-04-30 00:51:22 +00:00
Lang Hames
a0849b6c3a [Orc] Fix the AArch64 resolver size.
llvm-svn: 268146
2016-04-30 00:50:26 +00:00
Vedant Kumar
0410c940f8 Fix a typo (NFC)
llvm-svn: 268144
2016-04-30 00:32:54 +00:00
Tom Stellard
51b37329c1 AMDGPU/SI: Enable the post-ra scheduler
Summary:
This includes a hazard recognizer implementation to replace some of
the hazard handling we had during frame index elimination.

Reviewers: arsenm

Subscribers: qcolombet, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18602

llvm-svn: 268143
2016-04-30 00:23:06 +00:00
Sanjoy Das
cb22cc23b3 [LowerGuardIntrinsics] Preserve calling conv when lowering
llvm-svn: 268142
2016-04-30 00:17:47 +00:00
Sanjay Patel
0edaaaca54 add minimal test to show dropped metadata
llvm-svn: 268141
2016-04-30 00:12:54 +00:00
Sanjay Patel
4e69043b25 remove the metadata added with r267827
We can demonstrate the 'select' bug and fix with a simpler test case.
The merged weight values are already tested in another test.

llvm-svn: 268139
2016-04-30 00:02:36 +00:00
Xinliang David Li
b61f92d03d Reapply r268107 after fixing a bug breaks debug build.
Makes the new method to set data needed by debug dump.

llvm-svn: 268130
2016-04-29 22:59:36 +00:00
Sanjoy Das
42c6e9b9ce Mark guards on true as "trivially dead"
This moves some logic added to EarlyCSE in rL268120 into
`llvm::isInstructionTriviallyDead`.  Adds a test case for DCE to
demonstrate that passes other than EarlyCSE can now pick up on the new
information.

llvm-svn: 268126
2016-04-29 22:23:16 +00:00
Chris Bieneman
c069fe3e2d [CMake] [Xcode] Improving Xcode toolchain generation to support distribution targets
This adds a new target `install-distribution-toolchain` which will install an Xcode toolchain featuring just the LLVM components specified in LLVM_DISTRIBUTION_COMPONENTS.

llvm-svn: 268125
2016-04-29 22:19:35 +00:00
Sanjay Patel
157f27a672 clean up documentation comments; NFC
llvm-svn: 268122
2016-04-29 22:03:27 +00:00
Haicheng Wu
611abb7dc9 [MBP] Use Function::optForSize() instead of checking OptimizeForSize directly.
Fix a FIXME.  Disable loop alignment if compiled with -Oz now.

llvm-svn: 268121
2016-04-29 22:01:10 +00:00
Sanjoy Das
69de617a5f [EarlyCSE] Simplify guard intrinsics
Summary:
This change teaches EarlyCSE some basic properties of guard intrinsics:

 - Guard intrinsics read all memory, but don't write to any memory
 - After a guard has executed, the condition it was guarding on can be
   assumed to be true
 - Guard intrinsics on a constant `true` are no-ops

Reviewers: reames, hfinkel

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D19578

llvm-svn: 268120
2016-04-29 21:52:58 +00:00
Matt Arsenault
42ea6294ae AMDGPU: Fix crash with unreachable terminators.
If a block has no successors because it ends in unreachable,
this was accessing an invalid iterator.

Also stop counting instructions that don't emit any
real instructions.

llvm-svn: 268119
2016-04-29 21:52:13 +00:00
Xinliang David Li
bdb68630e2 Revert r268107 -- debug build failure
llvm-svn: 268116
2016-04-29 21:43:28 +00:00
Simon Pilgrim
35052f3ec3 [InstCombine][SSE] PSHUFB to shuffle combine to use general aggregate elements. NFCI.
Make use of Constant::getAggregateElement instead of checking constant types - first step towards adding support for UNDEF mask elements.

llvm-svn: 268115
2016-04-29 21:34:54 +00:00
Lang Hames
f0846a4656 [Orc] Add ORC lazy-compilation support for AArch64.
The ORC compile callbacks and indirect stubs APIs will now work for AArc64,
allowing functions to be lazily compiled and/or updated.

llvm-svn: 268112
2016-04-29 21:32:00 +00:00
Lang Hames
990070854d [Orc] Make sure we don't drop the internal error in OrcRemoteTargetClient when
the constructor fails, as this would lead to an 'unchecked error' crash.

llvm-svn: 268111
2016-04-29 21:29:48 +00:00
Chris Bieneman
9c4f3cfc37 [Docs] Refer to the CMakePrimer from CMake doc
The "Building LLVM with CMake" document should have a reference to the CMakePrimer.

llvm-svn: 268109
2016-04-29 21:23:24 +00:00
David Majnemer
2a55d1f576 [ValueTracking] Make the code in lookThroughCast
No functionality change is intended.

llvm-svn: 268108
2016-04-29 21:22:04 +00:00
Xinliang David Li
93a548fe4b [inliner]: Refactor inline deferring logic into its own method /NFC
The implemented heuristic has a large body of code which better sits
in its own function for better readability. It also allows adding more
heuristics easier in the future.

llvm-svn: 268107
2016-04-29 21:21:44 +00:00
Sriraman Tallam
899df7646a Differential Revision: http://reviews.llvm.org/D19733
llvm-svn: 268106
2016-04-29 21:19:16 +00:00
Matt Arsenault
87a15c33eb AMDGPU: Add kernarg.segment.ptr intrinsic
llvm-svn: 268105
2016-04-29 21:16:52 +00:00
Chad Rosier
5fffe70b4f [InstCombine] Determine the result of a select based on a dominating condition.
Differential Revision: http://reviews.llvm.org/D19550

llvm-svn: 268104
2016-04-29 21:12:31 +00:00
Matt Arsenault
6ab768693c Fix comment
llvm-svn: 268102
2016-04-29 21:02:04 +00:00
Sanjay Patel
b2e1fa0e6a [InstCombine] clean up; NFC
llvm-svn: 268099
2016-04-29 20:54:56 +00:00
Chris Bieneman
6fb260949c [Docs] Add CMake Primer document
This document is intended to provide a basic overview of the CMake scripting language for LLVM developers. It was unorthodoxly reviewed for accuracy and content on the CMake developer list:

http://public.kitware.com/pipermail/cmake-developers/2016-April/028300.html

llvm-svn: 268096
2016-04-29 20:34:54 +00:00
Matt Arsenault
4a6478abc5 AMDGPU/SI: Move post regalloc run of SIShrinkInstructions
Move to addPreEmitPass. This is so it runs after post-RA
scheduling so we can merge s_nops emitted by the scheduler
and hazard recognizer.

llvm-svn: 268095
2016-04-29 20:23:42 +00:00
Matt Arsenault
1e65ead116 DAGCombiner: Reduce truncated shl width
llvm-svn: 268094
2016-04-29 19:53:16 +00:00
Kostya Serebryany
d357a30eb0 [libFuzzer] fix docs
llvm-svn: 268092
2016-04-29 19:28:24 +00:00
Easwaran Raman
bf879068e7 Move coverage related code into a separate library.
Differential Revision: http://reviews.llvm.org/D19333

llvm-svn: 268089
2016-04-29 18:53:05 +00:00
Kostya Serebryany
6e5d1a22c3 [libFuzzer] enable detect_leaks=1, add proper docs
llvm-svn: 268088
2016-04-29 18:49:55 +00:00
George Burgess IV
fd2f0313de [MemorySSA] Fix bugs in walker; refactor unittests a bit.
This patch fixes two somewhat related bugs in MemorySSA's caching
walker. These bugs were found because D19695 brought up the problem
that we'd have defs cached to themselves, which is incorrect.

The bugs this fixes are:

- We would sometimes skip the nearest clobber of a MemoryAccess, because
  we would query our cache for a given potential clobber before
  checking if the potential clobber is the clobber we're looking for.
  The cache entry for the potential clobber would point to the nearest
  clobber *of the potential clobber*, so if that was a cache hit, we'd
  ignore the potential clobber entirely.

- There are times (sometimes in DFS, sometimes in the getClobbering...
  functions) where we would insert cache entries that say a def
  clobbers itself.

There's a bit of common code between the fixes for the bugs, so they
aren't split out into multiple commits.

This patch also adds a few unit tests, and refactors existing tests a
bit to reduce the duplication of setup code.

llvm-svn: 268087
2016-04-29 18:42:55 +00:00
David Majnemer
8fe9b6cacf [ValueTracking] matchSelectPattern needs to be more careful around FP
matchSelectPattern attempts to see through casts which mask min/max
patterns from being more obvious.  Under certain circumstances, it would
misidentify a sequence of instructions as a min/max because it assumed
that folding casts would preserve the result.  This is not the case for
floating point <-> integer casts.

This fixes PR27575.

llvm-svn: 268086
2016-04-29 18:40:34 +00:00