use -enable-ia64-dag-isel to turn this on
TODO: delete lowering stuff from the pattern isel
: get operations on predicate bits working
: get other bits of pseudocode going
: use sampo's mulh/mull-using divide-by-constant magic
: *so* many patterns ("extr", "tbit" and "dep" will be fun :)
: add FP
: add a JIT!
: get it working 100%
in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.
OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.
llvm-svn: 24058
to avoid redundant mov out3=r44 type instructions, we need to
tell the register allocator the truth about out? registers.
FIXME: unfortunately, since the list of allocatable registers is immutable,
we can't simply 'delete r127' from the allocation order, say, if 'out0' is
used. The only correct thing we can do is have a linear order of regs:
out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127
and slide a 'window' of 96 registers along this line, depending on how many
of the out? regs a function actually uses. The only downside of this is
that the out? registers will be allocated _first_, which makes the
resulting assembly ugly. :( Note this in the README. Hope this gets fixed
soon. :) (note the 3rd person speech there)
llvm-svn: 21252
* fix overallocation of integer (stacked) registers: we can't allocate
registers for local use if they are required as output registers
this fixes 'toast' in the test suite, and all sorts of larger programs
like bzip2 etc.
llvm-svn: 21178
