Bill Wendling
7cba44defc
Revert r141365. It was causing MultiSource/Benchmarks/MiBench/consumer-lame to
...
hang, and possibly SPEC/CINT2006/464_h264ref.
llvm-svn: 141560
2011-10-10 18:27:30 +00:00
Owen Anderson
40a0b83c92
MCAtom extending methods need to extend the range of the atom as well.
...
llvm-svn: 141557
2011-10-10 18:09:38 +00:00
Bill Wendling
d7cb53193a
Mark the llvm.eh.sjlj.functioncontext intrinsic as reading memory so that fast
...
isel doesn't ignore it.
llvm-svn: 141548
2011-10-10 17:08:47 +00:00
Benjamin Kramer
05836b12fd
llvm-objdump: Take ownership of MCInstrInfos.
...
llvm-svn: 141535
2011-10-10 13:10:09 +00:00
Benjamin Kramer
357893ba6f
llvm-nm: Don't leak bitcode buffers.
...
llvm-svn: 141534
2011-10-10 13:10:04 +00:00
Benjamin Kramer
abcce0b8be
XFAIL tblgen tests on leak checkers.
...
llvm-svn: 141533
2011-10-10 13:09:59 +00:00
Bill Wendling
94258753c7
When getting the number of bits necessary for addressing mode
...
ARMII::AddrModeT1_s, we need to take into account that if the frame register is
ARM::SP, then the number of bits is 8. If it's not ARM::SP, then the number of
bits is 5.
llvm-svn: 141529
2011-10-10 07:24:23 +00:00
Craig Topper
251bbfb1f7
Put a bunch of calls to ToggleFeature behind proper if statements.
...
llvm-svn: 141527
2011-10-10 05:34:02 +00:00
Chad Rosier
2fc181986a
Fix a regression from r138445. If we're loading from the frame/base pointer
...
the tADDrSPi instruction can't be used. Make sure we're updating the opcode
to tADDi3 in all cases.
rdar://10254707
llvm-svn: 141523
2011-10-10 01:03:35 +00:00
Justin Holewinski
ce14c646cd
PTX: Print .ptr kernel attributes if PTX version >= 2.2
...
llvm-svn: 141508
2011-10-09 15:42:02 +00:00
Craig Topper
9b7ab95570
Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disassembler.
...
llvm-svn: 141505
2011-10-09 07:31:39 +00:00
Jakob Stoklund Olesen
d94788edb9
Prevent potential NOREX bug.
...
A GR8_NOREX virtual register is created when extrating a sub_8bit_hi
sub-register:
%vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8_NOREX:%vreg2 %GR64_ABCD:%vreg1
TEST8ri_NOREX %vreg2, 1, %EFLAGS<imp-def>; GR8_NOREX:%vreg2
If such a live range is ever split, its register class must not be
inflated to GR8. The sub-register copy can only target GR8_NOREX.
I dont have a test case for this theoretical bug.
llvm-svn: 141500
2011-10-08 20:20:03 +00:00
Jakob Stoklund Olesen
b49557d06d
Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies.
...
In 64-bit mode, sub_8bit_hi sub-registers can only be used by NOREX
instructions. The COPY created from the EXTRACT_SUBREG DAG node cannot
target all GR8 registers, only those in GR8_NOREX.
TO enforce this, we ensure that all instructions using the
EXTRACT_SUBREG are GR8_NOREX constrained.
This fixes PR11088.
llvm-svn: 141499
2011-10-08 18:28:28 +00:00
Jakob Stoklund Olesen
2817bbdeaf
Add missing test case for r141410.
...
llvm-svn: 141498
2011-10-08 18:06:54 +00:00
Benjamin Kramer
22607ddb94
Include direct.h for _mkdir on mingw32 too.
...
llvm-svn: 141495
2011-10-08 15:49:19 +00:00
Che-Liang Chiou
c1ba72e15c
Revert r141079: tblgen: add preprocessor as a separate mode
...
llvm-svn: 141492
2011-10-08 12:39:26 +00:00
Nicolas Geoffray
8c7ad22407
Always check if a method or a type exist before trying to create it.
...
llvm-svn: 141490
2011-10-08 11:56:36 +00:00
NAKAMURA Takumi
2a3eab692a
lib/Object: Suppress warnings on gcc-4.3.4 cygwin
...
llvm-svn: 141485
2011-10-08 11:22:53 +00:00
NAKAMURA Takumi
cc0706b36c
lib/DebugInfo/DWARFDebugLine.cpp: De-Unicode-ify.
...
llvm-svn: 141484
2011-10-08 11:22:47 +00:00
NAKAMURA Takumi
fe47764929
Whitespace
...
llvm-svn: 141483
2011-10-08 11:22:41 +00:00
Anton Korobeynikov
b0534f0113
Disable ABS optimization for Thumb1 target, we don't have necessary instructions there.
...
llvm-svn: 141481
2011-10-08 08:38:45 +00:00
Akira Hatanaka
4a78bb776f
Simplify definition of FP move instructions.
...
llvm-svn: 141476
2011-10-08 03:50:18 +00:00
Akira Hatanaka
7780dcc74e
Define classes and multiclasses for FP binary instructions.
...
llvm-svn: 141475
2011-10-08 03:38:41 +00:00
Akira Hatanaka
9595e84a11
Define multiclasses for FP-to-FP instructions.
...
llvm-svn: 141474
2011-10-08 03:29:22 +00:00
Akira Hatanaka
e39c39db4a
Define classes for FP unary instructions and multiclasses for FP-to-fixed point
...
conversion instructions.
llvm-svn: 141473
2011-10-08 03:19:38 +00:00
Andrew Trick
9d4d1281ad
Unit test for LSR phi reuse in r141442.
...
llvm-svn: 141472
2011-10-08 02:34:51 +00:00
Akira Hatanaka
38d2ddcfac
Add patterns for unaligned load and store instructions and enable the
...
instruction selector to generate them.
llvm-svn: 141471
2011-10-08 02:24:10 +00:00
Andrew Trick
430029d79a
Add an extra safety check in front of the optimization in r141442.
...
llvm-svn: 141470
2011-10-08 02:16:39 +00:00
Bill Wendling
a2a555b0fc
Use the code that lowers the arguments and spills any values which are alive
...
across unwind edges. This is for the back-end which expects such things.
The code is from the original SjLj EH pass.
llvm-svn: 141463
2011-10-08 00:56:47 +00:00
Peter Collingbourne
da02db0a55
Add clang-tblgen to OPTIONAL_DIRS when building native tools for the
...
cross build, so that a native version of clang-tblgen is available.
Should unbreak Clang cross build.
Also disable Polly for the native tool build, since it depends on
external libraries which may not be available, and it isn't required
anyway.
llvm-svn: 141454
2011-10-08 00:27:38 +00:00
Michael J. Spencer
e497728e76
llvm-objdump: Add relocation and archive support.
...
llvm-svn: 141451
2011-10-08 00:18:30 +00:00
Michael J. Spencer
7a13bd426f
PathV2: Add simplified version of exists that returns false on error.
...
llvm-svn: 141450
2011-10-08 00:18:12 +00:00
Michael J. Spencer
edcc61ba22
Object: Add support for opening stdin.
...
llvm-svn: 141449
2011-10-08 00:17:58 +00:00
Michael J. Spencer
1acd078990
Object: constize Archive.
...
llvm-svn: 141448
2011-10-08 00:17:45 +00:00
Jim Grosbach
6322a90e2d
Enable ARM mode VDUP(scalar) tests.
...
llvm-svn: 141447
2011-10-07 23:57:03 +00:00
Jim Grosbach
94980a23e6
ARM NEON assembly parsing and encoding for VDUP(scalar).
...
llvm-svn: 141446
2011-10-07 23:56:00 +00:00
Andrew Trick
75743b069e
LSR should only reuse phis that match its formula.
...
Fixes rdar://problem/5064068
llvm-svn: 141442
2011-10-07 23:46:21 +00:00
Eli Friedman
433785c651
Fix APInt::operator*= so that it computes the correct result for large integers where there is unsigned overflow. Fix APFloat::toString so that it doesn't depend on the incorrect behavior in common cases (and computes the correct result in some rare cases). Fixes PR11086.
...
llvm-svn: 141441
2011-10-07 23:40:49 +00:00
Nick Lewycky
8b0cf65af7
Don't emit the symbol table entry for the .symtab_shndx section either.
...
llvm-svn: 141440
2011-10-07 23:29:53 +00:00
Nick Lewycky
95b57a67cb
Remove extraneous curlies. No functionality change.
...
llvm-svn: 141439
2011-10-07 23:28:32 +00:00
Jim Grosbach
cb48e1fe60
ARM prefix asmparser operand kind enums for readability.
...
llvm-svn: 141438
2011-10-07 23:24:09 +00:00
Bill Wendling
a95511a253
Take all of the invoke basic blocks and make the dispatch basic block their new
...
successor. Remove the old landing pad from their successor list, because it's
now the successor of the dispatch block. Now that the landing pad blocks are no
longer the destination of invokes, we can mark them as normal basic blocks
instead of landing pads.
This more closely resembles what the CFG is actually doing.
llvm-svn: 141436
2011-10-07 23:18:02 +00:00
Bill Wendling
b52a154112
Add a bool value to set the IsLandingPad flag to.
...
llvm-svn: 141435
2011-10-07 23:06:01 +00:00
Bill Wendling
1f7c16c63f
Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emit
...
it with the new SjLj emitter stuff. This way there's no need to emit that
kind-of-hacky intrinsic.
llvm-svn: 141419
2011-10-07 22:08:37 +00:00
Bill Wendling
0f5b533c48
Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented to
...
do. This will be useful later on with the new SJLJ stuff.
llvm-svn: 141416
2011-10-07 21:25:38 +00:00
Nick Lewycky
fe793806e9
Don't emit a shstrtabindex in the reserved range. Spotted by inspection and
...
patch by Cary Coutant!
llvm-svn: 141413
2011-10-07 20:58:24 +00:00
Nick Lewycky
112a7ae899
Clarify/fix typo. No functionality change.
...
llvm-svn: 141412
2011-10-07 20:56:23 +00:00
Jakob Stoklund Olesen
78d177b5ce
Constrain both operands on MOVZX32_NOREXrr8.
...
This instruction is explicitly encoded without an REX prefix, so both
operands but be *_NOREX.
Also add an assertion to copyPhysReg() that fires when the MOV8rr_NOREX
constraints are not satisfied.
This fixes a miscompilation in 20040709-2 in the gcc test suite.
llvm-svn: 141410
2011-10-07 20:15:54 +00:00
Michael J. Spencer
7037dc0b45
Fix a few changes I missed.
...
llvm-svn: 141392
2011-10-07 19:52:41 +00:00
Michael J. Spencer
3cc26e4c5e
Fix GCC again.
...
llvm-svn: 141389
2011-10-07 19:46:12 +00:00