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Commit Graph

144749 Commits

Author SHA1 Message Date
Craig Topper
261a1c23e2 [AVX-512] Add various EVEX move instructions to load folding tables using the VEX equivalents as a guide.
llvm-svn: 294908
2017-02-12 18:47:46 +00:00
Craig Topper
25bd077971 [AVX-512] Add VMOV64toSDZrm CodeGenOnly instruction based on the same instruction from AVX/SSE.
I can't prove that we can select this instruction or the AVX/SSE version, but I'm adding it for consistency for now so I can continue matching the load folding tables.

llvm-svn: 294907
2017-02-12 18:47:44 +00:00
Craig Topper
27273fc1b5 [X86] Fix a couple instruction names to use 'mr' instead of 'rm' to indicate they are stores. AVX-512 version was already named with 'mr'.
llvm-svn: 294906
2017-02-12 18:47:40 +00:00
Craig Topper
bc42abedf7 [AVX-512] Add VPEXTRD/Q to load folding tables.
llvm-svn: 294905
2017-02-12 18:47:37 +00:00
Simon Pilgrim
736babe4ba [X86][SSE] Update argument names to match function name. NFCI.
The target shuffle match function arguments were using the term 'Ops' but the function names referred to them as 'Inputs' - use 'Inputs' consistently.

llvm-svn: 294900
2017-02-12 16:46:41 +00:00
Sanjay Patel
f715ddeaff [InstCombine] fold icmp sgt/slt (add nsw X, C2), C --> icmp sgt/slt X, (C - C2)
I found one special case of this transform for 'slt 0', so I removed that and added the general transform.

Alive code to check correctness:

Name: slt_no_overflow
Pre: WillNotOverflowSignedSub(C1, C2)
%a = add nsw i8 %x, C2
%b = icmp slt %a, C1
  =>
%b = icmp slt %x, C1 - C2

Name: sgt_no_overflow
Pre: WillNotOverflowSignedSub(C1, C2)
%a = add nsw i8 %x, C2
%b = icmp sgt %a, C1
  =>
%b = icmp sgt %x, C1 - C2

http://rise4fun.com/Alive/MH

Differential Revision: https://reviews.llvm.org/D29774

llvm-svn: 294898
2017-02-12 16:40:30 +00:00
Sanjay Patel
8e7e7e2058 [ValueTracking] use nonnull argument attribute to eliminate null checks
Enhancing value tracking's analysis of null-ness was suggested in D27855, so here's a first attempt at that.

This is part of solving:
https://llvm.org/bugs/show_bug.cgi?id=28430

Differential Revision: https://reviews.llvm.org/D28204

llvm-svn: 294897
2017-02-12 15:35:34 +00:00
Simon Pilgrim
46d29d9fda [X86][AVX2] Add support for combining target shuffles to VPMOVZX
Initial 256-bit vector support - 512-bit support requires extra checks for AVX512BW support (PMOVZXBW) that will be handled in a future patch.

llvm-svn: 294896
2017-02-12 14:31:23 +00:00
NAKAMURA Takumi
30d1251707 AMDGPU::expandMemIntrinsicUses(): Fix an uninitialized variable. This function returned true or undef.
llvm-svn: 294895
2017-02-12 13:15:31 +00:00
Dorit Nuzman
15c8d7c6d1 [LV/LoopAccess] Check statically if an unknown dependence distance can be
proven larger than the loop-count

This fixes PR31098: Try to resolve statically data-dependences whose
compile-time-unknown distance can be proven larger than the loop-count, 
instead of resorting to runtime dependence checking (which are not always 
possible).

For vectorization it is sufficient to prove that the dependence distance 
is >= VF; But in some cases we can prune unknown dependence distances early,
and even before selecting the VF, and without a runtime test, by comparing 
the distance against the loop iteration count. Since the vectorized code 
will be executed only if LoopCount >= VF, proving distance >= LoopCount 
also guarantees that distance >= VF. This check is also equivalent to the 
Strong SIV Test.

Reviewers: mkuper, anemet, sanjoy

Differential Revision: https://reviews.llvm.org/D28044

llvm-svn: 294892
2017-02-12 09:32:53 +00:00
Elena Demikhovsky
83c9f4e66a AVX-512: Fixed DWARF register numbers for XMM16-31
The reference is here: 
https://software.intel.com/sites/default/files/article/402129/mpx-linux64-abi.pdf

llvm-svn: 294890
2017-02-12 07:56:50 +00:00
Davide Italiano
9fe156205b [LTO] Remove useless redirection from test. NFCI.
llvm-svn: 294889
2017-02-12 05:43:25 +00:00
Chandler Carruth
70638c0ebd [PM] Add devirtualization-based iteration utility into the new PM's
default pipeline.

A clang with this patch built with ASan and asserts can build all of the
test-suite as well, so it seems to not uncover any latent problems.

Differential Revision: https://reviews.llvm.org/D29853

llvm-svn: 294888
2017-02-12 05:38:04 +00:00
Chandler Carruth
7890dbd866 [PM] Enable GlobalsAA in the new PM's pipeline by default.
All the invalidation issues and bugs in this seem to be fixed, it has
survived a full build of the test suite plus SPEC with asserts and ASan
enabled on the Clang binary used.

Differential Revision: https://reviews.llvm.org/D29815

llvm-svn: 294887
2017-02-12 05:34:04 +00:00
Davide Italiano
929e2c167e [lib/LTO] Add support for hotness optremarks in the new API.
llvm-svn: 294885
2017-02-12 05:05:35 +00:00
Davide Italiano
b99758b272 [LTO] Simplify this test quite a bit, @func2 is unused/unneeded.
llvm-svn: 294884
2017-02-12 03:47:54 +00:00
Davide Italiano
4e84a97600 [llvm-lto2] Fix typo in error message.
llvm-svn: 294883
2017-02-12 03:42:09 +00:00
Davide Italiano
9f5a87c088 [lib/LTO] Initial support for optimization remarks in the new API.
llvm-svn: 294882
2017-02-12 03:31:30 +00:00
NAKAMURA Takumi
fb8f42dff7 Kaleidoscope-Ch7: Add TranformUtils for llvm::createPromoteMemoryToRegisterPass() added in r294870.
llvm-svn: 294881
2017-02-12 01:18:32 +00:00
Craig Topper
c0ef5d0efb [X86] Update test case I missed in r294876.
llvm-svn: 294878
2017-02-11 23:23:11 +00:00
Craig Topper
3259faf75d [X86] Move code for using blendi for insert_subvector out to an isel pattern. This gives the DAG combiner more opportunity to optimize without needing to dig through the blend.
llvm-svn: 294876
2017-02-11 22:57:12 +00:00
Craig Topper
c3fd393098 [DAGCombiner] Make the combine of INSERT_SUBVECTOR into a CONCAT_VECTOR more generic to support larger concats.
llvm-svn: 294875
2017-02-11 22:57:09 +00:00
Simon Pilgrim
7a34d271a8 [X86][SSE] Use VSEXT/VZEXT constant folding for SIGN_EXTEND_VECTOR_INREG/ZERO_EXTEND_VECTOR_INREG
Preparatory step for PR31712

llvm-svn: 294874
2017-02-11 22:47:06 +00:00
Simon Pilgrim
a38c358870 [X86][SSE] Improve VSEXT/VZEXT constant folding.
Generalize VSEXT/VZEXT constant folding to work with any target constant bits source not just BUILD_VECTOR .

llvm-svn: 294873
2017-02-11 21:55:24 +00:00
Mehdi Amini
5a2632da06 Update Kaleidoscope tutorial and improve Windows support
Many quoted code blocks were not in sync with the actual toy.cpp
files. Improve tutorial text slightly in several places.
Added some step descriptions crucial to avoid crashes (like
InitializeNativeTarget* calls).
Solve/workaround problems with Windows (JIT'ed method not found, using
custom and standard library functions from host process).

Patch by: Moritz Kroll <moritz.kroll@gmx.de>

Differential Revision: https://reviews.llvm.org/D29864

llvm-svn: 294870
2017-02-11 21:26:52 +00:00
Amaury Sechet
8c421ea2b9 Fix atomic-minmax-i6432.ll .
llvm-svn: 294867
2017-02-11 19:34:11 +00:00
Amaury Sechet
e5fccd2916 Regen expected tests result. NFC
llvm-svn: 294866
2017-02-11 19:27:15 +00:00
Aaron Ballman
ae179535c0 Correcting several sphinx errors; should fix the LLVM documentation build.
llvm-svn: 294865
2017-02-11 18:45:24 +00:00
Simon Pilgrim
ff8bac19ca [X86][SSE] Add early-out when trying to match blend shuffle. NFCI.
llvm-svn: 294864
2017-02-11 18:06:24 +00:00
Sanjay Patel
286263086f [TargetLowering] check for sign-bit comparisons in SimplifyDemandedBits
I don't know if anything other than x86 vectors is affected by this change, but this may allow 
us to remove target-specific intrinsics for blendv* (vector selects). The simplification arises
from the fact that blendv* instructions only use the sign-bit when deciding which vector element
to choose for the destination vector. The mechanism to fold VSELECT into SHRUNKBLEND nodes already
exists in x86 lowering; this demanded bits change just enables the transform to fire more often.

The original motivation starts with a bug for DSE of masked stores that seems completely unrelated, 
but I've explained the likely steps in this series here:
https://llvm.org/bugs/show_bug.cgi?id=11210

Differential Revision: https://reviews.llvm.org/D29687

llvm-svn: 294863
2017-02-11 18:01:55 +00:00
Amaury Sechet
0f36f09e52 Fix typo in test filename. NFC
llvm-svn: 294860
2017-02-11 17:48:49 +00:00
Amaury Sechet
5be1932d6c Fix indentation in X86ISelLowering. NFC
llvm-svn: 294859
2017-02-11 17:48:48 +00:00
Craig Topper
cf09c0056a [AVX-512] Add VPMINS/MINU/MAXS/MAXU instructions to load folding tables.
llvm-svn: 294858
2017-02-11 17:35:28 +00:00
Craig Topper
9b0d4d1781 [X86] Improve alphabetizing of load folding tables. NFC
llvm-svn: 294857
2017-02-11 17:35:25 +00:00
Simon Pilgrim
60788e90f4 [X86][SSE] Convert getTargetShuffleMaskIndices to use getTargetConstantBitsFromNode.
Removes duplicate constant extraction code in getTargetShuffleMaskIndices.

getTargetConstantBitsFromNode - adds support for VZEXT_MOVL(SCALAR_TO_VECTOR) and fail if the caller doesn't support undef bits.

llvm-svn: 294856
2017-02-11 17:27:21 +00:00
Simon Pilgrim
e9630bb54c [X86] Merge repeated getScalarValueSizeInBits calls. NFCI.
llvm-svn: 294852
2017-02-11 16:42:07 +00:00
Daniel Berlin
abf96b4e8e NewGVN: Reverse sense of this test to make it clearer
llvm-svn: 294851
2017-02-11 15:20:15 +00:00
Daniel Berlin
121763123d NewGVN: Add missing initialization of NumFuncArgs lost due to bad merge.
llvm-svn: 294850
2017-02-11 15:13:49 +00:00
Daniel Berlin
3ee02d2ae5 NewGVN: Rank and order commutative operands consistently.
llvm-svn: 294849
2017-02-11 15:07:01 +00:00
Simon Pilgrim
9e568ac237 [X86][3DNow!] Add tests to ensure PFMAX/PFMIN are not commuted.
llvm-svn: 294848
2017-02-11 14:01:37 +00:00
Simon Pilgrim
553dbd49b2 [X86][3DNow!] Enable PFSUB<->PFSUBR commutation
llvm-svn: 294847
2017-02-11 13:51:14 +00:00
Simon Pilgrim
df6e3e4bed [X86][3DNow!] Enable commutation for PFADD/PFMUL/PFCMPEQ/PAVGUSB/PMULHRW
All commutations confirmed to give identical results - note PFMAX/PFMIN do not

PFSUB<->PFSUBR should be commutable as well

llvm-svn: 294846
2017-02-11 13:32:55 +00:00
Simon Pilgrim
297a664611 [X86][3DNow!] Add tests showing missed commutation opportunities.
llvm-svn: 294845
2017-02-11 13:00:32 +00:00
Daniel Berlin
135405bb2a NewGVN: Clean up how we handle the INITIAL class so that everything in
it is dead or unreachable, as it should be.
This also makes the leader of INITIAL undef, enabling us to handle
irreducibility properly.

Summary:
This lets us verify, more than we do now, that we didn't screw up
value numbering.

Reviewers: davide

Subscribers: Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D29842

llvm-svn: 294844
2017-02-11 12:48:50 +00:00
Vitaly Buka
06a6f5ca47 Fix "left shift of negative value -1" introduced by r294805
llvm-svn: 294843
2017-02-11 12:44:03 +00:00
Simon Pilgrim
22c2d42279 [X86][XOP] Regenerate XOP commutation tests.
Added 32-bit tests as well.

llvm-svn: 294841
2017-02-11 12:30:59 +00:00
Simon Pilgrim
0b505de2b3 [X86][SSE] Regenerate float comparison commutation tests.
llvm-svn: 294840
2017-02-11 12:29:56 +00:00
Simon Pilgrim
c1911446c6 [X86] Regenerate CLMUL commutation tests.
llvm-svn: 294839
2017-02-11 12:23:22 +00:00
Benjamin Kramer
bfaa3adccc Move symbols from the global namespace into (anonymous) namespaces. NFC.
llvm-svn: 294837
2017-02-11 11:06:55 +00:00
Craig Topper
6e91ba68a2 [AVX-512] Add VPINSRB/W/D/Q instructions to load folding tables.
llvm-svn: 294830
2017-02-11 07:01:40 +00:00