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Commit Graph

133197 Commits

Author SHA1 Message Date
Alina Sbirlea
263e70a93c Keep barcelona subtype for amdfam10
llvm-svn: 272329
2016-06-09 22:47:36 +00:00
Alina Sbirlea
d5696c2256 [cpu-detection] Return amdfam10 for all subtypes. Address Bug 28067.
Summary: Remove architecture subtype from the string returned by getHostCPUName(). String matching done on type.

Reviewers: llvm-commits, echristo

Subscribers: mehdi_amini

Differential Revision: http://reviews.llvm.org/D21193

llvm-svn: 272328
2016-06-09 22:47:12 +00:00
Chris Bieneman
0158e53ab5 [CMake] Cleanup ExternalProject usage of CMake 3.x features
All the ExternalProject features in use here are supported by CMake 3.4.3, so we don't need these version checks anymore.

llvm-svn: 272327
2016-06-09 22:41:36 +00:00
Easwaran Raman
57cf853e91 Use ProfileSummaryInfo in inline cost analysis.
Instead of directly using MaxFunctionCount and function entry count to determine callee hotness, use the isHotFunction/isColdFunction methods provided by ProfileSummaryInfo.

Differential revision: http://reviews.llvm.org/D21045

llvm-svn: 272321
2016-06-09 22:23:21 +00:00
Simon Pilgrim
10fdc6dca9 [X86][AVX512] Added avx512 VPSLLDQ/VPSRLDQ instruction comments
llvm-svn: 272319
2016-06-09 22:03:15 +00:00
Quentin Colombet
75321fdc07 [LiveRangeEdit] Fix a crash in eliminateDeadDef.
When we delete a live-range, we check if that live-range is the origin of others
to keep it around for rematerialization. For that we check that the instruction
we are about to remove is the same as the definition of the VNI of the original
live-range.
If this is the case, we just shrink the live-range to an empty one.

Now, when we try to delete one of the children of such live-range (product of
splitting), we do the same check.
However, now the original live-range is empty and there is no way we can
access the VNI to check its definition, and we crash.

When we cannot get the VNI for the original live-range, that means we are not in
the presence of the original definition. Thus, this check does not need to happen
in that case and the crash is sloved!

This bug was introduced in r266162 | wmi | 2016-04-12 20:08:27. It affects every
target that uses the greedy register allocator.
To happen, we need to delete both a the original instruction and its split
products, in that order. This is likely to happen when rematerialization comes
into play.

Trying to produce a more robust test case. Will follow in a coming commit.

This fixes llvm.org/PR27983.

rdar://problem/26651519 

llvm-svn: 272314
2016-06-09 21:34:31 +00:00
Vedant Kumar
e22d636530 [docs] Fix indentation for a tool option
llvm-svn: 272309
2016-06-09 21:09:54 +00:00
Simon Pilgrim
4515a471d4 [X86][AVX512] Dropped avx512 VPSLLDQ/VPSRLDQ intrinsics
Auto-upgrade to generic shuffles like sse/avx2 implementations now that we can lower to VPSLLDQ/VPSRLDQ 

llvm-svn: 272308
2016-06-09 21:09:03 +00:00
Simon Pilgrim
c8cd1f56db [X86][AVX512] Fixed issue with v16i32 shuffles lowering to VPALIGNR
llvm-svn: 272307
2016-06-09 20:53:12 +00:00
Duncan P. N. Exon Smith
969e6070d4 BitcodeReader: Use std:::piecewise_construct when upgrading type refs
r267296 used std::piecewise_construct without using
std::forward_as_tuple, and r267298 hacked it out (using an emplace_back
followed by a couple of reset() calls) because of a problem on a bot.
I'm finally circling back to call forward_as_tuple as I should have to
begin with (thanks to David Blaikie for pointing out the missing piece).

Note that this code uses emplace_back() instead of
push_back(make_pair()) because the move constructor for TrackingMDRef is
expensive (cheaper than a copy, but still expensive).

llvm-svn: 272306
2016-06-09 20:46:33 +00:00
Simon Pilgrim
01d87ac7ba [X86][AVX512] Added support for lowering 512-bit vector shuffles to bit/byte shifts
512-bit VPSLLDQ/VPSRLDQ can only be used for avx512bw targets so lowerVectorShuffleAsShift had to be adjusted to include the subtarget

llvm-svn: 272300
2016-06-09 20:13:58 +00:00
Justin Lebar
05e13f8eda [NVPTX] Add intrinsics for shfl instructions.
Summary:
Currently clang emits these instructions via inline (volatile) asm in
the CUDA headers.  Switching to intrinsics will let the optimizer reason
across calls to these intrinsics.

Reviewers: tra

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D21160

llvm-svn: 272298
2016-06-09 20:04:08 +00:00
Sanjoy Das
ddc0a2b85d NFC cleanup of InitializePasses.h
- Alphabetically sort the initializeXXX calls (this was brought up in
   D21115)
 - Remove repeated function names from doxygen comments

llvm-svn: 272297
2016-06-09 19:58:30 +00:00
Justin Lebar
a123a05edb [NVPTX] Mark bar.sync intrinsic as convergent.
Summary:
__syncthreads, which corresponds to bar.sync 0, is already convergent.
This makes the more general bar.sync n likewise convergent.

Reviewers: tra

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D21161

llvm-svn: 272295
2016-06-09 19:49:26 +00:00
Easwaran Raman
addb2cb8dd [PM] Port LCSSA to the new PM.
Differential Revision: http://reviews.llvm.org/D21090

llvm-svn: 272294
2016-06-09 19:44:46 +00:00
Vedant Kumar
a599512386 Revert "[lit] Use os.devnull instead of named temp files"
This reverts commit r272290. It breaks a test that depends on being able
to seek the /dev/null equivalent on Windows:

http://bb.pgr.jp/builders/ninja-clang-x64-mingw64-RA/builds/11360

llvm-svn: 272293
2016-06-09 19:36:48 +00:00
Wei Ding
2bbde20e67 AMDGPU/SI: Fix 32-bit fdiv lowering
We were using the fast fdiv lowering for all division, implementation of
IEEE754 fdiv is added.

http://reviews.llvm.org/D20557

llvm-svn: 272292
2016-06-09 19:17:15 +00:00
Vedant Kumar
6e905448d5 [lit] Use os.devnull instead of named temp files
Use os.devnull instead of tempfiles when substituting '/dev/null' on
Windows machines. This should make the bots just a bit speedier.

Thanks to Yunzhong Gao for testing this patch on Windows!

Differential Revision: http://reviews.llvm.org/D20549

llvm-svn: 272290
2016-06-09 18:38:41 +00:00
Michael Kuperstein
74b1dfdd84 [LV] Use vector phis for some secondary induction variables
Previously, we materialized secondary vector IVs from the primary scalar IV,
by offseting the primary to match the correct start value, and then broadcasting
it - inside the loop body. Instead, we can use a real vector IV, like we do for
the primary.

This enables using vector IVs for secondary integer IVs whose type matches the
type of the primary.

Differential Revision: http://reviews.llvm.org/D20932

llvm-svn: 272283
2016-06-09 18:03:15 +00:00
Chris Bieneman
ca114f3116 [CMake] Add LLVM_TOOLS_INSTALL_DIR to LLVMConfig.cmake
This is the more-correct fix to out-of-tree building. AddLLVM.cmake relies on this variable being set, so we should make sure it is set in LLVMConfig.cmake.

llvm-svn: 272279
2016-06-09 17:22:02 +00:00
Davide Italiano
f7c502a0af Also fix a typo. Need more coffee today.
llvm-svn: 272278
2016-06-09 17:06:01 +00:00
Davide Italiano
bb4dc1b3af Improve r272262, check that __stack_chk_guard is used.
Thanks to Rafael for the suggestion.

llvm-svn: 272277
2016-06-09 17:04:38 +00:00
Jan Vesely
6226d63998 SelectionDAG: Implement expansion of {S,U}MIN/MAX in integer legalization
Fixes {u,}long_{min,max,clamp} opencl piglit regressions on EG.

Reviewers: arsenm
Differential Revision: http://reviews.llvm.org/D17898

llvm-svn: 272272
2016-06-09 16:04:00 +00:00
Hans Wennborg
4ad6286c38 PDB/Raw/Hash.h: try to fix VS2013 build
llvm-svn: 272269
2016-06-09 15:33:06 +00:00
Haicheng Wu
4b9f9313ec Reapply "[MBP] Reduce code size by running tail merging in MBP.""
This reapplies commit r271930, r271915, r271923.  They hit a bug in
Thumb which is fixed in r272258 now.

The original message:

The code layout that TailMerging (inside BranchFolding) works on is not the
final layout optimized based on the branch probability. Generally, after
BlockPlacement, many new merging opportunities emerge.

This patch calls Tail Merging after MBP and calls MBP again if Tail Merging
merges anything.

llvm-svn: 272267
2016-06-09 15:24:29 +00:00
Ulrich Weigand
3a7df35715 [SystemZ] Enable long displacement constraints for inline ASM operands
This enables use of the 'S' constraint for inline ASM operands on
SystemZ, which allows for a memory reference with a signed 20-bit
immediate displacement. This patch includes corresponding documentation
and test case updates.

I've changed the 'T' constraint to match the new behavior for 'S', as
'T' also uses a long displacement (though index constraints are still
not implemented). I also changed 'm' to match the behavior for 'S' as
this will allow for a wider range of displacements for 'm', though
correct me if that's not the right decision.

Author: colpell
Differential Revision: http://reviews.llvm.org/D21097

llvm-svn: 272266
2016-06-09 15:19:16 +00:00
Davide Italiano
6f243c6798 Move stackguard test to X86/ directory as it's not generic.
llvm-svn: 272264
2016-06-09 15:16:58 +00:00
Davide Italiano
74d4553b12 [CodeGen] Change getSDagStackGuard to get an internal sym.
Fixes a crash in the backend during an LTO build of rtld(1) in
FreeBSD.

llvm-svn: 272262
2016-06-09 14:23:38 +00:00
Hrvoje Varga
62d5d2ff36 [mips][microMIPS] Implement BOVC, BNVC, EXT, INS and JALRC instructions
Differential Revision: http://reviews.llvm.org/D11798

llvm-svn: 272259
2016-06-09 12:57:23 +00:00
James Molloy
e31be9c68b [Thumb] A branch is not part of an IT block
ReplaceTailWithBranchTo assumed that if an instruction is predicated, it must be part of an IT block. This is not correct for conditional branches.

No testcase as this was triggered by the reverted patch r272017 - test coverage will occur when that patch is re-reverted and there is no known way to trigger this in the meantime.

llvm-svn: 272258
2016-06-09 11:51:29 +00:00
Igor Breger
cf92d72d91 [AVX512] Remove masked_move/blendm intrinsic from back-end.
This is complement patch to D21060.

Differential Revision: http://reviews.llvm.org/D21174

llvm-svn: 272257
2016-06-09 11:46:55 +00:00
Zlatko Buljan
63e6509982 [mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.*, SELNEZ.* and CMP.condn.fmt instructions
Differential Revision: http://reviews.llvm.org/D20862

llvm-svn: 272256
2016-06-09 11:15:53 +00:00
Sam Kolton
dc2814b1fe [AMDGPU] Disassembler: Support for sdwa instructions
Reviewers: vpykhtin, tstellarAMD

Subscribers: arsenm, kzhuravl

Differential Revision: http://reviews.llvm.org/D21129

llvm-svn: 272255
2016-06-09 11:04:45 +00:00
Diana Picus
90c96e80ad [llc] Remove exit-on-error flag from MIR tests (PR27770)
This is made possible by removing an assert in llc that assumed
MIRParser::parseLLVMModule would exit on error. MIRParser's documentation states
that it returns null if a parsing error occurs, so there's no reason to assert.
We can instead just fall through to where the check for a module is performed
and exit if it is null.

This commit is part of the clean-up after r269655.

Fixes PR27770

Differential Revision: http://reviews.llvm.org/D20371

llvm-svn: 272254
2016-06-09 10:31:05 +00:00
Craig Topper
ebd5461b3b [AVX512] Fix shuffle decode printing for several instructions with write masks. There are still more bugs here with UNPCK and PALIGN for sure. But these were the easiest ones to fix.
llvm-svn: 272252
2016-06-09 07:49:08 +00:00
James Molloy
9342eb300f [Thumb] Select a BIC instead of AND if the immediate can be encoded more optimally negated
If an immediate is only used in an AND node, it is possible that the immediate can be more optimally materialized when negated. If this is the case, we can negate the immediate and use a BIC instead;

  int i(int a) {
    return a & 0xfffffeec;
  }

Used to produce:
    ldr r1, [CONSTPOOL]
    ands r0, r1
  CONSTPOOL: 0xfffffeec

And now produces:
    movs    r1, #255
    adds    r1, #20  ; Less costly immediate generation
    bics    r0, r1

llvm-svn: 272251
2016-06-09 07:39:08 +00:00
Craig Topper
9666215a51 [X86] Fix a test I failed to re-generate in r272249.
llvm-svn: 272250
2016-06-09 07:10:34 +00:00
Craig Topper
a336600f12 [X86] Bring consistent naming to the SSE/AVX and AVX512 PALIGNR instructions. Then add shuffle decode printing for the EVEX forms which is made easier by having the naming structure more similar to other instructions.
llvm-svn: 272249
2016-06-09 07:06:38 +00:00
Craig Topper
830df4dc0b [X86] Fix bad comment in assert. NFC
llvm-svn: 272248
2016-06-09 07:06:33 +00:00
Xinliang David Li
abd6b070fa Revert r272194 No need for it if loop Analysis Manager is used
llvm-svn: 272243
2016-06-09 03:22:39 +00:00
Saleem Abdulrasool
f8f7493c06 test: fix typo
llvm-svn: 272242
2016-06-09 03:14:32 +00:00
Saleem Abdulrasool
548ac13275 AArch64: support the .arch directive in the IAS
Add support to the AArch64 IAS for the `.arch` directive.  This allows the
assembly input to use architectural functionality in part of a file.  This is
used in existing code like BoringSSL.

Resolves PR26016!

llvm-svn: 272241
2016-06-09 02:56:40 +00:00
Kostya Serebryany
a8a08fe1d8 [libFuzzer] add one more OOM test, which we currently don't handle very well
llvm-svn: 272240
2016-06-09 01:20:35 +00:00
Teresa Johnson
fe64b067cf [ThinLTO/gold] Enable summary-based internalization
Summary: Enable existing summary-based importing support in the gold-plugin.

Reviewers: mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: http://reviews.llvm.org/D21080

llvm-svn: 272239
2016-06-09 01:14:13 +00:00
Sanjoy Das
571e7a9db7 Minor clean up in loopHasNoAbnormalExits; NFC
llvm-svn: 272238
2016-06-09 01:14:03 +00:00
Sanjoy Das
7ac8ad9906 Be wary of abnormal exits from loop when exploiting UB
We can safely rely on a NoWrap add recurrence causing UB down the road
only if we know the loop does not have a exit expressed in a way that is
opaque to ScalarEvolution (e.g. by a function call that conditionally
calls exit(0)).

I believe with this change PR28012 is fixed.

Note: I had to change some llvm-lit tests in LoopReroll, since it looks
like they were depending on this incorrect behavior.

llvm-svn: 272237
2016-06-09 01:13:59 +00:00
Sanjoy Das
3b2361a5ba Factor out a loopHasNoAbnormalExits; NFC
llvm-svn: 272236
2016-06-09 01:13:54 +00:00
Richard Smith
f7f711ffaa Search for llvm-symbolizer binary in the same directory as argv[0], before
looking for it along $PATH. This allows installs of LLVM tools outside of
$PATH to find the symbolizer and produce pretty backtraces if they crash.

llvm-svn: 272232
2016-06-09 00:53:21 +00:00
Reid Kleckner
23864d1d49 [codeview] Skip DIGlobalVariables with no variable
They have probably been discarded during optimization.

llvm-svn: 272231
2016-06-09 00:29:00 +00:00
Zachary Turner
71f77913c9 [pdbdump-fuzzer] Try to fix build errors in fuzzer.
llvm-svn: 272230
2016-06-09 00:21:37 +00:00