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Commit Graph

189932 Commits

Author SHA1 Message Date
Qiu Chaofan
2824df2498 [NFC] Refactor memory ops cluster method
Current implementation of BaseMemOpsClusterMutation is a little bit
obscure. This patch directly uses a map from store chain ID to set of
memory instrs to make it simpler, so that future improvements are easier
to read, update and review.

Reviewed By: evandro

Differential Revision: https://reviews.llvm.org/D72070
2020-01-12 13:10:04 +08:00
Craig Topper
bc5c331a14 [X86] Don't call LowerSETCC from LowerSELECT for STRICT_FSETCC/STRICT_FSETCCS nodes.
This causes the STRICT_FSETCC/STRICT_FSETCCS nodes to lowered
early while lowering SELECT, but the output chain doesn't get
connected. Then we visit the node again when it is its turn
because we haven't replaced the use of the chain result. In the
case of the fp128 libcall lowering, after D72341 this will cause
the libcall to be emitted twice.
2020-01-11 20:43:00 -08:00
Zheng Chen
1c93f5af35 [SCEV] more accurate range for addrecexpr with nsw flag.
Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D72436
2020-01-11 23:26:35 -05:00
Craig Topper
0744d792d5 [LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UINT_TO_FLOAT legalization.
The lo and hi computation are independent. Give them the same input
chain and TokenFactor the results together.
2020-01-11 17:50:30 -08:00
Craig Topper
18c0ac74a3 [TargetLowering][X86] Connect the chain from STRICT_FSETCC in TargetLowering::expandFP_TO_UINT and X86TargetLowering::FP_TO_INTHelper. 2020-01-11 17:50:20 -08:00
Craig Topper
19d3f5440d [LegalizeVectorOps] Expand vector MERGE_VALUES immediately.
Custom legalization can produce MERGE_VALUES to return multiple
results. We can expand them immediately instead of leaving them
around for DAG combine to clean up.
2020-01-11 17:50:20 -08:00
Fangrui Song
491409978c [X86][Disassembler] Shrink X86GenDisassemblerTables.inc from 36M to 6.1M
In x86Disassembler{OneByte,TwoByte,...}Codes,
"/* EmptyTable */" is very common. Omitting it saves lots of space.
Also, there is no need to display a table entry in multiple lines.

It is also common that the whole OpcodeDecision is { MODRM_ONEENTRY, 0}.
Make use of zero-initialization.
2020-01-11 17:28:22 -08:00
Fangrui Song
da427b145f [X86][Disassembler] Optimize argument passing and immediate reading 2020-01-11 15:43:26 -08:00
Fangrui Song
3a9f350cbb [Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()
The argument is llvm::null() everywhere except llvm::errs() in
llvm-objdump in -DLLVM_ENABLE_ASSERTIONS=On builds. It is used by no
target but X86 in -DLLVM_ENABLE_ASSERTIONS=On builds.

If we ever have the needs to add verbose log to disassemblers, we can
record log with a member function, instead of passing it around as an
argument.
2020-01-11 13:34:52 -08:00
Lang Hames
6d930a5412 [ORC] Fix argv handling in runAsMain / lli.
This fixes an off-by-one error in the argc value computed by runAsMain, and
switches lli back to using the input bitcode (rather than the string "lli") as
the effective program name.

Thanks to Stefan Graenitz for spotting the bug.
2020-01-11 13:03:38 -08:00
Alexandre Ganea
5331eb3b9c [Support] Optionally call signal handlers when a function wrapped by the the CrashRecoveryContext fails
This patch allows for handling a failure inside a CrashRecoveryContext in the same way as the global exception/signal handler. A failure will have the same side-effect, such as cleanup of temporarty file, printing callstack, calling relevant signal handlers, and finally returning an exception code. This is an optional feature, disabled by default.
This is a support patch for D69825.

Differential Revision: https://reviews.llvm.org/D70568
2020-01-11 15:27:07 -05:00
Fangrui Song
f973ddb04b [X86][Disassembler] Replace custom logger with LLVM_DEBUG
llvm-objdump -d on clang is decreased from 7.8s to 7.4s.

The improvement is likely due to the elimination of logger setup and
dbgprintf(), which has a large overhead.
2020-01-11 12:17:05 -08:00
Craig Topper
5d8bb888c1 [LegalizeVectorOps] Remove some of the simpler Expand methods. Pass Results vector to a couple. NFCI
Some of the simplest handlers just call TLI and if that fails,
they fall back to unrolling. For those just inline the TLI call
and share the unrolling call with the default case of Expand.

For ExpandFSUB and ExpandBITREVERSE so that its obvious they
don't return results sometimes and want to defer to LegalizeDAG.
2020-01-11 12:14:19 -08:00
Craig Topper
5d5ab3d281 [LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the Expand* and Promote* methods.
All the Expand* and Promote* function assume they are being
called with result 0 anyway. Just hardcode result 0 into them.
2020-01-11 11:41:23 -08:00
Fangrui Song
5e7f810e7d [X86][Disassembler] Simplify and optimize reader functions
llvm-objdump -d on clang is decreased from 8.2s to 7.8s.
2020-01-11 11:24:38 -08:00
Craig Topper
dccc4683f8 [X86] Turn FP_ROUND/STRICT_FP_ROUND into X86ISD::VFPROUND/STRICT_VFPROUND during PreprocessISelDAG to remove some duplicate isel patterns. 2020-01-11 11:06:52 -08:00
Lang Hames
92479bab85 [ExecutionEngine] Re-enable FastISel for non-iOS arm targets.
Patch by Nicolas Capens. Thanks Nicolas!

https://reviews.llvm.org/D65015
2020-01-11 10:49:59 -08:00
Philip Reames
01cf1a3805 [X86] Adjust nop emission by compiler to consider target decode limitations
The primary motivation of this change is to bring the code more closely in sync behavior wise with the assembler's version of nop emission.  I'd like to eventually factor them into one, but that's hard to do when one has features the other doesn't.

The longest encodeable nop on x86 is 15 bytes, but many processors - for instance all intel chips - can't decode the 15 byte form efficiently.  On those processors, it's better to use either a 10 byte or 11 byte sequence depending.
2020-01-11 08:45:17 -08:00
Philip Reames
d59f41ce54 [X86AsmBackend] Move static function before sole use [NFC] 2020-01-11 08:45:17 -08:00
Philip Reames
c8d30c065e [X86AsmBackend] Be consistent about placing definitions out of line [NFC] 2020-01-11 08:45:17 -08:00
Simon Pilgrim
30fec04253 Fix uninitialized value clang static analyzer warning. NFC. 2020-01-11 16:02:22 +00:00
Simon Pilgrim
07757bd26d moveOperands - assert Src/Dst MachineOperands are non-null.
Fixes static-analyzer warnings.
2020-01-11 14:37:19 +00:00
Simon Pilgrim
98153c77dd [X86] Fix outdated comment
The generic saturated math opcodes are no longer widened inside X86TargetLowering
2020-01-11 14:37:18 +00:00
Simon Pilgrim
c623e10ed2 Fix copy+paste typo in shuffle test name 2020-01-11 12:42:01 +00:00
Simon Pilgrim
3295916d10 [X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP lowering
Add initial support for lowering v4f64 shuffles to SHUFPD(VPERM2F128(V1, V2), VPERM2F128(V1, V2)), eventually this could be used for v8f32 (and maybe v8f64/v16f32) but I'm being conservative for the initial implementation as only v4f64 can always succeed.

This currently is only called from lowerShuffleAsLanePermuteAndShuffle so only gets used for unary shuffles, and we limit this to cases where we use upper elements as otherwise concating 2 xmm shuffles is probably the better case.

Helps with poor shuffles mentioned in D66004.
2020-01-11 12:42:00 +00:00
Florian Hahn
f4d29d71b3 [X86] Add more complex tests for vector masks used with AND/OR/XOR.
Additional test cases for D72524.
2020-01-11 12:13:10 +00:00
Nuno Lopes
e59e19e267 DSE: fix bug where we would only check libcalls for name rather than whole decl 2020-01-11 11:57:29 +00:00
Nikita Popov
9a6b5ddc4c [LoopRotate] Add tests for rotate with switch; NFC
For D72420.
2020-01-11 11:03:29 +01:00
Nikita Popov
273d3ef7cc [LoopSimplify] Regenerate test checks; NFC
For D72519.
2020-01-11 11:02:24 +01:00
Nikita Popov
ec2a6f1b2d [InstCombine] Preserve nuw on sub of geps (PR44419)
Fix https://bugs.llvm.org/show_bug.cgi?id=44419 by preserving the
nuw on sub of geps. We only do this if the offset has a multiplication
as the final operation, as we can't be sure the operations is nuw
in the other cases without more thorough analysis.

Differential Revision: https://reviews.llvm.org/D72048
2020-01-11 11:01:12 +01:00
Craig Topper
516dc2411b [X86] Remove dead code from X86DAGToDAGISel::Select that is no longer needed now that we don't mutate strict fp nodes. NFC 2020-01-11 00:27:14 -08:00
Craig Topper
0f4bc22841 [X86] Simplify code by removing an unreachable condition. NFCI
For X87<->SSE conversions, the SSE type is always smaller than
the X87 type. So we can always use the smallest type for the
memory type.
2020-01-10 23:41:06 -08:00
Craig Topper
83133d703e [X86] Preserve fpexcept property when turning strict_fp_extend and strict_fp_round into stack operations.
We use the stack for X87 fp_round and for moving from SSE f32/f64 to
X87 f64/f80. Or from X87 f64/f80 to SSE f32/f64.

Note for the SSE<->X87 conversions the conversion always happens in the
X87 domain. The load/store ops in the X87 instructions are able
to signal exceptions.
2020-01-10 23:41:06 -08:00
Fangrui Song
33c5a2d0e6 [X86][Disassembler] Simplify readPrefixes 2020-01-10 23:37:22 -08:00
Craig Topper
6d1b8132ee [X86] Use ReplaceAllUsesWith instead of ReplaceAllUsesOfValueWith to simplify some code. NFCI 2020-01-10 20:31:21 -08:00
Amara Emerson
7eb435b9b8 Mark the test/Feature/load_extension.ll test as unsupported on Darwin.
With plugins and examples enabled, this XPASSes. Mark it as unsupported until
the owner investigates what's going on.
2020-01-10 20:18:36 -08:00
Michael Bedy
cf6b17e988 [AMDGPU] Remove unnecessary v_mov from a register to itself in WQM lowering.
Summary:
- SI Whole Quad Mode phase is replacing WQM pseudo instructions with v_mov instructions.
While this is necessary for the special handling of moving results out of WWM live ranges,
it is not necessary for WQM live ranges. The result is a v_mov from a register to itself after every
WQM operation. This change uses a COPY psuedo in these cases, which allows the register
allocator to coalesce the moves away.

Reviewers: tpr, dstuttard, foad, nhaehnle

Reviewed By: nhaehnle

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71386
2020-01-10 23:01:19 -05:00
Qiu Chaofan
aba7b076af [NFC] [PowerPC] Update mi-peephole-splat test
Use script to re-generate the test case, for easier comparison with
future patches.
2020-01-11 11:53:49 +08:00
Zheng Chen
edd7ca0f0e [SCEV] [NFC] add more test cases for range of addrecexpr with nsw flag 2020-01-10 22:44:47 -05:00
Craig Topper
328bb420a2 [TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare from RunttimeLibcalls.def and all associated usages
Summary:
This always just used the same libcall as unordered, but the comparison predicate was different. This change appears to have been made when targets were given the ability to override the predicates. Before that they were hardcoded into the type legalizer. At that time we never inverted predicates and we handled ugt/ult/uge/ule compares by emitting an unordered check ORed with a ogt/olt/oge/ole checks. So only ordered needed an inverted predicate. Later ugt/ult/uge/ule were optimized to only call a single libcall and invert the compare.

This patch removes the ordered entries and just uses the inverting logic that is now present. This removes some odd things in both the Mips and WebAssembly code.

Reviewers: efriedma, ABataev, uweigand, cameron.mcinally, kpn

Reviewed By: efriedma

Subscribers: dschuff, sdardis, sbc100, arichardson, jgravelle-google, kristof.beyls, hiraditya, aheejin, sunfish, atanasyan, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72536
2020-01-10 19:30:08 -08:00
Alexandre Ganea
43a657db69 Remove umask tests
These tests were added in 18627115f4d2db5dc73207e0b5312f52536be7dd and e08b59f81d950bd5c8b8528fcb3ac4230c7b736c for validating a refactoring.
Removing because they break on ACL-controlled folders on Ubuntu, and their added value is low.

Differential Revision: https://reviews.llvm.org/D70854
2020-01-10 21:05:59 -05:00
Jessica Paquette
9bff2d6acf [AArch64] Don't generate libcalls for wide shifts on Darwin
Similar to cff90f07cb5cc3.

Darwin doesn't always use compiler-rt, and so we can't assume that these
functions are available (at least on arm64).
2020-01-10 15:58:51 -08:00
Mircea Trofin
767709e394 [NFC][InlineCost] Factor cost modeling out of CallAnalyzer traversal.
Summary:
The goal is to simplify experimentation on the cost model. Today,
CallAnalyzer decides 2 things: legality, and benefit. The refactoring
keeps legality assessment in CallAnalyzer, and factors benefit
evaluation out, as an extension.

Reviewers: davidxl, eraman

Reviewed By: davidxl

Subscribers: kamleshbhalui, fedor.sergeev, hiraditya, baloghadamsoftware, haicheng, a.sidorin, Szelethus, donat.nagy, dkrupp, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71733
2020-01-10 15:30:24 -08:00
Vedant Kumar
1108f46c04 [LockFileManager] Make default waitForUnlock timeout a parameter, NFC
Patch by Xi Ge!
2020-01-10 15:24:32 -08:00
Stanislav Mekhanoshin
f06e6b027e Let targets adjust operand latency of bundles
This reverts the AMDGPU DAG mutation implemented in D72487 and gives
a more general way of adjusting BUNDLE operand latency.

It also replaces FixBundleLatencyMutation with adjustSchedDependency
callback in the AMDGPU, fixing not only successor latencies but
predecessors' as well.

Differential Revision: https://reviews.llvm.org/D72535
2020-01-10 14:56:53 -08:00
Vedant Kumar
ac509eb162 [AArch64] Add isAuthenticated predicate to MCInstDesc
Add a predicate to MCInstDesc that allows tools to determine whether an
instruction authenticates a pointer. This can be used by diagnostic
tools to hint at pointer authentication failures.

Differential Revision: https://reviews.llvm.org/D70329

rdar://55089604
2020-01-10 14:30:52 -08:00
Craig Topper
f40d0a71d9 [TargetLowering] Use SelectionDAG::getSetCC and remove a repeated call to getSetCCResultType in softenSetCCOperands. NFCI 2020-01-10 13:24:00 -08:00
Philip Reames
d73dbfe36f [Tests] Precommit tests showing default branch padding on skylake
A follow up patch will change the default for the compiler, but not the assembler, just making sure we have testing for each in place.
2020-01-10 11:54:14 -08:00
Jonas Devlieghere
46e7d6ca8e [CMake] Fix modules build after DWARFLinker reorganization
Create a dedicate module for the DWARFLinker and make it depend on
intrinsics gen.
2020-01-10 11:06:38 -08:00
Craig Topper
c15731f7f1 [TargetLowering][ARM][X86] Change softenSetCCOperands handling of ONE to avoid spurious exceptions for QNANs with strict FP quiet compares
ONE is currently softened to OGT | OLT. But the libcalls for OGT and OLT libcalls will trigger an exception for QNAN. At least for X86 with libgcc. UEQ on the other hand uses UO | OEQ. The UO and OEQ libcalls will not trigger an exception for QNAN.

This patch changes ONE to use the inverse of the UEQ lowering. So we now produce O & UNE. Technically the existing behavior was correct for a signalling ONE, but since I don't know how to generate one of those from clang that seemed like something we can deal with later as we would need to fix other predicates as well. Also removing spurious exceptions seemed better than missing an exception.

There are also problems with quiet OGT/OLT/OLE/OGE, but those are harder to fix.

Differential Revision: https://reviews.llvm.org/D72477
2020-01-10 11:00:17 -08:00