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158 Commits

Author SHA1 Message Date
Chris Lattner
e894de1791 The simple isel being gone makes this dead! 
llvm-svn: 22914
 2005-08-19 18:32:03 +00:00
Jeff Cohen
bd51ec7461 Eliminate all remaining tabs and trailing spaces. 
llvm-svn: 22523
 2005-07-27 06:12:32 +00:00
Nate Begeman
e5314eb2c2 First round of support for doing scalar FP using the SSE2 ISA extension and 
XMM registers.  There are many known deficiencies and fixmes, which will be
addressed ASAP.  The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.

The x86 backend will still default to x87 style FP.  To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.

An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
                        Sum += P[i]; return Sum; }

The inner loop looks like the following:
x87:
.LBB_foo_1:     # no_exit
        fldl (%esp)
        faddl (%eax,%ecx,8)
        fstpl (%esp)
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

SSE2:
        addsd (%eax,%ecx,8), %xmm0
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

llvm-svn: 22340
 2005-07-06 18:59:04 +00:00
Chris Lattner
2fd2e53f6a Teach reginfo how to deal with ADJSTACKPTRri, allowing us to generate: 
add %ESP, 20
        jmp %EDX  # TAIL CALL

instead of:
        add %ESP, -8
        add %ESP, 28
        jmp %EDX  # TAIL CALL

llvm-svn: 22047
 2005-05-15 05:49:58 +00:00
Chris Lattner
adb31a99fa When emitting the function epilog, check to see if there already a stack 
adjustment.  If so, we merge the adjustment into the existing one.  This
allows us to generate:

caller2:
        sub %ESP, 12
        mov DWORD PTR [%ESP], 0
        mov %EAX, 1234567890
        mov %EDX, 0
        call func2
        add %ESP, 8
        ret 4

intead of:

caller2:
        sub %ESP, 12
        mov DWORD PTR [%ESP], 0
        mov %EAX, 1234567890
        mov %EDX, 0
        call func2
        sub %ESP, 4
        add %ESP, 12
        ret 4

for X86/fast-cc-merge-stack-adj.ll

llvm-svn: 22038
 2005-05-14 23:53:43 +00:00
Chris Lattner
37e226fa9b Add some new instructions 
llvm-svn: 22036
 2005-05-14 23:35:21 +00:00
Chris Lattner
62593e4e66 switch to having the callee pop stack operands for fastcc. This is currently buggy 
do not use

llvm-svn: 21984
 2005-05-13 21:44:04 +00:00
Chris Lattner
e9944b033d allow RETI 
llvm-svn: 21980
 2005-05-13 20:46:35 +00:00
Chris Lattner
ba7cdbebb1 add signed versions of the extra precision multiplies 
llvm-svn: 21106
 2005-04-06 04:19:22 +00:00
Chris Lattner
34757ff939 Add rotate instructions. 
llvm-svn: 19690
 2005-01-19 07:50:03 +00:00
Chris Lattner
9d5ee289d7 Improve coverage of the X86 instruction set by adding 16-bit shift doubles. 
llvm-svn: 19687
 2005-01-19 07:31:24 +00:00
Chris Lattner
65d007ab62 Add conditional moves for the parity flag. 
llvm-svn: 19437
 2005-01-10 22:09:33 +00:00
Chris Lattner
95f1e628ed Add support for SETNPr to lower to memory form. 
llvm-svn: 19248
 2005-01-02 02:37:46 +00:00
Chris Lattner
316f923a9c Spill/restore X86 floating point stack registers with 64-bits of precision 
instead of 80-bits of precision.  This fixes PR467.

This change speeds up fldry on X86 with LLC from 7.32s on apoc to 4.68s.

llvm-svn: 18433
 2004-12-02 18:17:31 +00:00
Chris Lattner
acd213fba3 Add some new instructions. Fix the asm string for sbb32rr 
llvm-svn: 16759
 2004-10-06 04:01:02 +00:00
Reid Spencer
c4abcbefb1 Changes For Bug 352 
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.

llvm-svn: 16137
 2004-09-01 22:55:40 +00:00
Chris Lattner
4427fd9a3c Reduce uses of getRegClass 
llvm-svn: 15973
 2004-08-21 20:13:52 +00:00
Chris Lattner
555a585fd8 Code insertion methods now return void instead of an int. 
llvm-svn: 15780
 2004-08-15 22:15:11 +00:00
Chris Lattner
e58190f5f6 These methods no longer take a TargetRegisterClass* operand. 
llvm-svn: 15774
 2004-08-15 21:56:44 +00:00
Nate Begeman
fabece673b Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent 
llvm-svn: 15739
 2004-08-14 22:05:10 +00:00
Chris Lattner
d7905d828b Reserve the correct amt of space. 
llvm-svn: 14913
 2004-07-17 20:24:05 +00:00
Chris Lattner
6331eb6bbe Delete the allocate*TargetMachine function, which is now dead . 
The shared command line options are now in a header that makes sense.

llvm-svn: 14756
 2004-07-11 04:17:10 +00:00
Reid Spencer
50ec3f9325 Add #include <iostream> since Value.h does not #include it any more. 
llvm-svn: 14622
 2004-07-04 12:19:56 +00:00
Misha Brukman
e38f7ed2cc Spell out `NoFramePointerElim' for readability. 
llvm-svn: 14299
 2004-06-21 21:17:44 +00:00
Misha Brukman
a2ac4e4345 Use the common `NoFPElim' setting instead of our own. 
llvm-svn: 14298
 2004-06-21 21:10:24 +00:00
Chris Lattner
0cd29ae2cd Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID() 
llvm-svn: 14201
 2004-06-17 18:19:28 +00:00
Chris Lattner
4c8b57ea31 Add support for the setp instructions 
llvm-svn: 14140
 2004-06-11 04:30:06 +00:00
Chris Lattner
5ad9eaab1a Convert to the new TargetMachine interface. 
llvm-svn: 13952
 2004-06-02 05:55:25 +00:00
Alkis Evlogimenos
20b074682c Add more ADC and SBB variants 
llvm-svn: 12607
 2004-04-02 07:11:10 +00:00
Chris Lattner
6c1dd729d3 Implement spill code folding for all of the conditional move instructions 
llvm-svn: 12554
 2004-03-30 21:29:47 +00:00
Alkis Evlogimenos
2b94b048a9 Another API change to MRegisterInfo::foldMemoryOperand. Instead of a 
MachineBasicBlock::iterator take a MachineInstr*.

llvm-svn: 12392
 2004-03-14 20:14:27 +00:00
Alkis Evlogimenos
ff9482b664 Change MRegisterInfo::foldMemoryOperand to return the folded 
instruction to make the API more flexible.

llvm-svn: 12386
 2004-03-14 07:19:51 +00:00
Alkis Evlogimenos
65649a50e9 Add memory operand version of conditional move. 
llvm-svn: 12190
 2004-03-07 03:19:11 +00:00
Alkis Evlogimenos
7ecfe0a839 A big X86 instruction rename. The instructions are renamed to make 
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:

ADD8rr -> add, 8-bit register, 8-bit register

IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate

IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate

MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory

llvm-svn: 11995
 2004-02-29 08:50:03 +00:00
Alkis Evlogimenos
6815402082 SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them 
to denote this fact.

llvm-svn: 11972
 2004-02-28 23:46:44 +00:00
Alkis Evlogimenos
e8dac99a43 Floating point loads/stores act on memory operands. Rename them to 
denote this fact.

llvm-svn: 11971
 2004-02-28 23:42:35 +00:00
Alkis Evlogimenos
6038a89025 Uncomment instructions that take both an immediate and a memory 
operand but their sizes differ.

llvm-svn: 11969
 2004-02-28 22:06:59 +00:00
Alkis Evlogimenos
977dbaadf7 Do not generate instructions with mismatched memory/immediate sized 
operands. The X86 backend doesn't handle them properly right now.

llvm-svn: 11944
 2004-02-28 06:01:43 +00:00
Alkis Evlogimenos
5ac109957f Add memory operand folding support for the SETcc family of 
instructions.

llvm-svn: 11907
 2004-02-27 16:13:37 +00:00
Alkis Evlogimenos
0742b93bb9 Add memory operand folding support for SHLD and SHRD instructions. 
llvm-svn: 11905
 2004-02-27 15:03:18 +00:00
Alkis Evlogimenos
b1f67f6741 Add memory operand folding support for SHL, SHR and SAR, SHLD instructions. 
llvm-svn: 11903
 2004-02-27 09:28:43 +00:00
Alkis Evlogimenos
7f7d70a53c Move MOTy::UseType enum into MachineOperand. This eliminates the 
switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).

llvm-svn: 11715
 2004-02-22 19:23:26 +00:00
Alkis Evlogimenos
6998610eda When folding memory operands in machine instructions be careful to 
leave register operands with the same use/def flags as the original
instruction.

llvm-svn: 11709
 2004-02-22 06:54:26 +00:00
Chris Lattner
f58d2dd6cf Add support for GlobalAddress's for alkis 
llvm-svn: 11560
 2004-02-17 18:23:55 +00:00
Alkis Evlogimenos
0528c59353 Instructiosn with 1 memory operand have 4 operands in our 
representation.. duh!

llvm-svn: 11554
 2004-02-17 15:58:13 +00:00
Alkis Evlogimenos
b1a61b72f2 Align case statements. 
llvm-svn: 11552
 2004-02-17 15:50:41 +00:00
Alkis Evlogimenos
b815fd46ec Add TEST and XCHG memory operand support. 
llvm-svn: 11550
 2004-02-17 15:48:42 +00:00
Alkis Evlogimenos
32a5b0fd6c Add OR and XOR memory operand support. 
llvm-svn: 11549
 2004-02-17 15:33:14 +00:00
Alkis Evlogimenos
135c4faa55 Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT, 
MOVSX, and MOVZX.

llvm-svn: 11546
 2004-02-17 09:14:23 +00:00
Alkis Evlogimenos
e7bbd1c2fb Add memory operand folding for CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} 
and DECm{8,16,32} instructions.

llvm-svn: 11545
 2004-02-17 08:49:20 +00:00
Alkis Evlogimenos
5aa39e1583 Add support for folding memory operands for ADC, SBB and SUB instructions. 
llvm-svn: 11541
 2004-02-17 08:08:51 +00:00
Chris Lattner
eb1428d581 Add a (hidden) option to print instructions that fail to fuse. It's looking 
like compares and test's would be the next huge win...

llvm-svn: 11539
 2004-02-17 08:03:47 +00:00
Alkis Evlogimenos
19248dd757 Add support for folding memory operands in MOVri{8,16,32} instructions. 
llvm-svn: 11538
 2004-02-17 07:47:20 +00:00
Chris Lattner
a9493ad718 Add an option to disable spill fusing in the X86 backend 
llvm-svn: 11531
 2004-02-17 06:30:34 +00:00
Chris Lattner
d4b2f4ef32 Fix the mneumonics for the mov instructions to have the source and destination 
order in the correct sense!! Arg!

llvm-svn: 11530
 2004-02-17 06:28:19 +00:00
Chris Lattner
4682990fa5 GRRR. Move instructions have swapped the order of the r/m operands. 
llvm-svn: 11528
 2004-02-17 06:20:20 +00:00
Chris Lattner
e227ae6b88 Change to match the newer, simpler, interface 
llvm-svn: 11525
 2004-02-17 05:54:57 +00:00
Chris Lattner
b82bb37952 Add support for folding memory operands into AND and IMUL's 
llvm-svn: 11523
 2004-02-17 05:46:06 +00:00
Chris Lattner
48e19d8b8e Scrunchify code, by adding helpers. No functionality changes. 
llvm-svn: 11522
 2004-02-17 05:35:13 +00:00
Alkis Evlogimenos
c4ec9111bb Add API to check and fold memory operands into instructions. 
llvm-svn: 11519
 2004-02-17 04:33:18 +00:00
Chris Lattner
679c106ce3 Fix the 'have a framepointer' case, so that the frame pointer always points 
to the old saved EBP.

llvm-svn: 11455
 2004-02-15 00:15:37 +00:00
Chris Lattner
3246911460 There is no reason to align the stack pointer if there are no callees of this 
function!

llvm-svn: 11450
 2004-02-14 20:11:07 +00:00
Chris Lattner
f28479d600 The prologue/epilogue related method calls have no reason to return a value, 
make them return void.

This allows us to avoid some costly MBB.size() calls

llvm-svn: 11448
 2004-02-14 19:49:54 +00:00
Chris Lattner
1248c8a7f7 finegrainify namespacification, fix 80col prob 
llvm-svn: 11445
 2004-02-14 06:00:36 +00:00
Alkis Evlogimenos
a31a767307 Use newly added next() and prior() utility functions. 
llvm-svn: 11430
 2004-02-14 01:18:34 +00:00
Alkis Evlogimenos
94cab18bdc Change interface so that we can add to the end of a basic block 
without getting an assertion from ilist that we are dereferencing
ilist<T>::end().

llvm-svn: 11345
 2004-02-12 08:11:04 +00:00
Alkis Evlogimenos
b755d35fd2 Change MachineBasicBlock's vector of MachineInstr pointers into an 
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340
 2004-02-12 02:27:10 +00:00
Alkis Evlogimenos
676e5b8997 Modify the two address instruction pass to remove the duplicate 
operand of the instruction and thus simplify the register allocation.

llvm-svn: 11124
 2004-02-04 22:17:40 +00:00
Brian Gaeke
d25f86d683 Put all LLVM code into the llvm namespace, as per bug 109. 
llvm-svn: 9903
 2003-11-11 22:41:34 +00:00
Alkis Evlogimenos
c6a7c83333 Change all machine basic block modifier functions in MRegisterInfo to 
return the number of instructions added to/removed from the basic block
passed as their first argument.

Note: This is only needed because we use a std::vector instead of an
ilist to keep MachineBasicBlock instructions. Inserting an instruction
to a MachineBasicBlock invalidates all iterators to the basic
block. The return value can be used to update an index to the machine
basic block instruction vector and circumvent the iterator elimination
problem but this is really not needed if we move to a better
representation.

llvm-svn: 9704
 2003-11-04 22:57:09 +00:00
John Criswell
b402729b30 Added LLVM project notice to the top of every C++ source file. 
Header files will be on the way.

llvm-svn: 9298
 2003-10-20 19:43:21 +00:00
Chris Lattner
c115e75755 Output a contorted sequence of instructions to make sure that we don't access 
off the bottom of the stack.  This fixes PR#41

llvm-svn: 9114
 2003-10-14 19:09:05 +00:00
Chris Lattner
907de53acb Disable the leaf function optimization, which is apparently not legal on 
X86/linux.  :(  The problem is that a signal delivered while the function
is executing could clobber the functions stack.  This is a partial fix
for PR41.

llvm-svn: 9113
 2003-10-14 18:52:41 +00:00
Misha Brukman
56f7db4178 Spell `necessary' correctly. 
llvm-svn: 7944
 2003-08-18 14:43:39 +00:00
Chris Lattner
cd1aec5a9d Rename register classes to be upper case to make it obvious that they are X86 
specific in the tree patterns

llvm-svn: 7578
 2003-08-04 20:58:29 +00:00
Chris Lattner
457b33f7e4 Switch over to TableGen generated register file description 
llvm-svn: 7511
 2003-08-03 15:48:14 +00:00
Chris Lattner
8fdf81b97e Move "register flags" definition the type of registers to be fully fledged 
value types

llvm-svn: 7377
 2003-07-29 05:14:16 +00:00
Chris Lattner
ea424f3aff Rename -no-* to -disable-* 
llvm-svn: 5642
 2003-02-26 20:00:41 +00:00
Chris Lattner
013ad21206 Implement code to keep the stack pointer aligned to an 8 byte boundary. 
This improves the performance of the power benchmark by a few percent.
This will be neccesary for SSE code, which requires 16 byte alignment of
the stack.

llvm-svn: 5320
 2003-01-16 02:20:12 +00:00
Chris Lattner
df631471bf Handle frame offset due to return address pushed on the stack 
llvm-svn: 5319
 2003-01-15 22:57:35 +00:00
Chris Lattner
b355b13a8e * Move frame and constant pool indexes to first argument of memory reference 
so we can put an offset in there as well...
* Fix long/ulong stuff

llvm-svn: 5231
 2003-01-13 00:50:33 +00:00
Chris Lattner
ea33ca1e96 Rename FunctionFrameInfo to MachineFrameInfo 
llvm-svn: 5201
 2002-12-28 21:08:28 +00:00
Chris Lattner
a2bb8607ab *** Implement frame pointer elimination on X86! 
* Include contents of X86RegisterClasses.cpp into here
* Adjustments to register api to work with new frame manager
* Eliminate moveImm2Reg, getFramePointer, and getStackPointer
* Cleanup and simplify prolog/epilog code generation
* Prolog/epilog are MUCH more efficient now.

llvm-svn: 5186
 2002-12-28 20:32:28 +00:00
Chris Lattner
05a3f80d24 New simpler spill interface 
llvm-svn: 5148
 2002-12-25 05:07:09 +00:00
Chris Lattner
8e628685d9 Fix compilation on gcc 2.96 
llvm-svn: 5116
 2002-12-23 23:46:55 +00:00
Chris Lattner
2dc1b58c11 Fix warning 
llvm-svn: 5109
 2002-12-20 04:13:28 +00:00
Chris Lattner
0b617b0e1d Update to use new interface for register info 
llvm-svn: 5098
 2002-12-17 04:19:17 +00:00
Chris Lattner
dbca3de031 Round number of bytes allocated on the stack up to a multiple of 4 so that the 
stack remains aligned

llvm-svn: 5095
 2002-12-17 03:15:26 +00:00
Chris Lattner
4a60d804c2 Register allocator is responsible for spilling callee saved regs 
llvm-svn: 5092
 2002-12-17 02:48:57 +00:00
Chris Lattner
9d64c1e53a Fix prolog/epilog in the presence of alloca 
llvm-svn: 5087
 2002-12-16 22:29:30 +00:00
Chris Lattner
4576429b7c Finish implementation of alias list impl 
llvm-svn: 5083
 2002-12-16 19:31:48 +00:00
Chris Lattner
b833239d6b Try #2 to get alias set stuff to work 
llvm-svn: 5077
 2002-12-16 16:14:51 +00:00
Chris Lattner
b413ce63d5 Add info about register file aliasing 
llvm-svn: 5074
 2002-12-16 15:55:25 +00:00
Chris Lattner
4964e751cd Correct the setting of Def flags on registers that are modified! 
llvm-svn: 5065
 2002-12-15 22:38:47 +00:00
Chris Lattner
4214ac384a Simplify interfaces used by regalloc to insert code 
llvm-svn: 5052
 2002-12-15 20:06:35 +00:00
Misha Brukman
2f2cf00a9f Cleaned up the code: factored out switch/case into a separate function, put 
constants in an array for quick lookup. Stole the idea from elsewhere in
Jello.

llvm-svn: 5017
 2002-12-13 12:00:06 +00:00
Misha Brukman
b6fb990276 Treat longs as ints => pretend they're all 32-bit values and squeeze them into 
32-bit registers.

llvm-svn: 5008
 2002-12-13 10:43:09 +00:00
Misha Brukman
fb02408496 Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to 
PHI nodes.

llvm-svn: 5001
 2002-12-13 09:54:12 +00:00
Misha Brukman
20c9c61c6d Moves now select correct opcode based on the data size. 
llvm-svn: 4981
 2002-12-13 04:24:53 +00:00
Misha Brukman
7dc6877ce2 Implemented functions for emitting prologues and epilogues; 
removed EBP from the list of callee-saved registers (it isn't one).

llvm-svn: 4929
 2002-12-04 23:57:03 +00:00