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Author SHA1 Message Date
Chris Lattner
99f3490b0c disolve a hack, having CodeGenInstAlias decode the alias in the .td 
file instead of the asmmatcher.

llvm-svn: 118324
 2010-11-06 06:39:47 +00:00
Jim Grosbach
009007e690 Hook up the '.code {16|32}' directive to the streamer. 
llvm-svn: 118310
 2010-11-05 22:40:53 +00:00
Jim Grosbach
a98b9ba916 Add '.code 32' assembler directive to MC streamers. 
llvm-svn: 118309
 2010-11-05 22:40:09 +00:00
Jim Grosbach
3d432a39dd Hook up the '.thumb_func' directive to the streamer. 
llvm-svn: 118307
 2010-11-05 22:33:53 +00:00
Jim Grosbach
dfa87da932 Fix past-o. 
llvm-svn: 118304
 2010-11-05 22:11:33 +00:00
Jim Grosbach
bbef2c5fcc MC'ize the '.code 16' and '.thumb_func' ARM directives. 
llvm-svn: 118301
 2010-11-05 22:08:08 +00:00
Owen Anderson
f26ea37db7 Disallow the certain NEON modified-immediate forms when generating vorr or vbic. 
llvm-svn: 118300
 2010-11-05 21:57:54 +00:00
Jim Grosbach
577ec1fe53 Trailing whitespace. 
llvm-svn: 118296
 2010-11-05 20:41:12 +00:00
Jim Grosbach
55b250bb64 MC'ize simple ARMConstantValue entry emission (with a FIXME). 
llvm-svn: 118295
 2010-11-05 20:34:24 +00:00
Benjamin Kramer
ac2bcb05cc Put class into an anonymous namespace. 
llvm-svn: 118294
 2010-11-05 19:56:38 +00:00
Owen Anderson
add19dd6dd Add codegen and encoding support for the immediate form of vbic. 
llvm-svn: 118291
 2010-11-05 19:27:46 +00:00
Jim Grosbach
1ee24bfd45 Enable MachO writing for ARM/Darwin. Lots of stuff still doesn't work 
(relocations, e.g.), but this will allow simple things to flow through.

llvm-svn: 118289
 2010-11-05 18:50:35 +00:00
Jim Grosbach
a85416eb77 Allow targets to specify the MachO CPUType/CPUSubtype information. 
llvm-svn: 118288
 2010-11-05 18:48:58 +00:00
Jim Grosbach
e952ae2659 syntaxunified directive is a no-op for MachO writing. 
llvm-svn: 118287
 2010-11-05 18:47:32 +00:00
Jim Grosbach
380e284cf8 Add v5 and v7 ARM CPU subtype values. 
llvm-svn: 118281
 2010-11-05 17:48:05 +00:00
Jim Grosbach
49dd16ea6f Add FIXME. 
llvm-svn: 118280
 2010-11-05 17:37:13 +00:00
Duncan Sands
96b03ec2ce When passing a parameter using the 'byval' mechanism, inline code needs to be used 
to perform the copy, which may be of lots of memory [*].  It would be good if the
fall-back code generated something reasonable, i.e. did the copy in a loop, rather
than vast numbers of loads and stores.  Add a note about this.  Currently target
specific code seems to always kick in so this is more of a theoretical issue rather
than a practical one now that X86 has been fixed.
[*] It's amazing how often people pass mega-byte long arrays by copy...

llvm-svn: 118275
 2010-11-05 15:20:29 +00:00
Daniel Dunbar
8f3d8495f5 CrashRecoveryContext: Add RunSafelyOnThread helper function. 
llvm-svn: 118272
 2010-11-05 07:19:09 +00:00
Duncan Sands
1af5c00d3c When passing a huge parameter using the byval mechanism, a long 
sequence of loads and stores was being generated to perform the
copy on the x86 targets if the parameter was less than 4 byte
aligned, causing llc to use up vast amounts of memory and time.
Use a "rep movs" form instead.  PR7170.

llvm-svn: 118260
 2010-11-04 21:16:46 +00:00
Benjamin Kramer
ed73c2619e Use arrays instead of constant-sized SmallVectors. 
llvm-svn: 118257
 2010-11-04 18:45:27 +00:00
Rafael Espindola
3f4a79b243 Add 118023 back, but with proper spelling for .uleb128/.sleb128. 
llvm-svn: 118254
 2010-11-04 18:17:08 +00:00
Rafael Espindola
618eefb925 Revert previous patch. Some targets don't support uleb and say 
they do :-(

llvm-svn: 118250
 2010-11-04 17:04:24 +00:00
Rafael Espindola
afb48cd73d MCize. 
llvm-svn: 118249
 2010-11-04 16:32:18 +00:00
Devang Patel
6c1b802673 Introduce DIBuilder. It is intended to be a front-end friendly interface to emit debuggging information entries in LLVM IR. 
To create debugging information for a pointer, using DIBUilder front-end just needs
	DBuilder.CreatePointerType(Ty, Size);
instead of
	DebugFactory.CreateDerivedType(llvm::dwarf::DW_TAG_pointer_type,
                                       TheCU, "", getOrCreateMainFile(),
                                       0, Size, 0, 0, 0, OCTy);

llvm-svn: 118248
 2010-11-04 15:01:38 +00:00
Devang Patel
72715ef163 Add getFile() to get DIFile of a DIType. 
llvm-svn: 118247
 2010-11-04 14:56:34 +00:00
Duncan Sands
3bf2a701a5 In the calling convention logic, ValVT is always a legal type, 
and as such can be represented by an MVT - the more complicated
EVT is not needed.  Use MVT for ValVT everywhere.

llvm-svn: 118245
 2010-11-04 10:49:57 +00:00
Evan Cheng
165e65f53a Fix @llvm.prefetch isel. Selecting between pld / pldw using the first immediate rw. There is currently no intrinsic that matches to pli. 
llvm-svn: 118237
 2010-11-04 05:19:35 +00:00
Chris Lattner
a55b12911d partition operand processing between aliases and instructions. 
Right now the code is partitioned but the behavior is the same.
This should be improved in the near future.   This removes some
uses of TheOperandList.

llvm-svn: 118232
 2010-11-04 02:11:18 +00:00
Chris Lattner
21179e333e pull name slicing out of BuildInstructionOperandReference so 
it doesn't do any lexical stuff anymore.

llvm-svn: 118230
 2010-11-04 01:58:23 +00:00
Chris Lattner
c30032c0c0 cleanups. 
llvm-svn: 118228
 2010-11-04 01:55:23 +00:00
Chris Lattner
fcdb263fa4 replace SrcOpNum with SrcOpName, eliminating a numering dependency 
on the incoming operand list.  This also makes the code simpler.

llvm-svn: 118225
 2010-11-04 01:42:59 +00:00
Daniel Dunbar
06d64897d3 System: Add llvm_execute_on_thread, which does what it says. 
- Primarily useful for running some code with a specified stack size, when
   pthreads are available.

llvm-svn: 118222
 2010-11-04 01:26:25 +00:00
Jim Grosbach
9766b186b6 Add ARM fixup info for load/store label references. Probably will need a bit of 
tweaking when we start using it for object file emission or JIT, but it's a
start.

llvm-svn: 118221
 2010-11-04 01:12:30 +00:00
Bill Wendling
990c247994 Add encoding for VSTR. 
llvm-svn: 118220
 2010-11-04 00:59:42 +00:00
Chris Lattner
b0b3157619 strength reduce some code, resolving a fixme. 
llvm-svn: 118219
 2010-11-04 00:57:06 +00:00
Chris Lattner
9ae6cce0fe take a big step to making aliases more general and less of a hack: 
now matchables contain an explicit list of how to populate each
operand in the result instruction instead of having them somehow
magically be correlated to the input inst.

llvm-svn: 118217
 2010-11-04 00:43:46 +00:00
Jakob Stoklund Olesen
aa7acbe740 Disable fancy splitting during spilling unless -extra-spiller-splits is given. 
This way, InlineSpiller does the same amount of splitting as the standard
spiller. Splitting should really be guided by the register allocator, and
doesn't belong in the spiller at all.

llvm-svn: 118216
 2010-11-04 00:32:32 +00:00
Jim Grosbach
af6104d4bf Teach ARM Target to use the tblgen support for generating an MC'ized 
CodeEmitter.

llvm-svn: 118209
 2010-11-03 23:52:49 +00:00
Jim Grosbach
e89ee5eb80 Add rule to build MC'ized CodeEmitter. 
llvm-svn: 118207
 2010-11-03 23:46:01 +00:00
Jim Grosbach
7426448b7c Support generating an MC'ized CodeEmitter directly. Maintain a reference to the 
Fixups list for the instruction so the operand encoders can add to it as
needed.

llvm-svn: 118206
 2010-11-03 23:38:14 +00:00
Owen Anderson
d144bb1ddc Covert VORRIMM to be produced via early target-specific DAG combining, rather than legalization. 
This is both the conceptually correct place for it, as well as allowing it to be more aggressive.

llvm-svn: 118204
 2010-11-03 23:15:26 +00:00
Owen Anderson
1a89511e5d Add support for code generation of the one register with immediate form of vorr. 
We could be more aggressive about making this work for a larger range of constants,
but this seems like a good start.

llvm-svn: 118201
 2010-11-03 22:44:51 +00:00
Jim Grosbach
6c197e41bf trailing whitespace 
llvm-svn: 118199
 2010-11-03 22:03:20 +00:00
Eric Christopher
3f1ac311ff Just return undef for invalid masks or elts, and since we're doing that, 
just do it earlier too.

llvm-svn: 118195
 2010-11-03 20:44:42 +00:00
Jakob Stoklund Olesen
13bf5713f2 Let RegAllocBasic require MachineDominators - they are already available and 
splitting needs them.

llvm-svn: 118194
 2010-11-03 20:39:26 +00:00
Jakob Stoklund Olesen
7dc4b810ed Tag debug output as regalloc 
llvm-svn: 118193
 2010-11-03 20:39:23 +00:00
Eric Christopher
6b586a109e Optimize generated code for integer materialization a bit. 
llvm-svn: 118192
 2010-11-03 20:21:17 +00:00
Chris Lattner
5280a84fef rename Operand -> AsmOperand for clarity. 
llvm-svn: 118190
 2010-11-03 19:47:34 +00:00
Evan Cheng
72718cf345 Fix test. 
llvm-svn: 118187
 2010-11-03 18:21:33 +00:00
Owen Anderson
98f9965c89 Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by element size. Instead, 
all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with
the immediate shifted left to reflect the increased element size.

llvm-svn: 118183
 2010-11-03 18:16:27 +00:00