7 Commits

Author	SHA1	Message	Date
Michael Kuperstein	d453e7f730	Ensure bitcode encoding stays stable. ... This includes constants, attributes, and some additional instructions not covered by previous tests. Work was done by lama.saba@intel.com. llvm-svn: 218297	2014-09-23 08:48:01 +00:00
Duncan P. N. Exon Smith	986b92fd8e	verify-uselistorder: Force -preserve-bc-use-list-order ... llvm-svn: 216022	2014-08-19 21:08:27 +00:00
Duncan P. N. Exon Smith	d5508bfe28	verify-uselistorder: Change the default -num-shuffles=5 ... Change the default for `-num-shuffles` to 5 and better document the algorithm in the header docs of `verify-uselistorder`. llvm-svn: 214419	2014-07-31 18:46:24 +00:00
Duncan P. N. Exon Smith	4af7ebf31b	Rename llvm-uselistorder => verify-uselistorder ... llvm-svn: 214318	2014-07-30 17:11:27 +00:00
Duncan P. N. Exon Smith	a47a95e521	Bitcode: Correctly compare a Use against itself ... Fix the sort of expected order in the reader to correctly return `false` when comparing a `Use` against itself. This was caught by test/Bitcode/binaryIntInstructions.3.2.ll, so I'm adding a `RUN` line using `llvm-uselistorder` for every test in `test/Bitcode` that passes. A few tests still fail, so I'll investigate those next. This is part of PR5680. llvm-svn: 214157	2014-07-29 01:13:56 +00:00
Duncan P. N. Exon Smith	2512622ff7	Fix line-endings, NFC ... A follow-up commit is adding a RUN line to each of these tests, so fix the line endings first. This is a whitespace-only change. llvm-svn: 214156	2014-07-29 01:10:57 +00:00
Michael Kuperstein	5343bbad35	Ensure bitcode encoding of instructions and their operands stays stable. ... This includes instructions with aggregate operands (insert/extract), instructions with vector operands (insert/extract/shuffle), binary arithmetic and bitwise instructions, conversion instructions and terminators. Work was done by lama.saba@intel.com. llvm-svn: 202262	2014-02-26 12:06:36 +00:00