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Commit Graph

1766 Commits

Author SHA1 Message Date
Dale Johannesen
2df647f882 Changes to ARM tail calls, mostly cosmetic.
Add explicit testcases for tail calls within the same module.
Duplicate some code to humor those who think .w doesn't apply on ARM.
Leave this disabled on Thumb1, and add some comments explaining why it's hard
and won't gain much.

llvm-svn: 107851
2010-07-08 01:18:23 +00:00
Dan Gohman
4dcc56a102 Revert 107840 107839 107813 107804 107800 107797 107791.
Debug info intrinsics win for now.

llvm-svn: 107850
2010-07-08 01:00:56 +00:00
Chris Lattner
6a5db9c9c9 Implement the major chunk of PR7195: support for 'callw'
in the integrated assembler.  Still some discussion to be
done.

llvm-svn: 107825
2010-07-07 22:27:31 +00:00
Dan Gohman
b2d5b47efb Give FunctionLoweringInfo an MBB member, avoiding the need to pass it
around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.

llvm-svn: 107791
2010-07-07 16:47:08 +00:00
Jakob Stoklund Olesen
8186b4c8d1 Add a new target independent COPY instruction and code to lower it.
The COPY instruction is intended to replace the target specific copy
instructions for virtual registers as well as the EXTRACT_SUBREG and
INSERT_SUBREG instructions in MachineFunctions. It won't we used in a selection
DAG.

COPY is lowered to native register copies by LowerSubregs.

llvm-svn: 107529
2010-07-02 22:29:50 +00:00
Jakob Stoklund Olesen
4b0cb8209a Clean up TargetOpcodes.h a bit, and limit the number of places where the full
list of predefined instructions appear. Add some consistency checks.

Ideally, TargetOpcodes.h should be produced by TableGen from Target.td, but it
is hardly worth the effort.

llvm-svn: 107520
2010-07-02 21:44:22 +00:00
Duncan Sands
8292b412bc Remove unused variables.
llvm-svn: 106834
2010-06-25 09:35:33 +00:00
Bob Wilson
5ddef25de2 Change array references to match my previous change to use the public type
names for the array fields.

llvm-svn: 106803
2010-06-24 22:21:19 +00:00
Bob Wilson
45cb379048 Fix up some comments.
llvm-svn: 106795
2010-06-24 22:04:30 +00:00
Bob Wilson
f0df97699e Use the struct tags mandated by ARM's ABI. Also use the public type names for
the array fields in these structs.

llvm-svn: 106794
2010-06-24 22:03:41 +00:00
Nico Weber
04606293a5 Add support for the x86 instructions "pusha" and "popa".
llvm-svn: 106671
2010-06-23 20:00:58 +00:00
Bruno Cardoso Lopes
fe5b207577 Fix a tblgen bug.
Given the pattern below as an example:
list<dag> Pattern = [(set RC:$dst, (v4f32 (shufp:src3 RC:$src1,
                            (mem_frag addr:$src2))))];

The right reference resolving should lead to:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp:src3 VR128:$src1,
                            (mem_frag addr:$src2))))];
But was yielding:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp VR128:$src1,
                            (mem_frag addr:$src2))))];

Fix this by passing the right name when creating a new DagInit node.

llvm-svn: 106670
2010-06-23 19:50:39 +00:00
Nick Lewycky
4d160cb75c Don't link against libm and libpthread which don't exist in BeOS/Haiku. Also,
Haiku like Linux provides <regex.h>, so use it. Patch by Paul Davey!

llvm-svn: 106620
2010-06-23 06:48:34 +00:00
Bruno Cardoso Lopes
a176972a1b Fix a subtle multiclass bug: when using class inheritance on
a toplevel 'defm', make sure to properly resolve references.

llvm-svn: 106570
2010-06-22 20:30:50 +00:00
Eric Christopher
68b77d45c2 Remove isTwoAddress from llvm.
llvm-svn: 106470
2010-06-21 20:35:09 +00:00
Nate Begeman
8a4ebbc2a6 Add support for returning multiple vectors via sret, which is how the ARM target expects the intrinsics to work.
llvm-svn: 106406
2010-06-20 21:09:52 +00:00
Dale Johannesen
81914dea4e An attempt to fix the problem Anton reported with
ARM tail calls.  Don't know if it works, but it
doesn't break Darwin.

llvm-svn: 106309
2010-06-18 20:44:28 +00:00
Bruno Cardoso Lopes
71ad64af39 Teach tablegen how to inherit from classes in 'defm' definitions.
The rule is simple: only inherit from a class list if they come
in the end, after the last multiclass.

llvm-svn: 106305
2010-06-18 19:53:41 +00:00
Dan Gohman
1ccf40774e Start TargetRegisterClass indices at 0 instead of 1, so that
MachineRegisterInfo doesn't have to confusingly allocate an extra
entry.

llvm-svn: 106296
2010-06-18 18:13:55 +00:00
Bruno Cardoso Lopes
417b376bd2 In case Rec is a definition and not a class, do the proper comparison!
llvm-svn: 106246
2010-06-17 23:00:16 +00:00
Nate Begeman
b94f5f1d97 Modify tablegen to support generating all NEON code used by clang at once.
llvm-svn: 106207
2010-06-17 04:15:13 +00:00
Bruno Cardoso Lopes
bb6aa785be Fix the handling of !if result, avoiding null results for non 'int'.
llvm-svn: 106201
2010-06-17 01:50:39 +00:00
Bruno Cardoso Lopes
e05b953fcd For a tablegen expression such as !if(a,b,c), let 'a'
be evaluated for 'bit' operators

llvm-svn: 106185
2010-06-17 00:31:36 +00:00
Alexis Hunt
3d6b8fba2f Fix the typo in my previous one-line commit.
llvm-svn: 106179
2010-06-17 00:10:16 +00:00
Alexis Hunt
a2dbaedfe6 Make sure CMake can build the files added by my previous commit.
llvm-svn: 106178
2010-06-16 23:52:37 +00:00
Alexis Hunt
146bbb1662 Add preliminary clang attribute generation support.
The attribute class generation support is still somewhat limited.
See the accompanying clang commit for more details.

llvm-svn: 106174
2010-06-16 23:45:50 +00:00
Bruno Cardoso Lopes
de4632839c let the '!eq' expression support 'int' and 'bit' types
llvm-svn: 106171
2010-06-16 23:24:12 +00:00
Nate Begeman
e25fc6a8e4 Make VC++ happy
llvm-svn: 106054
2010-06-15 22:10:31 +00:00
Dale Johannesen
e60351e83a Next round of tail call changes. Register used in a tail
call must not be callee-saved; following x86, add a new
regclass to represent this.  Also fixes a couple of bugs.
Still disabled by default; Thumb doesn't work yet.

llvm-svn: 106053
2010-06-15 22:08:33 +00:00
Chris Lattner
d63128d084 generate better code in CheckComplexPattern
llvm-svn: 105970
2010-06-14 22:33:34 +00:00
Nate Begeman
9d86772d50 Add the last of the SemaChecking-gen code.
llvm-svn: 105929
2010-06-14 05:17:23 +00:00
Nate Begeman
955d383e5b Add a helping of comments
Add code for generating bits of semachecking

llvm-svn: 105907
2010-06-13 04:47:03 +00:00
Chris Lattner
3fdb8fcaeb declare a class with 'class' instead of struct to avoid tag mismatch
warnings, and don't shift by a bool.  Patch by Rizky Herucakra!

llvm-svn: 105886
2010-06-12 15:46:56 +00:00
Nate Begeman
59394ea1ed Add generic vector support for bitselect & element byteswap
llvm-svn: 105874
2010-06-12 03:09:49 +00:00
Bruno Cardoso Lopes
69141fd639 More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm)
Introduce the VEX_X field

llvm-svn: 105859
2010-06-11 23:50:47 +00:00
Bob Wilson
5e3c60fb63 Add instruction encoding for the Neon VMOV immediate instruction. This changes
the machine instruction representation of the immediate value to be encoded
into an integer with similar fields as the actual VMOV instruction.  This makes
things easier for the disassembler, since it can just stuff the bits into the
immediate operand, but harder for the asm printer since it has to decode the
value to be printed.  Testcase for the encoding will follow later when MC has
more support for ARM.

llvm-svn: 105836
2010-06-11 21:34:50 +00:00
Nate Begeman
7a1f1649b9 Add support for polynomial type, for polynomial multiply
llvm-svn: 105792
2010-06-10 18:06:07 +00:00
Bruno Cardoso Lopes
3a2d3b60e1 Teach tablegen to allow "let" expressions inside multiclasses,
providing more ways to factor out commonality from the records.

llvm-svn: 105776
2010-06-10 02:42:59 +00:00
Nate Begeman
7b0f786883 NEON support for _lane ops, and multiplies by scalar.
llvm-svn: 105769
2010-06-10 00:16:56 +00:00
Nate Begeman
905696c6eb Further refine types for operations which take scalars.
This will be used primarily by NEON shift intrinsics.

llvm-svn: 105733
2010-06-09 18:02:26 +00:00
Eric Christopher
eba31022a2 How about ULL...
llvm-svn: 105726
2010-06-09 16:16:48 +00:00
Nate Begeman
e0f6bd0055 Specialize I-Class instructions better so that we have less work to do in codegen.
Parenthesize macro args

llvm-svn: 105682
2010-06-09 05:11:55 +00:00
Nate Begeman
10b97ea32f Handle instructions which need to be #defines for the purpose of capturing constant arguments
Handle extract hi/lo with common code

llvm-svn: 105666
2010-06-09 01:09:00 +00:00
Bruno Cardoso Lopes
255fda615d Reapply r105521, this time appending "LLU" to 64 bit
immediates to avoid breaking the build.

llvm-svn: 105652
2010-06-08 22:51:23 +00:00
Nate Begeman
c470186332 Fix a valgrind error.
llvm-svn: 105600
2010-06-08 07:11:17 +00:00
Nate Begeman
8df074e074 Refine BuiltinsARM.def types a bit, we should do a better job of this to save some c++ code in CGBuiltins.
llvm-svn: 105598
2010-06-08 06:01:16 +00:00
Nate Begeman
77a2b1b8b4 ARM NEON:
fix vcvt naming
handle vdup, vcombine with generic vector code

llvm-svn: 105588
2010-06-08 00:14:42 +00:00
Nate Begeman
477813692f clang codegen support
llvm-svn: 105531
2010-06-07 16:00:37 +00:00
Chris Lattner
33d0622cdc revert r105521, which is breaking the buildbots with stuff like this:
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type

llvm-svn: 105524
2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
b05131d907 Initial AVX support for some instructions. No patterns matched
yet, only assembly encoding support.

llvm-svn: 105521
2010-06-05 03:53:24 +00:00