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812 Commits

Author SHA1 Message Date
Reid Spencer
1b7459b29d Initial version of automake Makefile.am file. 
llvm-svn: 16893
 2004-10-10 22:20:40 +00:00
Chris Lattner
2419e1d27e The person who was planning to add SSE support isn't anymore, so disable 
the -sse* options (to avoid misleading people).

Also, the stack alignment of the target doesn't depend on whether SSE is
eventually implemented, so remove a comment.

llvm-svn: 16860
 2004-10-08 22:41:46 +00:00
Chris Lattner
1291307d27 Fix a major regression from the bugfix for 2004-10-08-SelectSetCCFold.llx, 
which prevented setcc's from being folded into branches.  It appears that
conditional branchinst's CC operand is actually operand(2), not operand(0)
as we might expect. :(

llvm-svn: 16859
 2004-10-08 22:24:31 +00:00
Chris Lattner
1ac1e54bf9 Fix bug: 2004-10-08-SelectSetCCFold.llx. Normally this is hidden by the 
instcombine xform, which is why we didn't notice it before.

llvm-svn: 16840
 2004-10-08 16:34:13 +00:00
Chris Lattner
82aa8544a5 Remove debugging code, fix encoding problem. This fixes the problems 
the JIT had last night.

llvm-svn: 16766
 2004-10-06 14:31:50 +00:00
Chris Lattner
b0e465f0cb Codegen signed mod by 2 or -2 more efficiently. Instead of generating: 
t:
        mov %EDX, DWORD PTR [%ESP + 4]
        mov %ECX, 2
        mov %EAX, %EDX
        sar %EDX, 31
        idiv %ECX
        mov %EAX, %EDX
        ret

Generate:
t:
        mov %ECX, DWORD PTR [%ESP + 4]
***     mov %EAX, %ECX
        cdq
        and %ECX, 1
        xor %ECX, %EDX
        sub %ECX, %EDX
***     mov %EAX, %ECX
        ret

Note that the two marked moves are redundant, and should be eliminated by the
register allocator, but aren't.

Compare this to GCC, which generates:

t:
        mov     %eax, DWORD PTR [%esp+4]
        mov     %edx, %eax
        shr     %edx, 31
        lea     %ecx, [%edx+%eax]
        and     %ecx, -2
        sub     %eax, %ecx
        ret

or ICC 8.0, which generates:

t:
        movl      4(%esp), %ecx                                 #3.5
        movl      $-2147483647, %eax                            #3.25
        imull     %ecx                                          #3.25
        movl      %ecx, %eax                                    #3.25
        sarl      $31, %eax                                     #3.25
        addl      %ecx, %edx                                    #3.25
        subl      %edx, %eax                                    #3.25
        addl      %eax, %eax                                    #3.25
        negl      %eax                                          #3.25
        subl      %eax, %ecx                                    #3.25
        movl      %ecx, %eax                                    #3.25
        ret                                                     #3.25

We would be in great shape if not for the moves.

llvm-svn: 16763
 2004-10-06 05:01:07 +00:00
Chris Lattner
09b6b3f514 Fix a scary bug with signed division by a power of two. We used to generate: 
s:   ;; X / 4
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 1
        shr %ECX, 30
        mov %EDX, %EAX
        add %EDX, %ECX
        sar %EAX, 2
        ret

When we really meant:

s:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 1
        shr %ECX, 30
        add %EAX, %ECX
        sar %EAX, 2
        ret

Hey, this also reduces register pressure too :)

llvm-svn: 16761
 2004-10-06 04:19:43 +00:00
Chris Lattner
9258948b08 Codegen signed divides by 2 and -2 more efficiently. In particular 
instead of:

s:   ;; X / 2
        movl 4(%esp), %eax
        movl %eax, %ecx
        shrl $31, %ecx
        movl %eax, %edx
        addl %ecx, %edx
        sarl $1, %eax
        ret

t:   ;; X / -2
        movl 4(%esp), %eax
        movl %eax, %ecx
        shrl $31, %ecx
        movl %eax, %edx
        addl %ecx, %edx
        sarl $1, %eax
        negl %eax
        ret

Emit:

s:
        movl 4(%esp), %eax
        cmpl $-2147483648, %eax
        sbbl $-1, %eax
        sarl $1, %eax
        ret

t:
        movl 4(%esp), %eax
        cmpl $-2147483648, %eax
        sbbl $-1, %eax
        sarl $1, %eax
        negl %eax
        ret

llvm-svn: 16760
 2004-10-06 04:02:39 +00:00
Chris Lattner
acd213fba3 Add some new instructions. Fix the asm string for sbb32rr 
llvm-svn: 16759
 2004-10-06 04:01:02 +00:00
Chris Lattner
0228f228df * Prune #includes 
* Update comments
* Rearrange code a bit
* Finally ELIMINATE the GAS workaround emitter for Intel mode.  woot!

llvm-svn: 16647
 2004-10-04 07:31:08 +00:00
Chris Lattner
581948c8f6 Add support for emitting AT&T style .s files, and make it the default. Users 
may now choose their output format with the -x86-asm-syntax={intel|att} flag.

llvm-svn: 16646
 2004-10-04 07:24:48 +00:00
Chris Lattner
5959f4a108 Convert some missed patterns to support AT&T style 
llvm-svn: 16645
 2004-10-04 07:23:07 +00:00
Chris Lattner
a05d9f53bb Apparently the GNU assembler has a HUGE hack to be compatible with really 
old and broken AT&T syntax assemblers.  The problem with this hack is that
*SOME* forms of the fdiv and fsub instructions have the 'r' bit inverted.
This was a real pain to figure out, but is trivially easy to support: thus
we are now bug compatible with gas and gcc.

llvm-svn: 16644
 2004-10-04 07:08:46 +00:00
Chris Lattner
08098895db Fix incorrect suffix 
llvm-svn: 16642
 2004-10-04 05:20:16 +00:00
Chris Lattner
c2fc9597bd Fix some more missed suffixes and swapped operands 
llvm-svn: 16641
 2004-10-04 01:38:10 +00:00
Chris Lattner
7b15a84728 Add missing suffixes to FP instructions for AT&T mode 
llvm-svn: 16640
 2004-10-04 00:43:31 +00:00
Chris Lattner
8d44dcca97 Add support for the -x86-asm-syntax flag, which can be used to choose between 
Intel and AT&T style assembly language.  The ultimate goal of this is to
eliminate the GasBugWorkaroundEmitter class, but for now AT&T style emission
is not fully operational.

llvm-svn: 16639
 2004-10-03 20:36:57 +00:00
Chris Lattner
94780713a8 Add support to the instruction patterns for AT&T style output, which will 
hopefully lead to the death of the 'GasBugWorkaroundEmitter'.  This also
includes changes to wrap the whole file to 80 columns! Woot! :)

Note that the AT&T style output has not been tested at all.

llvm-svn: 16638
 2004-10-03 20:35:00 +00:00
Alkis Evlogimenos
3f8f30bcb8 The real x87 floating point registers should not be allocatable. They 
are only used by the stackifier when transforming FPn register
allocations to the real stack file x87 registers.

llvm-svn: 16472
 2004-09-21 21:22:11 +00:00
Misha Brukman
e877aacbaa s/ISel/X86ISel/ to have unique class names for debugging via gdb because the C++ 
front-end in gcc does not mangle classes in anonymous namespaces correctly.

llvm-svn: 16469
 2004-09-21 18:21:21 +00:00
Reid Spencer
c6a8d70cff Convert code to compile with vc7.1. 
Patch contributed by Paolo Invernizzi. Thanks Paolo!

llvm-svn: 16368
 2004-09-15 17:06:42 +00:00
Misha Brukman
9e5af08ef9 Fit long lines into 80 cols via creative space elimination 
llvm-svn: 16353
 2004-09-15 01:40:18 +00:00
Chris Lattner
aee36bb527 Revamp the Register class, and allow the use of the RegisterGroup class to 
specify aliases directly in register definitions.

Patch contributed by Jason Eckhardt!

llvm-svn: 16330
 2004-09-14 04:17:02 +00:00
Misha Brukman
ec87a61944 Fix filename: Printer.cpp has become X86AsmPrinter.cpp 
llvm-svn: 16299
 2004-09-12 21:26:04 +00:00
Alkis Evlogimenos
4d2b0a2b5b Use a shorter form to express implicit use/defs in FpGETRESULT and 
FpSETRESULT.

llvm-svn: 16247
 2004-09-08 18:29:31 +00:00
Alkis Evlogimenos
3540de9ea6 A call instruction should implicitely define ST0 since the return 
value is returned in that register. The pseudo instructions
FpGETRESULT and FpSETRESULT shold also have an implicity use and def
of ST0 repsecitvely.

llvm-svn: 16246
 2004-09-08 16:54:54 +00:00
Reid Spencer
c4abcbefb1 Changes For Bug 352 
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.

llvm-svn: 16137
 2004-09-01 22:55:40 +00:00
Reid Spencer
59cb27bcdc Reduce the number of arguments in the instruction builder and make some 
improvements on instruction selection that account for register and frame
index bases.

Patch contributed by Jeff Cohen. Thanks Jeff!

llvm-svn: 16110
 2004-08-30 00:13:26 +00:00
Chris Lattner
6781bb48eb Add -sse[,2,3] arguments to LLC 
llvm-svn: 16018
 2004-08-24 08:18:44 +00:00
Chris Lattner
28c7ae5697 Nuke commented out stuff 
llvm-svn: 16017
 2004-08-24 08:18:27 +00:00
Chris Lattner
64d3bc5e85 Switch from bytes to bits for alignment for consistency 
llvm-svn: 15974
 2004-08-21 20:14:13 +00:00
Chris Lattner
4427fd9a3c Reduce uses of getRegClass 
llvm-svn: 15973
 2004-08-21 20:13:52 +00:00
Chris Lattner
8c5096d223 Rename var 
llvm-svn: 15897
 2004-08-18 02:22:55 +00:00
Chris Lattner
d3d5c1d2a2 Start using alignment output routines from AsmPrinter. 
Changes to make this more similar to the ppc asmprinter

llvm-svn: 15890
 2004-08-17 19:25:42 +00:00
Chris Lattner
052cebe33c Use the AsmPrinter emitGlobalConstant. 
llvm-svn: 15872
 2004-08-17 06:48:55 +00:00
Chris Lattner
bf5dba50c5 Start using the AsmPrinter to emit our first class constants. This also 
drops our half-assed support for cygwin, which noone uses and doesn't work
anyway.

llvm-svn: 15839
 2004-08-16 23:16:06 +00:00
Chris Lattner
3383506bcc Disable the pattern isel 
llvm-svn: 15787
 2004-08-15 23:02:17 +00:00
Chris Lattner
555a585fd8 Code insertion methods now return void instead of an int. 
llvm-svn: 15780
 2004-08-15 22:15:11 +00:00
Chris Lattner
e58190f5f6 These methods no longer take a TargetRegisterClass* operand. 
llvm-svn: 15774
 2004-08-15 21:56:44 +00:00
Nate Begeman
fabece673b Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent 
llvm-svn: 15739
 2004-08-14 22:05:10 +00:00
Chris Lattner
5e7e9b6c26 Remove a bunch of ad-hoc target-specific flags that were only used by the 
old asmprinter.

llvm-svn: 15660
 2004-08-11 07:12:04 +00:00
Chris Lattner
b09bc9d4e3 Remove a dead method 
llvm-svn: 15659
 2004-08-11 07:07:14 +00:00
Chris Lattner
3fc9d4490c Finally, the entire instruction asmprinter is now generated from tblgen, woo! 
llvm-svn: 15658
 2004-08-11 07:02:04 +00:00
Chris Lattner
3cef2f82ff Add asmprintergen support for the last X86 instruction that needs it: pcrelative calls. 
llvm-svn: 15657
 2004-08-11 06:59:12 +00:00
Chris Lattner
309873fed0 This file is long dead 
llvm-svn: 15656
 2004-08-11 06:55:12 +00:00
Chris Lattner
9c171be048 Scrunch memoperands, add a few more for floating point memops 
Eliminate the FPI*m classes, converting them to use FPI instead.

llvm-svn: 15655
 2004-08-11 06:50:10 +00:00
Chris Lattner
f34003128d Move hacks up 
llvm-svn: 15654
 2004-08-11 06:09:55 +00:00
Chris Lattner
b287047c3f Make FPI take asm string and operand list 
llvm-svn: 15653
 2004-08-11 05:54:16 +00:00
Chris Lattner
c304bf7e03 Nuke the Im*i* patterns, by asmprintergenifying all users. 
llvm-svn: 15652
 2004-08-11 05:31:07 +00:00
Chris Lattner
65ab459759 X86 instructions that read-modify-write memory are not LLVM two-address instructions. 
llvm-svn: 15651
 2004-08-11 05:07:25 +00:00