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5690 Commits

Author SHA1 Message Date
Evan Cheng
17ccdcc415 Calculate the portion of reachbility matrix on demand. 
llvm-svn: 29366
 2006-07-27 22:10:00 +00:00
Evan Cheng
6a126e3adb isNonImmUse is replaced by IsFoldableBy 
llvm-svn: 29365
 2006-07-27 21:19:10 +00:00
Evan Cheng
4ceeac4159 Resolve BB references with relocation. 
llvm-svn: 29351
 2006-07-27 18:21:10 +00:00
Evan Cheng
f363ae6ebd synchronizeICache removeed from TargetJITInfo. 
llvm-svn: 29348
 2006-07-27 17:33:48 +00:00
Evan Cheng
dbcca8f422 Use reachbility information to determine whether a node can be folded into another during isel. 
llvm-svn: 29346
 2006-07-27 16:44:36 +00:00
Rafael Espindola
c0ede90402 emit global constants 
llvm-svn: 29344
 2006-07-27 11:38:51 +00:00
Evan Cheng
e869883c2d Remove NodeDepth 
llvm-svn: 29338
 2006-07-27 06:40:15 +00:00
Chris Lattner
92a0b69813 Add some advice 
llvm-svn: 29324
 2006-07-27 04:24:14 +00:00
Jim Laskey
046abcdbec Use the predicate. 
llvm-svn: 29322
 2006-07-27 02:05:13 +00:00
Nate Begeman
3d5f5b4e8b Support jump tables when in PIC relocation model 
llvm-svn: 29318
 2006-07-27 01:13:04 +00:00
Jim Laskey
f35dd1a670 Prevent creation of MachineDebugInfo for intel unless it is darwin. RC842. 
llvm-svn: 29317
 2006-07-27 01:12:23 +00:00
Evan Cheng
27c53dc36e New entry. 
llvm-svn: 29310
 2006-07-26 21:49:52 +00:00
Chris Lattner
b4165c39d7 Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC. 
llvm-svn: 29307
 2006-07-26 21:12:04 +00:00
Evan Cheng
beeb4e5c8c - Refactor the code that resolve basic block references to a TargetJITInfo 
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
  of code is emitted to flush the icache. This ensures correct execution
  on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.

llvm-svn: 29276
 2006-07-25 20:40:54 +00:00
Evan Cheng
692215be9c Can't commute shufps. The high / low parts elements come from different vectors. 
llvm-svn: 29275
 2006-07-25 20:25:40 +00:00
Rafael Espindola
2919d4ce24 implement function calling of functions with up to 4 arguments 
llvm-svn: 29274
 2006-07-25 20:17:20 +00:00
Evan Cheng
56e0c65937 Done. 
llvm-svn: 29262
 2006-07-21 23:07:23 +00:00
Rafael Espindola
9ea0bc742c implemented sub 
correctly update the stack pointer in the prologue and epilogue

llvm-svn: 29244
 2006-07-21 12:26:16 +00:00
Evan Cheng
ed1c019899 This opt is now handled in DAG combine. 
llvm-svn: 29243
 2006-07-21 08:26:46 +00:00
Evan Cheng
56434b7578 A splat of a vector constant of all zero or all one is the vector constant. 
llvm-svn: 29234
 2006-07-20 23:09:47 +00:00
Evan Cheng
a634c2b838 Missing a space. 
llvm-svn: 29233
 2006-07-20 22:52:28 +00:00
Evan Cheng
100096b2bb Clean up. 
llvm-svn: 29228
 2006-07-20 21:37:39 +00:00
Evan Cheng
6e440c39da New entry. 
llvm-svn: 29215
 2006-07-19 21:29:30 +00:00
Jim Laskey
5d139b794a Do once flag never set to true. 
llvm-svn: 29214
 2006-07-19 19:33:08 +00:00
Jim Laskey
88d7595eb3 Tidy up a few things. 
llvm-svn: 29213
 2006-07-19 19:32:06 +00:00
Jim Laskey
d31b3778d8 Reduce size of routine. Shrinks .o by 37%. 
llvm-svn: 29210
 2006-07-19 17:53:32 +00:00
Chris Lattner
0f4e4b1bcb bswapped load/store instructions are only availble in indexed addressing form. 
As such, use xoaddr (indexed only), not xaddr for address selection.

This fixes CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll, a crash compiling lencod.

llvm-svn: 29208
 2006-07-19 17:15:36 +00:00
Jim Laskey
227b585c6e Bug#834 ICE (crash in code generator?) when building PCH . 
Missing Darwin check in Intel ATT ASM printer.

llvm-svn: 29204
 2006-07-19 11:54:50 +00:00
Evan Cheng
793f3d97ff Misc. new entry. 
llvm-svn: 29202
 2006-07-19 06:06:24 +00:00
Evan Cheng
a2eaed93a0 INC / DEC instructions have shorter code size than ADD32ri8, etc. 
llvm-svn: 29194
 2006-07-19 00:27:29 +00:00
Evan Cheng
abd650f034 Add code size to target instruction use it as the 3rd isel sorting tie-breaker. 
llvm-svn: 29193
 2006-07-19 00:24:41 +00:00
Rafael Espindola
ad256854c0 initial prologue and epilogue implementation. Need to define add and sub before finishing it :-) 
llvm-svn: 29175
 2006-07-18 17:00:30 +00:00
Chris Lattner
5985b77fae Make the implicit def instructions look like other instrs. 
llvm-svn: 29174
 2006-07-18 16:33:26 +00:00
Rafael Espindola
40073f5767 skeleton of a lowerCall implementation for ARM 
llvm-svn: 29159
 2006-07-16 01:02:57 +00:00
Chris Lattner
f022962081 Remove what little AIX support we have. It has never been tested and isn't 
complete.

llvm-svn: 29156
 2006-07-15 01:24:23 +00:00
Chris Lattner
0f2560a313 Add an out-of-line virtual method for X86DwarfWriter to give it a home. 
llvm-svn: 29153
 2006-07-14 23:05:05 +00:00
Chris Lattner
ff8ee5486f Add missing PPC64 extload/truncstores 
llvm-svn: 29140
 2006-07-14 04:42:02 +00:00
Chris Lattner
9aafd2b441 Add a note 
llvm-svn: 29139
 2006-07-14 04:07:29 +00:00
Chris Lattner
5c489bce2c Another fix in the rotate encodings, needed when the first two operands are not 
the same.

llvm-svn: 29136
 2006-07-13 21:52:41 +00:00
Chris Lattner
753e4f5984 Print negative immediates as negative values instead of large constants 
when using the immshifted addressing mode.

llvm-svn: 29130
 2006-07-12 23:24:02 +00:00
Chris Lattner
726ca018c0 Fix encoding of rotates, such as rldicl 
llvm-svn: 29128
 2006-07-12 22:08:13 +00:00
Chris Lattner
024af03a3c Implement PPC64 relocations types 
llvm-svn: 29125
 2006-07-12 21:23:20 +00:00
Chris Lattner
c9be3277e7 An overaggressive #ifdef allows a function to fall off the bottom of the 
function instead of returning a value.  This sometimes allowed the ppc32 jit
to be used in 64-bit mode.

llvm-svn: 29123
 2006-07-12 20:42:10 +00:00
Chris Lattner
d0202bbed3 Add information preventing several register class constraints from working. 
This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll

llvm-svn: 29118
 2006-07-12 16:59:49 +00:00
Chris Lattner
fd9cbcab4a The PPC64 JIT needs register numbers to encode instructions. 
llvm-svn: 29114
 2006-07-11 20:53:55 +00:00
Evan Cheng
db529debec Emit inc / dec of registers as one byte instruction. 
llvm-svn: 29110
 2006-07-11 19:49:49 +00:00
Jim Laskey
d19ba2cf6c It was pointed out that DEBUG() is only available with -debug. 
llvm-svn: 29106
 2006-07-11 18:25:13 +00:00
Jim Laskey
4c0d841280 Ensure that dump calls that are associated with asserts are removed from 
non-debug build.

llvm-svn: 29105
 2006-07-11 17:58:07 +00:00
Rafael Espindola
fdfaee67f5 add the memri memory operand 
this makes it possible for ldr instructions with non-zero immediate

llvm-svn: 29103
 2006-07-11 11:36:48 +00:00
Chris Lattner
b75fe307e1 Implement the inline asm 'A' constraint. This implements PR825 and 
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll

llvm-svn: 29101
 2006-07-11 02:54:03 +00:00
Chris Lattner
2db97248f8 In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones. 
llvm-svn: 29096
 2006-07-11 00:48:23 +00:00
Evan Cheng
7c11ad2f8d New entry. 
llvm-svn: 29091
 2006-07-10 21:42:16 +00:00
Evan Cheng
b5e6a4a74d Fixed stack objects do not specify alignments, but their offsets are known. 
Use that information when doing the transformation to merge multiple loads
into a 128-bit load.

llvm-svn: 29090
 2006-07-10 21:37:44 +00:00
Chris Lattner
abaaddc214 Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps 
into i16/i32 load/stores.

llvm-svn: 29089
 2006-07-10 20:56:58 +00:00
Chris Lattner
18c77b92a9 Mark internal function static 
llvm-svn: 29085
 2006-07-10 19:53:12 +00:00
Rafael Espindola
071c83dff0 create the raddr addressing mode that matches any register and the frame index 
use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot

llvm-svn: 29079
 2006-07-10 01:41:35 +00:00
Evan Cheng
d460c903b1 Fix a typo that causes 2006-07-07-ComputeMaskedBits.ll to fail. 
llvm-svn: 29072
 2006-07-07 21:37:21 +00:00
Evan Cheng
1d48a494a2 X86 target specific DAG combine: turn build_vector (load x), (load x+4), 
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).

e.g.

__m128 test(float a, float b, float c, float d) {
  return _mm_set_ps(d, c, b, a);
}

_test:
        movups 4(%esp), %xmm0
        ret

llvm-svn: 29042
 2006-07-07 08:33:52 +00:00
Chris Lattner
da960e218f Undisable ppc64 jit 
llvm-svn: 29011
 2006-07-06 17:10:42 +00:00
Evan Cheng
a6c9288186 Added option -code-model to set code model (only used in 64-bit) mode. Valid 
values include small, kernel, medium, large, and default.

llvm-svn: 29009
 2006-07-06 01:53:36 +00:00
Evan Cheng
801ea78096 Reorg. No functionality change. 
llvm-svn: 28999
 2006-07-05 22:17:51 +00:00
Evan Cheng
d75aed0d60 Fix JIT on non MacOS X i386 systems. 
llvm-svn: 28992
 2006-07-05 07:09:13 +00:00
Andrew Lenharth
9ea557b06b These are already implemented 
llvm-svn: 28990
 2006-07-03 18:00:29 +00:00
Andrew Lenharth
98f5e9c45a 0 offsets for memory operands 
llvm-svn: 28989
 2006-07-03 17:57:34 +00:00
Evan Cheng
0df13a4f2a Should just use xorps to clear XMM registers for all data types. pxor is also one byte longer. 
llvm-svn: 28984
 2006-06-29 18:04:54 +00:00
Evan Cheng
5a7af4f99f Let X86CompilationCallback pass previous frame and return address to X86CompilationCallback2. Remove alloca hack. 
llvm-svn: 28982
 2006-06-29 01:48:36 +00:00
Evan Cheng
1d5fa40da3 Add shift and rotate by 1 instructions / patterns. 
llvm-svn: 28980
 2006-06-29 00:36:51 +00:00
Evan Cheng
803891eaa8 Always use xorps to clear XMM registers. 
llvm-svn: 28979
 2006-06-29 00:34:23 +00:00
Evan Cheng
1b53896495 Move .literal4 and .literal8 support into AsmPrinter.cpp 
llvm-svn: 28978
 2006-06-29 00:33:06 +00:00
Chris Lattner
adc7078c98 Hide x86 symbols 
llvm-svn: 28976
 2006-06-28 23:27:49 +00:00
Chris Lattner
496bd3fbf6 Use hidden visibility to make symbols in an anonymous namespace get 
dropped.  This shrinks libllvmgcc.dylib another 67K

llvm-svn: 28975
 2006-06-28 23:17:24 +00:00
Chris Lattner
26f1985fdc shrink libllvmgcc.dylib another 25K 
llvm-svn: 28971
 2006-06-28 22:00:36 +00:00
Evan Cheng
36d3fccf4b Doh. 
llvm-svn: 28963
 2006-06-28 17:56:43 +00:00
Evan Cheng
e123f47232 Oops. Need to keep CP index. 
llvm-svn: 28958
 2006-06-28 07:55:24 +00:00
Evan Cheng
3963b5ee02 Darwin puts float and double literal constants into literal4 and literal8 sections. 
llvm-svn: 28957
 2006-06-28 07:35:41 +00:00
Andrew Lenharth
ae9cbe3545 this case isn't handled 
llvm-svn: 28948
 2006-06-27 23:19:14 +00:00
Rafael Espindola
f11f34a3d6 handle the "mov reg1, reg2" case in isMoveInstr 
llvm-svn: 28945
 2006-06-27 21:52:45 +00:00
Chris Lattner
852423b469 Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :) 
llvm-svn: 28944
 2006-06-27 21:08:52 +00:00
Chris Lattner
d7b1f61e72 Fix ppc64 jump tables 
llvm-svn: 28941
 2006-06-27 20:46:17 +00:00
Evan Cheng
a37a2f781e Remove dead code. 
llvm-svn: 28938
 2006-06-27 20:34:14 +00:00
Chris Lattner
01965c2fd8 Print stubs for external globals right. 
llvm-svn: 28936
 2006-06-27 20:20:53 +00:00
Chris Lattner
2c3f67f6a7 Implement 64-bit select, bswap, etc. 
llvm-svn: 28935
 2006-06-27 20:14:52 +00:00
Chris Lattner
86c7ca4fd4 Add a pattern for i64 sra. Print 8-byte units with a space between the .quad 
and the data

llvm-svn: 28934
 2006-06-27 20:07:26 +00:00
Chris Lattner
3422f47382 Fix rewriting frame offsets with ixaddr instructions, which implicitly shift 
the offset two bits to the left.

llvm-svn: 28933
 2006-06-27 18:55:49 +00:00
Chris Lattner
8569f4042d PPC doesn't have bit converts to/from i64 
llvm-svn: 28932
 2006-06-27 18:40:08 +00:00
Chris Lattner
da08df5d8a Add 64-bit MTCTR so that indirect calls work. 
llvm-svn: 28931
 2006-06-27 18:36:44 +00:00
Chris Lattner
20959f59cd Fix an incorrect store pattern. This fixes em3d. 
llvm-svn: 28930
 2006-06-27 18:22:50 +00:00
Chris Lattner
26f2bd4d4b Implement 64-bit undef, sub, shl/shr, srem/urem 
llvm-svn: 28929
 2006-06-27 18:18:41 +00:00
Chris Lattner
b4a636f966 Use i32 for shift amounts instead of i64. This gets bisort working. 
llvm-svn: 28927
 2006-06-27 17:34:57 +00:00
Chris Lattner
01182783c4 Add zextload from i32 -> i64, with this, perimeter works. 
llvm-svn: 28926
 2006-06-27 17:30:08 +00:00
Chris Lattner
10e71f60df Print darwin stub stuff correctly in 64-bit mode. With this, treeadd works in 
ppc64 mode!

llvm-svn: 28923
 2006-06-27 01:02:25 +00:00
Chris Lattner
a572f110b4 Fix variable shadowing issue 
llvm-svn: 28922
 2006-06-27 00:10:13 +00:00
Chris Lattner
494f476ca7 Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but 
doesn't work right).

llvm-svn: 28921
 2006-06-27 00:04:13 +00:00
Chris Lattner
c8a47e0bb0 Rearrange compares, add ADDI8, add sext from 32-to-64 bit register 
llvm-svn: 28920
 2006-06-26 23:53:10 +00:00
Chris Lattner
cbd4d14b24 Improve PPC64 calling convention support 
llvm-svn: 28919
 2006-06-26 22:48:35 +00:00
Chris Lattner
5d0654b832 Remove two more definitions 
llvm-svn: 28918
 2006-06-26 22:47:37 +00:00
Chris Lattner
209c2db6b9 remove two unused instructions. 
llvm-svn: 28917
 2006-06-26 22:44:13 +00:00
Evan Cheng
db5c7909f5 Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary. 
llvm-svn: 28910
 2006-06-24 08:36:10 +00:00
Jim Laskey
a8284f65e1 Add and sort "sections" in debug lines. This always stepping through 
code in sections other than ".text", including weak sections like ctors and
dtors.

llvm-svn: 28909
 2006-06-23 12:51:53 +00:00
Evan Cheng
d8090f4666 Eliminate unneeded parameter. 
llvm-svn: 28907
 2006-06-22 00:02:55 +00:00