RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-01 16:33:37 +01:00
Code Issues Projects Releases Wiki Activity
80,550 Commits 4 Branches 5 Tags 704 MiB
2c1ad70f1e
Commit Graph

15 Commits

Author SHA1 Message Date
Craig Topper
ab46706aa9 X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo. 
llvm-svn: 151510
 2012-02-27 01:54:29 +00:00
Craig Topper
089be4fefa Add FMA4 instructions to disassembler. 
llvm-svn: 147367
 2011-12-30 05:20:36 +00:00
Craig Topper
2cd868184c Add X86 BZHI instruction as well as BMI2 feature detection. 
llvm-svn: 142122
 2011-10-16 07:55:05 +00:00
Craig Topper
4c6357d4af Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen 
llvm-svn: 142105
 2011-10-16 03:51:13 +00:00
Craig Topper
9d32602cfd Add support in the disassembler for ignoring the L-bit on certain VEX instructions. Mark instructions that have this behavior. Fixes PR10676. 
llvm-svn: 141065
 2011-10-04 06:30:42 +00:00
Peter Collingbourne
01246536d9 Move TableGen's parser and entry point into a library 
This is the first step towards splitting LLVM and Clang's tblgen executables.

llvm-svn: 140951
 2011-10-01 16:41:13 +00:00
Craig Topper
655f8a01e6 Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700. 
llvm-svn: 140370
 2011-09-23 06:57:25 +00:00
Eli Friedman
f6cac8a620 Make the disassembler able to disassemble a bunch of instructions with names in the TableGen files containing "64" on x86-32. This includes a bunch of x87 instructions, like fld, and a bunch of SSSE3 instructions on MMX registers like pshufb. Part of PR8873. 
llvm-svn: 135337
 2011-07-16 02:41:28 +00:00
Sean Callanan
5a51ccdc0f X86 table-generator and disassembler support for the AVX 
instruction set.  This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures.  Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.

llvm-svn: 127644
 2011-03-15 01:23:15 +00:00
Michael J. Spencer
4a63404543 I swear I did a make clean and make before committing all this... 
llvm-svn: 120304
 2010-11-29 18:47:54 +00:00
Chris Lattner
45b1a1649c factor the operand list (and related fields/operations) out of 
CodeGenInstruction into its own helper class.  No functionality change.

llvm-svn: 117893
 2010-11-01 04:03:32 +00:00
Bruno Cardoso Lopes
255fda615d Reapply r105521, this time appending "LLU" to 64 bit 
immediates to avoid breaking the build.

llvm-svn: 105652
 2010-06-08 22:51:23 +00:00
Chris Lattner
33d0622cdc revert r105521, which is breaking the buildbots with stuff like this: 
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type

llvm-svn: 105524
 2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
b05131d907 Initial AVX support for some instructions. No patterns matched 
yet, only assembly encoding support.

llvm-svn: 105521
 2010-06-05 03:53:24 +00:00
Sean Callanan
18fa59f381 Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit 
incarnations), integrated into the MC framework.  

The disassembler is table-driven, using a custom TableGen backend to 
generate hierarchical tables optimized for fast decode.  The disassembler 
consumes MemoryObjects and produces arrays of MCInsts, adhering to the 
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).

The disassembler is documented in detail in

- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)

You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets.  Please let me know if you encounter any problems
with it.

llvm-svn: 91749
 2009-12-19 02:59:52 +00:00