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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-01 13:11:39 +01:00

141696 Commits

Author SHA1 Message Date
Tim Northover
9cf8f9c151 GlobalISel: simplify MachineIRBuilder interface.
MachineIRBuilder had weird before/after and beginning/end flags for the insert
point. Unfortunately the non-default means that instructions will be inserted
in reverse order which is almost never what anyone wants.

Really, I think we just want (like IRBuilder has) the ability to insert at any
C++ iterator-style point (i.e. before any instruction or before MBB.end()). So
this fixes MIRBuilders to behave like IRBuilders in this respect.

llvm-svn: 288980
2016-12-07 21:05:38 +00:00
Kostya Serebryany
5883f92f49 [libFuzzer] include FuzzerIO.h and hopefully fix the Mac build. reported by Dejan Mircevski
llvm-svn: 288979
2016-12-07 21:02:48 +00:00
Matt Arsenault
61527cb46b InstCombine: Fold bitcast of vector to FP scalar
llvm-svn: 288978
2016-12-07 20:56:11 +00:00
Chris Bieneman
98f9dd59fb [CMake] Add check for HAVE_CRASHREPORTER_INFO
This was also explicitly undef in CMake for some unknown reason.

Hopefully this one won't kill all the bots.

llvm-svn: 288977
2016-12-07 20:55:38 +00:00
Eli Friedman
781ad0c5f8 [GVNHoist] Invalidate MemDep when an instruction is moved.
See also r279907.

Fixes https://llvm.org/bugs/show_bug.cgi?id=30991 .

Differential Revision: https://reviews.llvm.org/D27493

llvm-svn: 288968
2016-12-07 19:55:59 +00:00
Michael Kuperstein
eb499fd2d5 [X86] Skip over DEBUG_VALUE while looking for start of call sequence
If we don't skip over DEBUG_VALUEs, we get differences between -g and non-g
code.

This fixes PR31242.

Differential Revision: https://reviews.llvm.org/D27485

llvm-svn: 288965
2016-12-07 19:31:08 +00:00
Michael Kuperstein
7a552839e3 [X86] Do not assume "ri" instructions always have an immediate operand
The second operand of an "ri" instruction may be an immediate, but it may
also be a globalvariable, so we should make any assumptions.

This fixes PR31271.

Differential Revision: https://reviews.llvm.org/D27481

llvm-svn: 288964
2016-12-07 19:29:18 +00:00
Chris Bieneman
ac76c41ccf Fix the apple build issue caused by r288956
Should be checking if HAVE_CRASHREPORTERCLIENT_H is defined not relying on it having a value.

llvm-svn: 288963
2016-12-07 19:28:22 +00:00
Chris Bieneman
9d6cc61c6b Revert "[CMake] Use cmakedefine01 instead of cmakedefine"
This reverts commit r288959.

Apparently using cmakedefine01 explodes.

llvm-svn: 288961
2016-12-07 19:25:38 +00:00
Chris Bieneman
4b3fdbd311 [CMake] Use cmakedefine01 instead of cmakedefine
Looks like we need a 01 value for HAVE_CRASHREPORTERCLIENT_H.

llvm-svn: 288959
2016-12-07 19:13:32 +00:00
Sanjay Patel
3a0c404a96 [InstCombine] add tests for smin+icmp; NFC
The tests that already work are folded in InstSimplify, so those
tests should be redundant and we can remove them if they don't
seem worthwhile for completeness.

llvm-svn: 288957
2016-12-07 18:56:55 +00:00
Chris Bieneman
636fc9decc [CMake] Add a check for HAVE_CRASHREPORTERCLIENT_H
The CMake build has been hardcoding this to undef forever, we shouldn't have been doing that.

llvm-svn: 288956
2016-12-07 18:53:04 +00:00
Chris Bieneman
144e4a2f00 [ObjectYAML] Support for DWARF __debug_abbrev section
This patch adds support for round-tripping DWARF debug abbreviations through the obj<->yaml tools.

llvm-svn: 288955
2016-12-07 18:52:59 +00:00
Simon Pilgrim
e88a47ae36 [SelectionDAG] Add knownbits support for vector demandedelts in SMAX/SMIN/UMAX/UMIN opcodes
llvm-svn: 288926
2016-12-07 17:54:00 +00:00
Simon Pilgrim
126eaabca6 [X86] Add knownbits vector UMAX test
In preparation for demandedelts support

llvm-svn: 288920
2016-12-07 17:21:13 +00:00
Simon Pilgrim
f5b8df1991 [X86][SSE] Remove AND -> VZEXT combine
This is now performed more generally by the target shuffle combine code.

Already covered by tests that were originally added in D7666/rL229480 to support combineVectorZext (or VectorZextCombine as it was known then....).

Differential Revision: https://reviews.llvm.org/D27510

llvm-svn: 288918
2016-12-07 17:02:41 +00:00
Simon Pilgrim
1411a026a3 [SelectionDAG] Add knownbits support for EXTRACT_VECTOR_ELT opcodes
llvm-svn: 288916
2016-12-07 16:28:21 +00:00
Simon Pilgrim
219f636fa6 [SelectionDAG] Removed old knownbits TODO comment. NFCI.
EXTRACT_VECTOR_ELT does support demanded elts if the element index is known and in range.

llvm-svn: 288913
2016-12-07 15:31:12 +00:00
Simon Pilgrim
b1e761e269 [X86] Add test to show missed opportunities to calculate knownbits in INSERT_VECTOR_ELT
llvm-svn: 288912
2016-12-07 15:27:18 +00:00
Simon Pilgrim
bf5b95573e [X86][SSE] Fix vpextrd/vpextrq checks
They were testing for the pre-vex versions

llvm-svn: 288911
2016-12-07 15:10:05 +00:00
Simon Pilgrim
cbc90cda92 [X86][SSE] Force execution domain of 32-bit extractps/pextrd in the stack folding tests
llvm-svn: 288910
2016-12-07 15:06:14 +00:00
Matthew Simpson
aa3b094d0c [LV] Scalarize operands of predicated instructions
This patch attempts to scalarize the operand expressions of predicated
instructions if they were conditionally executed in the original loop. After
scalarization, the expressions will be sunk inside the blocks created for the
predicated instructions. The transformation essentially performs
un-if-conversion on the operands.

The cost model has been updated to determine if scalarization is profitable. It
compares the cost of a vectorized instruction, assuming it will be
if-converted, to the cost of the scalarized instruction, assuming that the
instructions corresponding to each vector lane will be sunk inside a predicated
block, possibly avoiding execution. If it's more profitable to scalarize the
entire expression tree feeding the predicated instruction, the expression will
be scalarized; otherwise, it will be vectorized. We only consider the cost of
the entire expression to accurately estimate the cost of the required
insertelement and extractelement instructions.

Differential Revision: https://reviews.llvm.org/D26083

llvm-svn: 288909
2016-12-07 15:03:32 +00:00
Benjamin Kramer
82b46ec969 Try unbreaking the MSVC build.
llvm-svn: 288907
2016-12-07 13:35:11 +00:00
Simon Pilgrim
5b3e59e02c [X86][SSE] Regenerate test.
llvm-svn: 288906
2016-12-07 13:05:04 +00:00
Dylan McKay
60a412a963 [AVR] Expand 'SELECT_CC' nodes whereever possible
llvm-svn: 288905
2016-12-07 12:34:47 +00:00
Benjamin Kramer
9bd6c2d03b [LowerTypeTests] Use the TrailingObjects infrastructure for trailing objects.
Also avoid allocating ~3x as much memory as needed.

llvm-svn: 288904
2016-12-07 12:31:45 +00:00
Andrea Di Biagio
a466d9dd9e When GVN removes a redundant load, it should not modify the debug location of the dominating load.
In the case of a fully redundant load LI dominated by an equivalent load V, GVN
should always preserve the original debug location of V. Otherwise, we risk to
introduce an incorrect stepping.
If V has debug info, then clearly it should not be modified. If V has a null
debugloc, then it is still potentially incorrect to propagate LI's debugloc
because LI may not post-dominate V.

Differential Revision: https://reviews.llvm.org/D27468

llvm-svn: 288903
2016-12-07 12:31:36 +00:00
Simon Pilgrim
314df45c83 [X86][SSE] Consistently set MOVD/MOVQ load/store/move instructions to integer domain
We are being inconsistent with these instructions (and all their variants.....) with a random mix of them using the default float domain.

Differential Revision: https://reviews.llvm.org/D27419

llvm-svn: 288902
2016-12-07 12:10:49 +00:00
Andrea Di Biagio
2cd6941e72 [InlineFunction] Refactor code in function `fixupLineNumbers' as suggested by David in D27462. NFC
llvm-svn: 288901
2016-12-07 12:01:45 +00:00
Simon Dardis
e4e0e85417 [mips][rtdyld] Merge code to write relocated values to the section. NFC
Preparation work for implementing N32 support.

Patch By: Daniel Sanders

Reviewers: vkalintiris, atanasyan

Differential Revision: https://reviews.llvm.org/D27460

llvm-svn: 288900
2016-12-07 11:41:23 +00:00
Dylan McKay
e38eed36e2 [AVR] Move a pseudo expansion test into a folder
llvm-svn: 288899
2016-12-07 11:21:45 +00:00
Simon Pilgrim
bb13df0fc4 [X86][XOP] Fix VPERMIL2 non-constant pool shuffle decoding (PR31296)
The non-constant pool version of DecodeVPERMIL2PMask was not offsetting correctly for the second input. I've updated the code to match the implementation in the constant-pool version.

Annoyingly this bug was hidden for so long as it's tricky to combine to useful variable shuffle masks that don't become constant-pool entries.

llvm-svn: 288898
2016-12-07 11:19:00 +00:00
Dylan McKay
8e5826c4b7 [AVR] Allow loading from stack slots where src and dest registers are identical
Fixes PR 31256

llvm-svn: 288897
2016-12-07 11:08:56 +00:00
Andrea Di Biagio
15b634f111 [InlineFunction] Do not propagate the callsite debug location to instructions inlined from functions with debug info.
When a function F is inlined, InlineFunction extends the debug location of every
instruction inlined from F by adding an InlinedAt.

However, if an instruction has a 'null' debug location, InlineFunction would
propagate the callsite debug location to it. This behavior existed since
revision 210459.

Revision 210459 was originally committed specifically to workaround the lack of
debug information for instructions inlined from intrinsic functions (which are
usually declared with attributes `__always_inline__, __nodebug__`).

The problem with revision 210459 is that it doesn't make any sort of distinction
between instructions inlined from a 'nodebug' function and instructions which
are inlined from a function built with debug info. This issue may lead to
incorrect stepping in the debugger.

This patch works under the assumption that a nodebug function does not have a
DISubprogram. When a function F is inlined into another function G,
InlineFunction checks if F has debug info associated with it.

For nodebug functions, the InlineFunction logic is unchanged (i.e. it would
still propagate the callsite debugloc to the inlined instructions). Otherwise,
InlineFunction no longer propagates the callsite debug location.

Differential Revision: https://reviews.llvm.org/D27462

llvm-svn: 288895
2016-12-07 10:37:26 +00:00
Chandler Carruth
793cb2eb5e [PM] Add some more logging to make it more clear when the CGSCC
infrastrucutre is skipping SCCs and RefSCCs.

llvm-svn: 288894
2016-12-07 10:33:15 +00:00
Philip Reames
3552af6249 Reintroduce a check accidentally removed in 288873 to fix clang bots
I believe this is the cause of the failure, but have not been able to confirm.  Note that this is a speculative fix; I'm still waiting for a full build to finish as I synced and ended up doing a clean build which takes 20+ minutes on my machine.

llvm-svn: 288886
2016-12-07 04:48:50 +00:00
Philip Reames
3e71852129 Fix a warning introduced in r288874
llvm-svn: 288884
2016-12-07 04:11:22 +00:00
Peter Collingbourne
04abb3931e LowerTypeTests: Add a test that covers "unsatisfiable" type metadata.
llvm-svn: 288881
2016-12-07 03:04:34 +00:00
Tom Stellard
42afa7429f AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.
Patch By: Wei Ding

Summary: This patch fixes the fdiv precision issues.

Reviewers: b-sumner, cfang, wdng, arsenm

Subscribers: kzhuravl, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D26424

llvm-svn: 288879
2016-12-07 02:42:15 +00:00
Haicheng Wu
20ce778776 [AArch64] Correct the check of signed 9-bit imm in isLegalAddressingMode()
In the addressing mode, signed 9-bit imm is [-256, 255], not [-512, 511].

Differential Revision: https://reviews.llvm.org/D27480

llvm-svn: 288876
2016-12-07 01:45:04 +00:00
Chandler Carruth
6b77c16592 [LCG] Add basic verification of the parent set and fix bugs it uncovers.
The existing unittests actually cover this now that we verify things.

llvm-svn: 288875
2016-12-07 01:42:40 +00:00
Philip Reames
f8e24fc0ad [LVI] Remove used return value from markX functions
llvm-svn: 288874
2016-12-07 01:03:56 +00:00
Philip Reames
561d485ae8 [LVI] Simplify mergeIn code
Remove the unused return type, use early return, use assignment operator.

llvm-svn: 288873
2016-12-07 00:54:21 +00:00
Philip Reames
76da489ca7 [LVI] Simplify obfuscated code
It doesn't matter why something is overdefined if it is...

llvm-svn: 288871
2016-12-07 00:28:28 +00:00
Peter Collingbourne
afba516b78 IR: Reduce the amount of boilerplate required for a metadata kind. NFCI.
llvm-svn: 288867
2016-12-06 23:53:01 +00:00
Tom Stellard
4f6c2a6b37 AMDGPU: Add llvm.amdgcn.interp.mov intrinsic
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D26725

llvm-svn: 288865
2016-12-06 23:52:13 +00:00
Davide Italiano
c73cdfec3c [llc] Fix -stop-after=consthoist initializing the pass.
llvm-svn: 288864
2016-12-06 23:49:58 +00:00
Matt Arsenault
432b06cd5e AMDGPU: Fix crash on i16 constant expression
llvm-svn: 288861
2016-12-06 23:18:06 +00:00
Peter Collingbourne
2dcec70e56 LowerTypeTests: Improve performance by optimising type metadata queries.
Requesting metadata for a global is a relatively expensive operation as it
involves a map lookup, but it's one that we need to do relatively frequently in
this pass to collect the list of type metadata nodes associated with a global.
This change improves the performance of type metadata queries by prebuilding
data structures that keep the global together with its list of type metadata,
and changing the pass to use that data structure wherever we were previously
passing global references around.

This change also eliminates some O(N^2) behavior by collecting the list of
globals associated with each type identifier during the first pass over the
list of globals rather than visiting each global to compute that list every
time we add a new type identifier.

Reduces pass runtime on a module containing Chrome's vtables from over 60s
to 0.9s.

Differential Revision: https://reviews.llvm.org/D27484

llvm-svn: 288859
2016-12-06 23:02:13 +00:00
Simon Pilgrim
7c63501236 [X86][XOP] Add test case for PR31296
llvm-svn: 288858
2016-12-06 22:50:13 +00:00