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46 Commits

Author SHA1 Message Date
Colin LeMahieu
d875c88104 [Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding. 
The usual way to get a 32-bit relocation is to use a constant extender which doubles the size of the instruction, 4 bytes to 8 bytes.

Another way is to put a .word32 and mix code and data within a function.  The disadvantage is it's not a valid instruction encoding and jumping over it causes prefetch stalls inside the hardware.

This relocation packs a 23-bit value in to an "r0 = add(rX, #a)" instruction by overwriting the source register bits.  Since r0 is the return value register, if this instruction is placed after a function call which return void, r0 will be filled with an undefined value, the prefetch won't be confused, and the callee can access the constant value by way of the link register.

llvm-svn: 261006
 2016-02-16 20:38:17 +00:00
Hemant Kulkarni
2e703c67d0 [llvm-readobj] Option to emit readelf like output 
New option --elf-output-style=LLVM or GNU
Enables -file-headers in readelf style when elf-output-style=GNU

Differential revision: http://reviews.llvm.org/D14128

llvm-svn: 260430
 2016-02-10 20:40:55 +00:00
Hemant Kulkarni
7bee7c2cd0 Revert "[llvm-readobj] Option to emit readelf like output" 
This reverts commit a58765909660a7195b32e0cc8c7476168b913750.

llvm-svn: 260397
 2016-02-10 18:21:01 +00:00
Hemant Kulkarni
212037f7cf [llvm-readobj] Option to emit readelf like output 
New option --elf-output-style=LLVM or GNU
Enables -file-headers in readelf style when elf-output-style=GNU

Differential revision: http://reviews.llvm.org/D14128

llvm-svn: 260391
 2016-02-10 17:51:28 +00:00
Colin LeMahieu
7d2b0f70e8 [Hexagon] Fixing relocation generation and adding tests. 
llvm-svn: 260259
 2016-02-09 19:18:02 +00:00
Dimitry Andric
0614f2a55e Fix several accidental DOS line endings in source files 
Summary:
There are a number of files in the tree which have been accidentally checked in with DOS line endings.  Convert these to native line endings.

There are also a few files which have DOS line endings on purpose, and I have set the svn:eol-style property to 'CRLF' on those.

Reviewers: joerg, aaron.ballman

Subscribers: aaron.ballman, sanjoy, dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D15848

llvm-svn: 256707
 2016-01-03 17:22:03 +00:00
Krzysztof Parzyszek
05b71c2abd [Hexagon] Add PIC support 
llvm-svn: 256025
 2015-12-18 20:19:30 +00:00
Colin LeMahieu
6fa2fb1266 [Hexagon] Adding shuffling resources for HVX instructions and tests for instruction encodings. 
llvm-svn: 254652
 2015-12-03 21:44:28 +00:00
Colin LeMahieu
13e1aefc6a [Hexagon] NFC. Adding a number of packet correctness tests. 
llvm-svn: 253000
 2015-11-13 01:46:06 +00:00
Colin LeMahieu
616a607af7 [Hexagon] Adding relaxation functionality to backend and test. 
llvm-svn: 252989
 2015-11-13 01:12:25 +00:00
Colin LeMahieu
d19ec9f018 [Hexagon] Adding checks for values out of operand range and correct new-value producer usage. 
llvm-svn: 252969
 2015-11-12 23:28:01 +00:00
Colin LeMahieu
76d358ddac [Hexagon] Adding test to make sure labels and register pairs are correctly parsed. 
llvm-svn: 252968
 2015-11-12 22:54:14 +00:00
Colin LeMahieu
145827ad73 [Hexagon] Adding instruction aliases and tests. 
llvm-svn: 252579
 2015-11-10 01:58:26 +00:00
Colin LeMahieu
6b18080d94 [Hexagon] Fixing compound register printing and reenabling more tests. 
llvm-svn: 252574
 2015-11-10 00:51:56 +00:00
Colin LeMahieu
fab9e4fee9 [Hexagon] Fixing store instructions and reenabling a few more tests. 
llvm-svn: 252561
 2015-11-10 00:22:00 +00:00
Colin LeMahieu
caeaa3d918 [Hexagon] Fixing load instruction parsing and reenabling tests. 
llvm-svn: 252555
 2015-11-10 00:02:27 +00:00
Colin LeMahieu
350f96d137 [Hexagon] Enabling ASM parsing on Hexagon backend and adding instruction parsing tests. General updating of the code emission. 
llvm-svn: 252443
 2015-11-09 04:07:48 +00:00
Krzysztof Parzyszek
ac227e7544 [Hexagon] Split double registers 
llvm-svn: 250549
 2015-10-16 20:38:54 +00:00
Colin LeMahieu
b9726af751 [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing. 
llvm-svn: 239161
 2015-06-05 16:00:11 +00:00
Colin LeMahieu
084c4d499d [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. 
llvm-svn: 238556
 2015-05-29 14:44:13 +00:00
Krzysztof Parzyszek
bcfafa313d Expand MUX instructions early on Hexagon 
This time with all files included.

llvm-svn: 233696
 2015-03-31 13:35:12 +00:00
Krzysztof Parzyszek
a45218861d Revert 233694. Weak SVN-fu. 
llvm-svn: 233695
 2015-03-31 13:32:32 +00:00
Krzysztof Parzyszek
c520a7c528 Expand MUX instructions early on Hexagon 
llvm-svn: 233694
 2015-03-31 13:29:17 +00:00
Colin LeMahieu
2b8dd30859 [Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings. 
llvm-svn: 223800
 2014-12-09 18:16:49 +00:00
Colin LeMahieu
0872710917 [Hexagon] Adding cmp* immediate form instructions. 
llvm-svn: 222849
 2014-11-26 19:43:12 +00:00
Colin LeMahieu
1f8cdbb85d [Hexagon] Adding and64, or64, and xor64 instructions. 
llvm-svn: 222846
 2014-11-26 18:55:59 +00:00
Colin LeMahieu
535f692186 [Hexagon] Adding add64 and sub64 instructions. 
llvm-svn: 222795
 2014-11-25 22:15:44 +00:00
Colin LeMahieu
732a0febbc Reverting 222792 
llvm-svn: 222793
 2014-11-25 21:39:57 +00:00
Colin LeMahieu
bf565f821c [Hexagon] Adding compare with immediate instructions. 
llvm-svn: 222792
 2014-11-25 21:30:28 +00:00
Colin LeMahieu
4ed8312072 [Hexagon] [NFC] Adding trailing whitespace to test files. 
llvm-svn: 222785
 2014-11-25 20:22:24 +00:00
Colin LeMahieu
9b0719975d [Hexagon] Adding C2_mux instruction. 
llvm-svn: 222784
 2014-11-25 20:20:09 +00:00
Colin LeMahieu
4a42d4abd9 [Hexagon] Replacing cmp* instructions with ones that contain encoding bits. 
llvm-svn: 222771
 2014-11-25 18:20:52 +00:00
Colin LeMahieu
1dc5a7ca7c [Hexagon] Adding asrh instruction, removing unused multiclasses. 
llvm-svn: 222670
 2014-11-24 18:04:42 +00:00
Colin LeMahieu
b3868ebb81 [Hexagon] Adding aslh instruction. 
llvm-svn: 222668
 2014-11-24 17:44:19 +00:00
Colin LeMahieu
e1cd9ff6b5 [Hexagon] Adding zxth instruction. 
llvm-svn: 222662
 2014-11-24 17:11:34 +00:00
Colin LeMahieu
80e59674e9 [Hexagon] Adding zxtb instruction. 
llvm-svn: 222660
 2014-11-24 16:48:43 +00:00
Colin LeMahieu
4986bc53c5 [Hexagon] Adding sxth instruction. 
llvm-svn: 222577
 2014-11-21 21:54:59 +00:00
Colin LeMahieu
9a7b747bf6 [Hexagon] Adding sxtb instruction. Renaming some identically named classes that will be removed after converting referencing defs. 
llvm-svn: 222575
 2014-11-21 21:35:52 +00:00
Colin LeMahieu
384b462d47 [Hexagon] Adding A2_xor instruction with IR selection pattern and test. 
llvm-svn: 222399
 2014-11-19 23:22:23 +00:00
Colin LeMahieu
35e8a8aa73 [Hexagon] Adding A2_or instruction with IR selection pattern and test. 
llvm-svn: 222396
 2014-11-19 22:58:04 +00:00
Colin LeMahieu
f815ca1b0b [Hexagon] Adding A2_and instruction. 
llvm-svn: 222274
 2014-11-18 22:45:47 +00:00
Colin LeMahieu
1d74e8f01b [Hexagon] Adding A2_sub instruction 
Renaming test files.

llvm-svn: 222263
 2014-11-18 21:51:51 +00:00
Colin LeMahieu
f7ca7f6c70 [Hexagon] Converting from ADD_rr to A2_add which has encoding bits. 
Adding test to show correct instruction selection and encoding.

llvm-svn: 222249
 2014-11-18 20:28:11 +00:00
Colin LeMahieu
02f427b6fb [Hexagon] Adding basic Hexagon ELF object emitter. 
llvm-svn: 221465
 2014-11-06 17:05:51 +00:00
Jyotsna Verma
9134441949 reverting r209132 
llvm-svn: 209139
 2014-05-19 16:22:11 +00:00
Jyotsna Verma
dc58cfbd79 Hexagon: Add encoding bits to the mpy instructions. 
llvm-svn: 209132
 2014-05-19 15:32:07 +00:00