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Author SHA1 Message Date
Duraid Madina
2d7d85ca13 I bet pinski knows why g++ accepts this stuff 
llvm-svn: 25022
 2005-12-26 14:23:22 +00:00
Duraid Madina
7cb522e3e8 getting there... 
llvm-svn: 25021
 2005-12-26 13:48:44 +00:00
Duraid Madina
d7f51144d0 more standards compliance (damn, I can't wait for unordered_set (tee hee) 
and unordered_map to make it into the standard)

Hurry up, JTC1 SC22 WG21 Library Working Group!

llvm-svn: 25020
 2005-12-26 13:34:00 +00:00
Duraid Madina
a5fef30feb I laugh at your dual-core G5s! Fear my precompiled headers. 
llvm-svn: 25019
 2005-12-26 10:34:38 +00:00
Duraid Madina
c3f59ae4fb dum de dum 
llvm-svn: 25018
 2005-12-26 10:24:15 +00:00
Evan Cheng
231b11ba87 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Duraid Madina
a7fad54b4f i love xmas!!!! *;D* 
llvm-svn: 25016
 2005-12-26 08:36:53 +00:00
Duraid Madina
07a3df77d0 more HP-UX cleanliness 
llvm-svn: 25015
 2005-12-26 08:35:06 +00:00
Duraid Madina
b8be651393 more standards-compliance stuff 
llvm-svn: 25014
 2005-12-26 05:08:55 +00:00
Duraid Madina
210d54c990 HP aCC chokes on this, but it's not required anyway: according to 
the bzip2 homepage, only ancient (gcc 2.7.x ?) versions of GCC
require this? It certainly isn't needed for the current bzip2
sources.

llvm-svn: 25013
 2005-12-26 05:00:25 +00:00
Duraid Madina
392483ef73 MERRY CHRISTMAS EVERYONE!!! (what better way to spend christmas than 
to try building LLVM on HP-UX! (the Right Way seems to be to tear out
the ancient STL that HP ship and use http://incubator.apache.org/stdcxx/ )

llvm-svn: 25012
 2005-12-26 04:56:16 +00:00
Andrew Lenharth
f8a6d19367 add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG 
llvm-svn: 25011
 2005-12-25 17:36:48 +00:00
Duraid Madina
303d3f1f96 unbreak calls, a few more tests should run. Tomorrow: bugpoint! 
llvm-svn: 25010
 2005-12-25 14:09:08 +00:00
Duraid Madina
00fbe7a7e4 we don't feed our call instructions extra operands 
llvm-svn: 25009
 2005-12-25 14:07:01 +00:00
Andrew Lenharth
9e8f45d185 All that just to lower div and rem 
llvm-svn: 25008
 2005-12-25 01:34:27 +00:00
Andrew Lenharth
a639cb7176 allow custom lowering to return null for legal results 
llvm-svn: 25007
 2005-12-25 01:07:37 +00:00
Andrew Lenharth
5cf1fcb844 Support Custom lowering of a few more operations. 
Alpha needs to custom lower *DIV and *REM

llvm-svn: 25006
 2005-12-24 23:42:32 +00:00
Andrew Lenharth
b42cc57048 support targetexternalsym 
llvm-svn: 25005
 2005-12-24 23:36:59 +00:00
Evan Cheng
cd69c81c5e Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass. 
llvm-svn: 25004
 2005-12-24 09:48:35 +00:00
Andrew Lenharth
1e6795bc0c All addressing modes are now exposed. The only remaining relocated forms 
are for function prologue.

TODO: move external symbols over to using RelLit.
    : have a pattern that matches constpool|globaladdr
    : have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
 2005-12-24 08:29:32 +00:00
Andrew Lenharth
588bd3f659 Unify the patterns for loads and stores. Now offset addressing should be 
supported.  This almost completes memory operations.

llvm-svn: 25002
 2005-12-24 07:34:33 +00:00
Andrew Lenharth
f4c74093bb Let's see if we can break things. 
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.

llvm-svn: 25001
 2005-12-24 05:36:33 +00:00
Andrew Lenharth
5ce2a6c2cf move loads and stores over. Smart addr selection comming 
llvm-svn: 25000
 2005-12-24 03:41:56 +00:00
Nate Begeman
96c7e22231 Fix one of the things in the todo file, and get a bit closer to folding 
constant offsets from statics into the address arithmetic.

llvm-svn: 24999
 2005-12-24 01:00:15 +00:00
Reid Spencer
f3ce91c4b7 For PR625: 
Don't install contents of CVS directories and don't double install when
srcdir == objdir.

llvm-svn: 24998
 2005-12-23 22:27:56 +00:00
Evan Cheng
d87688fe72 * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)

llvm-svn: 24997
 2005-12-23 22:14:32 +00:00
Evan Cheng
bd79f871a2 * Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG 
support which is fragile.
* Fixed a number of bugs.

llvm-svn: 24996
 2005-12-23 22:11:47 +00:00
Jim Laskey
d8cc1062ed Remove redundant debug locations. 
llvm-svn: 24995
 2005-12-23 20:08:28 +00:00
Chris Lattner
d84f4721b0 this test fails 
llvm-svn: 24994
 2005-12-23 16:14:29 +00:00
Chris Lattner
70b2f56c5a this test is malformed 
llvm-svn: 24993
 2005-12-23 16:13:52 +00:00
Chris Lattner
c97655052a unbreak the build :-/ 
llvm-svn: 24992
 2005-12-23 16:12:20 +00:00
Chris Lattner
738cec7a6e not a good idea 
llvm-svn: 24991
 2005-12-23 07:37:47 +00:00
Evan Cheng
995503fc91 More X86 floating point patterns. 
llvm-svn: 24990
 2005-12-23 07:31:11 +00:00
Evan Cheng
74cf3e8823 Operand 1 of TRUNCSTORE can be any of integer and floating point types. 
llvm-svn: 24989
 2005-12-23 07:30:30 +00:00
Evan Cheng
bcfef42cd4 Allow custom lowering of LOAD, EXTLOAD, ZEXTLOAD, STORE, and TRUNCSTORE. Not 
currently used.

llvm-svn: 24988
 2005-12-23 07:29:34 +00:00
Chris Lattner
2e386f9d46 fix something-o 
llvm-svn: 24987
 2005-12-23 07:08:39 +00:00
Chris Lattner
a4a2d4c3fe implement vaarg. Varargs now should work. 
llvm-svn: 24986
 2005-12-23 06:37:38 +00:00
Chris Lattner
4e8124bd9b implement vastart. The dag isel compiles this: 
void test3(va_list Y);
void test2(int F, ...) {
  va_list X;
  va_start(X, F);
  test3(X);
}

into this:

test2:
        save -104, %o6, %o6
        st %i5, [%i6+88]
        st %i4, [%i6+84]
        st %i3, [%i6+80]
        st %i2, [%i6+76]
        st %i1, [%i6+72]
        add %i6, 72, %o0
        st %o0, [%i6+-4]
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

The simple isel emits:

test2:
        save -96, %o6, %o6
        st %i0, [%i6+68]
        st %i1, [%i6+72]
        st %i2, [%i6+76]
        st %i3, [%i6+80]
        st %i4, [%i6+84]
        st %i5, [%i6+88]
        or %g0, 1, %l0
        or %g0, 4, %l1
        umul %l0, %l1, %l0
        add %l0, 7, %l0
        and %l0, -8, %l0
        sub %o6, %l0, %o6
        add %o6, 96, %l0
        add %i6, 72, %l1
        st %l1, [%l0]
        ld [%l0], %o0
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24985
 2005-12-23 06:24:04 +00:00
Chris Lattner
73db2dc9fc remove benchmark list, remove issues addressed by the dag-dag isel 
llvm-svn: 24984
 2005-12-23 06:09:30 +00:00
Chris Lattner
0637d38ec2 Simplify store(bitconv(x)) to store(x). This allows us to compile this: 
void bar(double Y, double *X) {
  *X = Y;
}

to this:

bar:
        save -96, %o6, %o6
        st %i1, [%i2+4]
        st %i0, [%i2]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        st %i1, [%i6+-4]
        st %i0, [%i6+-8]
        ldd [%i6+-8], %f0
        std  %f0, [%i2]
        restore %g0, %g0, %g0
        retl
        nop

on sparcv8.

llvm-svn: 24983
 2005-12-23 05:48:07 +00:00
Chris Lattner
20e6338732 fold (conv (load x)) -> (load (conv*)x). 
This allows us to compile this:
void foo(double);
void bar(double *X) { foo(*X); }

To this:

bar:
        save -96, %o6, %o6
        ld [%i0+4], %o1
        ld [%i0], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        ldd [%i0], %f0
        std %f0, [%i6+-8]
        ld [%i6+-4], %o1
        ld [%i6+-8], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on SparcV8.

llvm-svn: 24982
 2005-12-23 05:44:41 +00:00
Chris Lattner
28887b3ca6 Fold bitconv(bitconv(x)) -> x. We now compile this: 
void foo(double);
void bar(double X) { foo(X); }

to this:

bar:
        save -96, %o6, %o6
        or %g0, %i0, %o0
        or %g0, %i1, %o1
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -112, %o6, %o6
        st %i1, [%i6+-4]
        st %i0, [%i6+-8]
        ldd [%i6+-8], %f0
        std %f0, [%i6+-16]
        ld [%i6+-12], %o1
        ld [%i6+-16], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on V8.

llvm-svn: 24981
 2005-12-23 05:37:50 +00:00
Chris Lattner
9ee4ecfe74 constant fold bits_convert in getNode and in the dag combiner for fp<->int 
conversions.  This allows V8 to compiles this:

void %test() {
        call float %test2( float 1.000000e+00, float 2.000000e+00, double 3.000000e+00, double* null )
        ret void
}

into:

test:
        save -96, %o6, %o6
        sethi 0, %o3
        sethi 1049088, %o2
        sethi 1048576, %o1
        sethi 1040384, %o0
        or %g0, %o3, %o4
        call test2
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of:

test:
        save -112, %o6, %o6
        sethi 0, %o4
        sethi 1049088, %l0
        st %o4, [%i6+-12]
        st %l0, [%i6+-16]
        ld [%i6+-12], %o3
        ld [%i6+-16], %o2
        sethi 1048576, %o1
        sethi 1040384, %o0
        call test2
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24980
 2005-12-23 05:30:37 +00:00
Chris Lattner
8e80a247ff make sure bit_convert's are expanded 
llvm-svn: 24979
 2005-12-23 05:15:23 +00:00
Chris Lattner
8b2bd265f4 make sure bit_converts are expanded 
llvm-svn: 24978
 2005-12-23 05:13:35 +00:00
Jeff Cohen
fcce4dc8b6 Get bugpoint building with VC++ again. 
llvm-svn: 24977
 2005-12-23 05:00:38 +00:00
Chris Lattner
e47f28d044 fix the int<->fp instructions, which apparently take a single float register 
to represent the int part (because it's always 32-bits)

llvm-svn: 24976
 2005-12-23 05:00:16 +00:00
Chris Lattner
aaeb6774c7 Use BIT_CONVERT to simplify this code 
llvm-svn: 24975
 2005-12-23 02:31:39 +00:00
Chris Lattner
3c4a3dd86e Simplify some code by using BIT_CONVERT 
llvm-svn: 24974
 2005-12-23 00:59:59 +00:00
Chris Lattner
4bcbe2d378 Fix a pasto 
llvm-svn: 24973
 2005-12-23 00:52:30 +00:00