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14473 Commits

Author SHA1 Message Date
Jim Grosbach
3908f7f2b7 Thumb2 assembly parsing and encoding for ORR. 
llvm-svn: 139742
 2011-09-14 21:43:57 +00:00
Jim Grosbach
4d891badcb Thumb2 assembly parsing and encoding for ORN. 
llvm-svn: 139741
 2011-09-14 21:29:54 +00:00
Jim Grosbach
528142a13d Thumb2 assembly parsing and encoding for NOP.W. 
llvm-svn: 139740
 2011-09-14 21:26:25 +00:00
Jim Grosbach
e841adae12 Thumb2 assembly parsing and encoding for MVN. 
llvm-svn: 139739
 2011-09-14 21:24:41 +00:00
Jim Grosbach
585e3c779f Thumb2 assembly parsing and encoding for MUL. 
llvm-svn: 139735
 2011-09-14 21:00:40 +00:00
Jim Grosbach
b1c70aab3e Thumb2 assembly parsing and encoding for MSR/MRS. 
Fix a bug in handling default flags for both ARM and Thumb encodings.

llvm-svn: 139721
 2011-09-14 20:03:46 +00:00
Jim Grosbach
e260140b99 Thumb2 assembly parsing and encoding for MRC/MRC2/MRRC/MRRC2. 
llvm-svn: 139717
 2011-09-14 19:28:49 +00:00
Jim Grosbach
807e68b8db Thumb2 assembly parsing and encoding for MOVT. 
llvm-svn: 139715
 2011-09-14 19:15:15 +00:00
Jim Grosbach
932d409524 Thumb2 assembly parsing for MOV in IT block. 
Select the right 16 vs. 32 bit encoding in an IT block.

llvm-svn: 139714
 2011-09-14 19:12:11 +00:00
Dan Gohman
223fdfc56f objc_retainBlock is not NoModRef because it can update forwarding pointers 
in memory relevant to the optimizer. rdar://10050579.

llvm-svn: 139708
 2011-09-14 18:13:00 +00:00
Jim Grosbach
41c8bdfdd9 ARM fix assembly parser handling of ranges in register lists. 
Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.

rdar://8883573

llvm-svn: 139707
 2011-09-14 18:08:35 +00:00
Nadav Rotem
8e3edccebe Add integer promotion support for vselect 
llvm-svn: 139692
 2011-09-14 14:42:15 +00:00
Craig Topper
60719c7bfb Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler. 
llvm-svn: 139691
 2011-09-14 06:41:26 +00:00
Craig Topper
25e81ae604 Make disassembling of VBLEND* print immediate as a XMM/YMM register name. Fixes PR10917. 
llvm-svn: 139690
 2011-09-14 05:55:28 +00:00
Craig Topper
d707457c41 Add test case for PR10851. 
llvm-svn: 139689
 2011-09-14 04:36:54 +00:00
Bruno Cardoso Lopes
3e6b9661d1 Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should yield "movsd", not "movss". 
llvm-svn: 139686
 2011-09-14 02:36:14 +00:00
Devang Patel
75c70b2315 Remove ancient debug info constructs from test cases, they are not relevant to test case's main objective. 
llvm-svn: 139675
 2011-09-14 00:29:50 +00:00
Devang Patel
f9dcd6261d Remove unnecessary old test. 
llvm-svn: 139674
 2011-09-14 00:28:54 +00:00
Devang Patel
d8a51ce4a9 Update tests. Remove irrelevant tests. 
llvm-svn: 139658
 2011-09-13 23:07:41 +00:00
Akira Hatanaka
3d26b79a9a Delete test cases that generate code for allegrex/psp and cannot be repurposed. 
llvm-svn: 139652
 2011-09-13 22:29:13 +00:00
Owen Anderson
1037a3e60b Make use of Eli's FileCheck sorcery to improve this test. 
llvm-svn: 139645
 2011-09-13 21:37:50 +00:00
Eli Friedman
f13b5ef0e1 Error out on CodeGen of unaligned load/store. Fix test so it isn't accidentally testing that case. 
llvm-svn: 139641
 2011-09-13 20:50:54 +00:00
Owen Anderson
d0121fe635 Correct disassembly printing of Thumb2 post-incremented LDRD and STRD. 
llvm-svn: 139639
 2011-09-13 20:46:26 +00:00
Akira Hatanaka
44c745931f Add pattern used to match MipsLo, which is needed when the instruction selector 
tries to match a dead MipsLo node (explanation in the link below).

http://article.gmane.org/gmane.comp.compilers.llvm.devel/42757/match=dagcombiner+dead

llvm-svn: 139634
 2011-09-13 20:13:58 +00:00
Akira Hatanaka
1376e1eabf Disable tests which generate code for allegrex or psp. 
llvm-svn: 139632
 2011-09-13 20:00:35 +00:00
Nadav Rotem
5ea703debf update checked pattern 
llvm-svn: 139631
 2011-09-13 19:59:18 +00:00
Nadav Rotem
60df99b809 Add vselect target support for targets that do not support blend but do support 
xor/and/or (For example SSE2).

llvm-svn: 139623
 2011-09-13 19:17:42 +00:00
Owen Anderson
b4ed08c465 Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally. 
llvm-svn: 139610
 2011-09-13 17:59:19 +00:00
Owen Anderson
5982d4d51b Fix encoding of Thumb2 shifted register operands with RRX shifts. 
llvm-svn: 139606
 2011-09-13 17:34:32 +00:00
Craig Topper
03c833ff84 Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848. 
llvm-svn: 139588
 2011-09-13 06:54:58 +00:00
Andrew Trick
2e22ddc364 [indvars] Revert r139579 until 401.bzip -arch i386 miscompilation is fixed. PR10920. 
llvm-svn: 139583
 2011-09-13 05:23:49 +00:00
Andrew Trick
2bfa2824c6 Disable IV rewriting by default. See PR10916. 
llvm-svn: 139579
 2011-09-13 03:23:21 +00:00
Andrew Trick
3faad5fc36 Generalize test case to handle multiple indvars modes. 
llvm-svn: 139578
 2011-09-13 03:17:25 +00:00
Andrew Trick
a534a558a2 Generalize this test's CHECK statements to handle different indvars modes. 
llvm-svn: 139577
 2011-09-13 02:46:27 +00:00
Andrew Trick
fe292d43c0 This test only makes sense with -enable-iv-rewrite. 
llvm-svn: 139576
 2011-09-13 02:45:26 +00:00
Andrew Trick
2cc8637af2 [indvars] Fix bugs in floating point IV range checks noticed by inspection. 
llvm-svn: 139574
 2011-09-13 01:59:32 +00:00
Andrew Trick
cc7f5a609a Conditionalize indvars test that relies on SCEV expansion of geps, 
which is only relevant with canonical IVs

llvm-svn: 139556
 2011-09-12 23:13:57 +00:00
Bruno Cardoso Lopes
eb09ab7c3f Change testcase commandline to be more strict and silence buildbots 
llvm-svn: 139554
 2011-09-12 22:59:26 +00:00
Bruno Cardoso Lopes
a4d2bdfa40 Fix PR10845. SUBREG_TO_REG shouldn't be used when the input and 
destination types are equal!

llvm-svn: 139553
 2011-09-12 22:59:23 +00:00
Andrew Trick
a3c28142a5 indvars test only relevant for -enable-iv-rewrite. 
Otherwise this case is now covered by no-iv-rewrite.ll.

llvm-svn: 139552
 2011-09-12 22:59:00 +00:00
Owen Anderson
ebcf543265 Fix a failing ELF Thumb test. I _think_ this is right, but it's not totally clear to me what this test is doing. Could someone on an ELF platform check? 
llvm-svn: 139549
 2011-09-12 22:40:31 +00:00
Owen Anderson
a1a10ed5c6 Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either. 
llvm-svn: 139542
 2011-09-12 21:28:46 +00:00
Bruno Cardoso Lopes
64e2e852f9 Revert the wrong part of r139528, and fix testcases. 
llvm-svn: 139541
 2011-09-12 21:24:07 +00:00
Owen Anderson
0081444d87 Fix encoding of PC-relative LDRSHW with an immediate offset. 
llvm-svn: 139537
 2011-09-12 20:36:51 +00:00
Andrew Trick
bf1bc9a077 Conditionalize indvars tests that rely on SCEV expansion of geps, 
which is relevant with canonical IVs. Anything else being checked by
these tests is already covered by early CSE.

llvm-svn: 139535
 2011-09-12 20:26:34 +00:00
Bruno Cardoso Lopes
c67e996fc3 Not sure how CMPPS and CMPPD had already ever worked, I guess it didn't. 
However with this fix it does now.

Basically the operand order for the x86 target specific node
is not the same as the instruction, but since the intrinsic need that
specific order at the instruction definition, just change the order
during legalization. Also, there were some wrong invertions of condition
codes, such as GE => LE, GT => LT, fix that too. Fix PR10907.

llvm-svn: 139528
 2011-09-12 19:30:40 +00:00
Owen Anderson
05ef2c122d Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered. 
llvm-svn: 139522
 2011-09-12 18:56:30 +00:00
Andrew Trick
efe8cdcf20 Removing indvars tests that directly test canonical IVs and nothing else. 
llvm-svn: 139518
 2011-09-12 18:33:08 +00:00
Andrew Trick
09cf4287c2 Rename -disable-iv-rewrite to -enable-iv-rewrite=false in preparation for default change. 
llvm-svn: 139517
 2011-09-12 18:28:44 +00:00
Eli Friedman
08926ecbfb Fix mistake in test runline. 
llvm-svn: 139505
 2011-09-12 17:32:58 +00:00