Anton Korobeynikov
|
2e8f54d16d
|
Revert the commit, it just hides the real bug
llvm-svn: 76045
|
2009-07-16 14:28:26 +00:00 |
|
Anton Korobeynikov
|
bbf0fe2a76
|
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
llvm-svn: 76035
|
2009-07-16 14:24:41 +00:00 |
|
Anton Korobeynikov
|
3e670f38f9
|
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
llvm-svn: 76011
|
2009-07-16 14:18:17 +00:00 |
|
Anton Korobeynikov
|
b3af53a626
|
Implement 'large' PIC model
llvm-svn: 76006
|
2009-07-16 14:16:05 +00:00 |
|
Anton Korobeynikov
|
2889a28adb
|
Implement shifts properly (hopefilly - finally!)
llvm-svn: 76005
|
2009-07-16 14:15:24 +00:00 |
|
Anton Korobeynikov
|
f48e88136e
|
Properly handle divides. As a bonus - implement memory versions of them.
llvm-svn: 76003
|
2009-07-16 14:14:33 +00:00 |
|
Anton Korobeynikov
|
e6b7c15a63
|
32 bit shifts have only 12 bit displacements
llvm-svn: 76000
|
2009-07-16 14:13:24 +00:00 |
|
Anton Korobeynikov
|
6c1091e7f3
|
Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
llvm-svn: 75990
|
2009-07-16 14:10:17 +00:00 |
|
Anton Korobeynikov
|
9a1ad49207
|
Add support for 12 bit displacements
llvm-svn: 75988
|
2009-07-16 14:09:35 +00:00 |
|
Anton Korobeynikov
|
a809635fc8
|
Emit proper lowering of load from arg stack slot
llvm-svn: 75986
|
2009-07-16 14:08:42 +00:00 |
|
Anton Korobeynikov
|
9013a1ee39
|
Implement dynamic allocas
llvm-svn: 75985
|
2009-07-16 14:08:15 +00:00 |
|
Anton Korobeynikov
|
ee8ce5b760
|
Add jump tables
llvm-svn: 75984
|
2009-07-16 14:07:50 +00:00 |
|
Anton Korobeynikov
|
ab90a05ff3
|
Add rotates
llvm-svn: 75981
|
2009-07-16 14:06:49 +00:00 |
|
Anton Korobeynikov
|
ff5b07e994
|
Add patterns for integer negate
llvm-svn: 75980
|
2009-07-16 14:06:27 +00:00 |
|
Anton Korobeynikov
|
335aeecedc
|
Provide proper patterns for and with imm instructions. Tune the tests accordingly.
llvm-svn: 75979
|
2009-07-16 14:06:00 +00:00 |
|
Anton Korobeynikov
|
49d065e9c9
|
Add 32 bit and reg-imm and disable invalid patterns for now
llvm-svn: 75978
|
2009-07-16 14:05:32 +00:00 |
|
Anton Korobeynikov
|
c9778b81c9
|
Add z9 and z10 target processors. Mark z10-only instructions as such.
llvm-svn: 75977
|
2009-07-16 14:05:00 +00:00 |
|
Anton Korobeynikov
|
1e1f1a789b
|
Proper lower 'small' results
llvm-svn: 75962
|
2009-07-16 13:58:24 +00:00 |
|
Anton Korobeynikov
|
db9fb21b48
|
Completel forgot about unconditional branches
llvm-svn: 75961
|
2009-07-16 13:57:52 +00:00 |
|
Anton Korobeynikov
|
ce2b70586e
|
Lower addresses of globals
llvm-svn: 75960
|
2009-07-16 13:57:27 +00:00 |
|
Anton Korobeynikov
|
9a57aa9c54
|
Test (incomplete) for easy muls
llvm-svn: 75959
|
2009-07-16 13:57:03 +00:00 |
|
Anton Korobeynikov
|
d984dc6c9d
|
Provide "wide" muls and divs/rems
llvm-svn: 75958
|
2009-07-16 13:56:42 +00:00 |
|
Anton Korobeynikov
|
aad6f1c75a
|
Tests for cmp / br_cc / select_cc
llvm-svn: 75949
|
2009-07-16 13:53:15 +00:00 |
|
Anton Korobeynikov
|
b4a6f3c467
|
Emit callee-saved regs spills / restores
llvm-svn: 75943
|
2009-07-16 13:51:12 +00:00 |
|
Anton Korobeynikov
|
4fcadd1a7d
|
Some preliminary call lowering
llvm-svn: 75941
|
2009-07-16 13:50:21 +00:00 |
|
Anton Korobeynikov
|
f4257ba74e
|
Prologue / epilogue emission
llvm-svn: 75940
|
2009-07-16 13:49:49 +00:00 |
|
Anton Korobeynikov
|
dd60515f11
|
Add simple frame index elimination
llvm-svn: 75939
|
2009-07-16 13:49:25 +00:00 |
|
Anton Korobeynikov
|
40a891deef
|
Provide proper test :)
llvm-svn: 75938
|
2009-07-16 13:48:59 +00:00 |
|
Anton Korobeynikov
|
5e1fa67a23
|
Add address computation stuff
llvm-svn: 75935
|
2009-07-16 13:47:59 +00:00 |
|
Anton Korobeynikov
|
47c086cc6b
|
Add mem-imm stores
llvm-svn: 75933
|
2009-07-16 13:47:14 +00:00 |
|
Anton Korobeynikov
|
b88da5c190
|
Add stores and truncstores
llvm-svn: 75931
|
2009-07-16 13:45:00 +00:00 |
|
Anton Korobeynikov
|
b262cec2d0
|
Add patterns for various extloads
llvm-svn: 75930
|
2009-07-16 13:44:30 +00:00 |
|
Anton Korobeynikov
|
f080a4a0bd
|
Add shifts and reg-imm address matching
llvm-svn: 75927
|
2009-07-16 13:43:18 +00:00 |
|
Anton Korobeynikov
|
de69aad588
|
Add bunch of 32-bit patterns... Uffff :)
llvm-svn: 75926
|
2009-07-16 13:42:31 +00:00 |
|
Rafael Espindola
|
9541db227e
|
Add tests for fixes I committed earlier to the C++ FE.
llvm-svn: 75924
|
2009-07-16 13:35:42 +00:00 |
|
Anton Korobeynikov
|
f63382b52b
|
Add bunch of reg-imm movs
llvm-svn: 75921
|
2009-07-16 13:34:50 +00:00 |
|
Anton Korobeynikov
|
dcc7d19ef3
|
Provide masked reg-imm 'or' and 'and'
llvm-svn: 75919
|
2009-07-16 13:33:57 +00:00 |
|
Anton Korobeynikov
|
4b8ed9f263
|
Fix test running lines
llvm-svn: 75918
|
2009-07-16 13:33:21 +00:00 |
|
Anton Korobeynikov
|
c98835c743
|
Add reg-reg and pattern
llvm-svn: 75917
|
2009-07-16 13:32:49 +00:00 |
|
Anton Korobeynikov
|
2688d3c0a7
|
Add sub reg-reg pattern
llvm-svn: 75916
|
2009-07-16 13:32:16 +00:00 |
|
Anton Korobeynikov
|
2dd607fca7
|
Add xor reg-reg pattern
llvm-svn: 75915
|
2009-07-16 13:31:28 +00:00 |
|
Anton Korobeynikov
|
66b2612946
|
Add or reg-reg pattern.
llvm-svn: 75914
|
2009-07-16 13:30:53 +00:00 |
|
Anton Korobeynikov
|
ca9c5365ac
|
Add add reg-reg and reg-imm patterns
llvm-svn: 75913
|
2009-07-16 13:30:15 +00:00 |
|
Anton Korobeynikov
|
7b8aec2c40
|
Add simple reg-reg and reg-imm moves
llvm-svn: 75912
|
2009-07-16 13:29:38 +00:00 |
|
Anton Korobeynikov
|
7fe1d9c90e
|
Minimal lowering for formal_arguments / ret
llvm-svn: 75911
|
2009-07-16 13:28:59 +00:00 |
|
Anton Korobeynikov
|
8b299e2ae4
|
Add testsuite dir for systemz stuff
llvm-svn: 75910
|
2009-07-16 13:28:22 +00:00 |
|
Richard Osborne
|
ee0ad3d09b
|
Combine an unaligned store of unaligned load into a memmove.
llvm-svn: 75908
|
2009-07-16 12:50:48 +00:00 |
|
Richard Osborne
|
0d65748f8f
|
Expand unaligned 32 bit loads from an address which is a constant
offset from a 32 bit aligned base as follows:
ldw low, base[offset >> 2]
ldw high, base[(offset >> 2) + 1]
shr low_shifted, low, (offset & 0x3) * 8
shl high_shifted, high, 32 - (offset & 0x3) * 8
or result, low_shifted, high_shifted
Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.
llvm-svn: 75902
|
2009-07-16 10:42:35 +00:00 |
|
Richard Osborne
|
eb8036be44
|
Custom lower unaligned 32 bit stores and loads into libcalls. This is
a big code size win since before they were expanding to upto 16
instructions.
llvm-svn: 75901
|
2009-07-16 10:21:18 +00:00 |
|
Evan Cheng
|
7a6b20df7f
|
Let callers decide the sub-register index on the def operand of rematerialized instructions.
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
llvm-svn: 75900
|
2009-07-16 09:20:10 +00:00 |
|