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Commit Graph

175668 Commits

Author SHA1 Message Date
James Henderson
2ee55aaff5 [llvm-readobj]Add additional testing for various ELF features
This patch adds testing of areas of the code that are not fully tested,
in particular dynamic table printing, ELF type printing, handling of
edge cases where things are missing/empty (relocations/program header
tables/section header table), and the --string-dump switch.

Reviewed by: grimar, higuoxing, rupprecht

Differential Revision: https://reviews.llvm.org/D58677

llvm-svn: 355003
2019-02-27 16:41:59 +00:00
Xing GUO
7e671b7580 [llvm-objdump] Should print strings when dumping DT_RPATH, DT_RUNPATH, DT_SONAME, DT_AUXILIARY and DT_FILTER tags in dynamic section.
Summary:
Before:
```
Dynamic Section:
  NEEDED               libpthread.so.0
  ...
  NEEDED               ld-linux-x86-64.so.2
  RPATH                0x00000000001c2e61
```

After:
```
Dynamic Section:
  NEEDED               libpthread.so.0
  ...
  NEEDED               ld-linux-x86-64.so.2
  RPATH                $ORIGIN/../lib
```

Only a small problem here, I have no idea on choosing test case. I see there's a test 
file(test/tools/llvm-objdump/private-headers-dynamic-section.test). But it has no DT_RPATH and DT_RUNPATH tags. Shall I replace the ELF file in the 
Inputs dir by a new one?

Reviewers: jhenderson, grimar

Reviewed By: jhenderson

Subscribers: srhines, rupprecht, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58707

llvm-svn: 355001
2019-02-27 16:37:15 +00:00
Matt Davis
2fdce41eaf [llvm-cxxfilt] Split and demangle stdin input on certain non-alphanumerics.
Summary:
This patch attempts to replicate GNU c++-filt behavior when splitting stdin input for demangling.

Previously, cxx-filt would split input only on spaces.  Each delimited item is then demangled.
From what I have tested, GNU c++filt also splits input on any character that does not make
up the mangled name (notably commas, but also a large set of non-alphanumeric characters).

This patch splits stdin input on any character that does not belong to the Itanium mangling
format (since Itanium is currently the only supported format in llvm-cxxfilt).

This is an update to PR39990

Reviewers: jhenderson, tejohnson, compnerd

Reviewed By: compnerd

Subscribers: erik.pilkington, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58416

llvm-svn: 354998
2019-02-27 16:29:50 +00:00
Nikita Popov
bce66c8454 [InstCombine] Add additional add.sat overflow tests; NFC
Baseline for D58593.

llvm-svn: 354996
2019-02-27 16:18:29 +00:00
Sanjay Patel
b66ca2fdfe [InstCombine] regenerate complete checks; NFC
llvm-svn: 354993
2019-02-27 15:59:30 +00:00
Nico Weber
571b1cee18 gn build: Merge r354989
llvm-svn: 354991
2019-02-27 15:46:51 +00:00
Nico Weber
cf711aa9cc gn build: Merge r354692
llvm-svn: 354987
2019-02-27 15:29:14 +00:00
Eugene Leviant
02f300e1b3 [DebugInfo] Apply subprogram attributes on behalf of owner CU
When using full LTO it is possible that template function definition DIE
is bound to one compilation unit and it's declaration to another. We should
add function declaration attributes on behalf of its owner CU otherwise
we may end up with malformed file identifier in function declaration 
DW_AT_decl_file attribute.

Differential revision: https://reviews.llvm.org/D58538

llvm-svn: 354978
2019-02-27 14:46:59 +00:00
Dmitry Preobrazhensky
5b0739ebd4 [AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands
See bug 37943: https://bugs.llvm.org/show_bug.cgi?id=37943

Reviewers: artem.tamazov, arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D58287

llvm-svn: 354974
2019-02-27 13:58:48 +00:00
Alexey Lapshin
279a200561 [DebugInfo] add SectionedAddress to DebugInfo interfaces.
That patch is the fix for https://bugs.llvm.org/show_bug.cgi?id=40703
   "wrong line number info for obj file compiled with -ffunction-sections"
   bug. The problem happened with only .o files. If object file contains
   several .text sections then line number information showed incorrectly.
   The reason for this is that DwarfLineTable could not detect section which
   corresponds to specified address(because address is the local to the
   section). And as the result it could not select proper sequence in the
   line table. The fix is to pass SectionIndex with the address. So that it
   would be possible to differentiate addresses from various sections. With
   this fix llvm-objdump shows correct line numbers for disassembled code.

   Differential review: https://reviews.llvm.org/D58194

llvm-svn: 354972
2019-02-27 13:17:36 +00:00
Dmitry Preobrazhensky
7710ef5c9f [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode
See bug 39331: https://bugs.llvm.org/show_bug.cgi?id=39331

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D58288

llvm-svn: 354969
2019-02-27 13:12:12 +00:00
George Rimar
25f42156b9 [llvm-objcopy] - Check for invalidated relocations when removing a section.
This is https://bugs.llvm.org/show_bug.cgi?id=40818

Removing a section that is used by relocation is an error
we did not report. The patch fixes that.

Differential revision: https://reviews.llvm.org/D58625

llvm-svn: 354962
2019-02-27 11:18:27 +00:00
Simon Pilgrim
9e6faafbd3 [X86][AVX] Only combine loads to broadcasts for legal types
Thanks to @echristo for spotting this.

llvm-svn: 354961
2019-02-27 11:17:25 +00:00
James Henderson
bc60bd01e4 [llvm-readobj]Fix error messages for bad archive members and add testing for archive handling
llvm-readobj's error messages were broken for bad archive members. This
patch fixes them, and also adds testing for archive and thin archive
handling within llvm-readobj.

Reviewed by: rupprecht, grimar, higuoxing

Differential Revision: https://reviews.llvm.org/D58681

llvm-svn: 354960
2019-02-27 11:07:08 +00:00
Simon Pilgrim
42fad8ef25 Fix Wenum-compare gcc7 warning. NFCI.
llvm-svn: 354958
2019-02-27 10:19:53 +00:00
Fangrui Song
c8c777b508 [llvm-readobj] Print DF_1_DISPRELPND
The test will be added by D58677.

llvm-svn: 354955
2019-02-27 05:37:11 +00:00
Yonghong Song
b777733b98 [BPF] Don't fail for static variables
Currently, the LLVM will print an error like
  Unsupported relocation: try to compile with -O2 or above,
  or check your static variable usage
if user defines more than one static variables in a single
ELF section (e.g., .bss or .data).

There is ongoing effort to support static and global
variables in libbpf and kernel. This patch removed the
assertion so user programs with static variables won't
fail compilation.

The static variable in-section offset is written to
the "imm" field of the corresponding to-be-relocated
bpf instruction. Below is an example to show how the
application (e.g., libbpf) can relate variable to relocations.

  -bash-4.4$ cat g1.c
  static volatile long a = 2;
  static volatile int b = 3;
  int test() { return a + b; }
  -bash-4.4$ clang -target bpf -O2 -c g1.c
  -bash-4.4$ llvm-readelf -r g1.o

  Relocation section '.rel.text' at offset 0x158 contains 2 entries:
      Offset             Info             Type               Symbol's Value  Symbol's Name
  0000000000000000  0000000400000001 R_BPF_64_64            0000000000000000 .data
  0000000000000018  0000000400000001 R_BPF_64_64            0000000000000000 .data
  -bash-4.4$ llvm-readelf -s g1.o

  Symbol table '.symtab' contains 6 entries:
     Num:    Value          Size Type    Bind   Vis      Ndx Name
       0: 0000000000000000     0 NOTYPE  LOCAL  DEFAULT  UND
       1: 0000000000000000     0 FILE    LOCAL  DEFAULT  ABS g1.c
       2: 0000000000000000     8 OBJECT  LOCAL  DEFAULT    4 a
       3: 0000000000000008     4 OBJECT  LOCAL  DEFAULT    4 b
       4: 0000000000000000     0 SECTION LOCAL  DEFAULT    4
       5: 0000000000000000    64 FUNC    GLOBAL DEFAULT    2 test
  -bash-4.4$ llvm-objdump -d g1.o

  g1.o:   file format ELF64-BPF

  Disassembly of section .text:
  0000000000000000 test:
       0:       18 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00         r1 = 0 ll
       2:       79 11 00 00 00 00 00 00         r1 = *(u64 *)(r1 + 0)
       3:       18 02 00 00 08 00 00 00 00 00 00 00 00 00 00 00         r2 = 8 ll
       5:       61 20 00 00 00 00 00 00         r0 = *(u32 *)(r2 + 0)
       6:       0f 10 00 00 00 00 00 00         r0 += r1
       7:       95 00 00 00 00 00 00 00         exit
  -bash-4.4$

  . from symbol table, static variable "a" is in section #4, offset 0.
  . from symbol table, static variable "b" is in section #4, offset 8.
  . the first relocation is against symbol #4:
    4: 0000000000000000     0 SECTION LOCAL  DEFAULT    4
    and in-section offset 0 (see llvm-objdump result)
  . the second relocation is against symbol #4:
    4: 0000000000000000     0 SECTION LOCAL  DEFAULT    4
    and in-section offset 8 (see llvm-objdump result)
  . therefore, the first relocation is for variable "a", and
    the second relocation is for variable "b".

Acked-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 354954
2019-02-27 05:36:15 +00:00
Vlad Tsyrklevich
3def5ac311 Revert "[PGO] Context sensitive PGO (part 1)"
This reverts commit r354930, it was causing UBSan failures.

llvm-svn: 354953
2019-02-27 03:45:28 +00:00
Saleem Abdulrasool
7559ae829d Support: enable backtraces on Windows
Some platforms, e.g. Windows, support backtraces but don't have
BACKTRACE. Checking for BACKTRACE prevents Windows from having
backtraces.

Patch by Jason Mittertreiner!

llvm-svn: 354951
2019-02-27 03:21:50 +00:00
Heejin Ahn
10e1884c1f [WebAssembly] Fix ScopeTops info in CFGStackify for EH pads
Summary:
When creating `ScopeTops` info for `try` ~ `catch` ~ `end_try`, we
should create not only `end_try` -> `try` mapping but also `catch` ->
`try` mapping as well. If this is not created, `block` and `end_block`
markers later added may span across an existing `catch`, resulting in
the incorrect code like:
```
try
  block     --|  (X)
catch         |
  end_block --|
end_try
```

Reviewers: dschuff

Subscribers: sunfish, sbc100, jgravelle-google, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58605

llvm-svn: 354945
2019-02-27 01:35:14 +00:00
Jonas Devlieghere
99da8b40ed [DWARFFormValue] Cleanup DWARFFormValue interface. (NFC)
DWARFFormValues can be created from a data extractor or by passing its
value directly. Until now this was done by member functions that
modified an existing object's internal state. This patch replaces a
subset of these methods with static method that return a new
DWARFFormValue.

llvm-svn: 354941
2019-02-27 00:58:09 +00:00
Heejin Ahn
090e7d58b6 [WebAssembly] Remove unnecessary instructions after TRY marker placement
Summary:
This removes unnecessary instructions after TRY marker placement. There
are two cases:
- `end`/`end_block` can be removed if they overlap with `try`/`end_try`
  and they have the same return types.
- `br` right before `catch` that branches to after `end_try` can be
  deleted.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58591

llvm-svn: 354939
2019-02-27 00:50:53 +00:00
Jonas Paulsson
50ed82a69f [SystemZ] Pass regalloc hints to help Load-and-Test transformations.
Since there is no "Load-and-Test-High" instruction, the 32 bit load of a
register to be compared with 0 can only be implemented with LT if the virtual
GRX32 register ends up in a low part (GR32 register).

This patch detects these cases and passes the GR32 registers (low parts) as
(soft) hints in getRegAllocationHints().

Review: Ulrich Weigand.
llvm-svn: 354935
2019-02-27 00:18:28 +00:00
Saleem Abdulrasool
24682f017f vim: swiftself is an attribute
Highlight the `swiftself` attribute on parameters.

llvm-svn: 354934
2019-02-27 00:12:11 +00:00
Vedant Kumar
2d2c28123a [HotColdSplit] Disable splitting for sanitized functions
Splitting can make sanitizer errors harder to understand, as the
trapping instruction may not be in the function where the bug was
detected.

rdar://48142697

llvm-svn: 354931
2019-02-26 22:55:46 +00:00
Rong Xu
a0b71feeed [PGO] Context sensitive PGO (part 1)
Current PGO profile counts are not context sensitive. The branch probabilities
for the inlined functions are kept the same for all call-sites, and they might
be very different from the actual branch probabilities. These suboptimal
profiles can greatly affect some downstream optimizations, in particular for
the machine basic block placement optimization.

In this patch, we propose to have a post-inline PGO instrumentation/use pass,
which we called Context Sensitive PGO (CSPGO). For the users who want the best
possible performance, they can perform a second round of PGO instrument/use on
the top of the regular PGO. They will have two sets of profile counts. The
first pass profile will be manly for inline, indirect-call promotion, and
CGSCC simplification pass optimizations. The second pass profile is for
post-inline optimizations and code-gen optimizations.

A typical usage:
// Regular PGO instrumentation and generate pass1 profile.
> clang -O2 -fprofile-generate source.c -o gen
> ./gen
> llvm-profdata merge default.*profraw -o pass1.profdata
// CSPGO instrumentation.
> clang -O2 -fprofile-use=pass1.profdata -fcs-profile-generate -o gen2
> ./gen2
// Merge two sets of profiles
> llvm-profdata merge default.*profraw pass1.profdata -o profile.profdata
// Use the combined profile. Pass manager will invoke two PGO use passes.
> clang -O2 -fprofile-use=profile.profdata -o use

This change touches many components in the compiler. The reviewed patch
(D54175) will committed in phrases.

Differential Revision: https://reviews.llvm.org/D54175

llvm-svn: 354930
2019-02-26 22:37:46 +00:00
Stanislav Mekhanoshin
060aed0b07 [AMDGPU] Fixed hang during DAG combine
SITargetLowering::reassociateScalarOps() does not touch constants
so that DAGCombiner::ReassociateOps() does not revert the combine.
However a global address is not a ConstantSDNode.

Switched to the method used by DAGCombiner::ReassociateOps() itself
to detect constants.

Differential Revision: https://reviews.llvm.org/D58695

llvm-svn: 354926
2019-02-26 20:56:25 +00:00
Eric Christopher
9600050c32 Fix a small comment typo.
llvm-svn: 354923
2019-02-26 20:33:22 +00:00
Reid Kleckner
eabf0628ee [X86] Fix bug in vectorcall calling convention
Original implementation can't correctly handle __m256 and __m512 types
passed by reference through stack. This patch fixes it.

Patch by Wei Xiao!

Differential Revision: https://reviews.llvm.org/D57643

llvm-svn: 354921
2019-02-26 19:48:16 +00:00
Alina Sbirlea
bdfb172eb0 [MemorySSA & SimpleLoopUnswitch] Update MemorySSA in ReplaceUsesOfWith.
SimpleLoopUnswitch must update MemorySSA when removing instructions.
Resolves PR39197.

llvm-svn: 354919
2019-02-26 19:44:52 +00:00
Craig Topper
a1bd7416d0 [X86] Use X86_CPU_SUBTYPE_COMPAT for 'cascadelake' cpu.
This CPU is supported by at least libgcc trunk now so we should make it available to __builtin_cpu_is.

llvm-svn: 354913
2019-02-26 19:17:12 +00:00
Julian Lettner
de25aa2b54 [lit] Allow setting parallelism groups to None
Check that we do not crash if a parallelism group is explicitly set to
None. Permits usage of the following pattern.

[lit.common.cfg]
  lit_config.parallelism_groups['my_group'] = None
  if <condition>:
    lit_config.parallelism_groups['my_group'] = 3

[project/lit.cfg]
  config.parallelism_group = 'my_group'

Reviewers: rnk

Differential Revision: https://reviews.llvm.org/D58305

llvm-svn: 354912
2019-02-26 19:03:26 +00:00
Kristina Brooks
c11602adf4 Update docs of memcpy/move/set wrt. align and len
Fix https://bugs.llvm.org/show_bug.cgi?id=38583: Describe
how memcpy/memmove/memset behave when len=0. Also fix
some fallout from when the alignment parameter was
replaced by an attribute.

This closes PR38583.

Patch by RalfJung (Ralf)

Differential Revision: https://reviews.llvm.org/D57600

llvm-svn: 354911
2019-02-26 18:53:13 +00:00
Andrew Ng
882c7d157c [TableGen] Make OpcodeMappings sort comparator deterministic NFCI
The previous sort comparator was not deterministic, i.e. in some
situations it would be possible for lhs < rhs && rhs < lhs. This was
discovered by an STL assertion in a Windows debug build of llvm-tblgen.

Differential Revision: https://reviews.llvm.org/D58687

llvm-svn: 354910
2019-02-26 18:50:49 +00:00
Sanjay Patel
647ad88eaf [InstSimplify] remove zero-shift-guard fold for general funnel shift
As discussed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2019-February/130491.html

We can't remove the compare+select in the general case because
we are treating funnel shift like a standard instruction (as
opposed to a special instruction like select/phi).

That means that if one of the operands of the funnel shift is
poison, the result is poison regardless of whether we know that
the operand is actually unused based on the instruction's
particular semantics.

The motivating case for this transform is the more specific
rotate op (rather than funnel shift), and we are preserving the
fold for that case because there is no chance of introducing
extra poison when there is no anonymous extra operand to the
funnel shift.

llvm-svn: 354905
2019-02-26 18:26:56 +00:00
Petar Avramovic
7e181f8d5d [MIPS GlobalISel] Select G_UADDO
Lower G_UADDO.
Legalize G_UADDO for MIPS32

Differential Revision: https://reviews.llvm.org/D58671

llvm-svn: 354900
2019-02-26 17:22:42 +00:00
Ganesh Gopalasubramanian
9a9159179f [X86] AMD znver2 enablement
This patch enables the following

1) AMD family 17h "znver2" tune flag (-march, -mcpu).
2) ISAs that are enabled for "znver2" architecture.
3) For the time being, it uses the znver1 scheduler model.
4) Tests are updated.
5) Scheduler descriptions are yet to be put in place.

Reviewers: craig.topper

Differential Revision: https://reviews.llvm.org/D58343

llvm-svn: 354897
2019-02-26 16:55:10 +00:00
Jonas Paulsson
53e0093564 [SystemZ] Wait with selection of legal vector/FP constants until Select().
This patch aims to make sure that any such constant that can be generated
with a vector instruction (for example VGBM) is recognized as such during
legalization and kept as a target independent node through post-legalize
DAGCombining.

Two new functions named isVectorConstantLegal() and loadVectorConstant()
replace old ways of handling vector/FP constants.

A new struct named SystemZVectorConstantInfo is used to cache the results of
isVectorConstantLegal() and pass them onto loadVectorConstant().

Support for fp128 constants in the presence of FeatureVectorEnhancements1
(z14) has been added.

Review: Ulrich Weigand
https://reviews.llvm.org/D58270

llvm-svn: 354896
2019-02-26 16:47:59 +00:00
Sanjay Patel
1c5174011a [InstSimplify] add tests for rotate; NFC
Rotate is a special-case of funnel shift that has different
poison constraints than the general case. That's not visible
yet in the existing tests, but it needs to be corrected.

llvm-svn: 354894
2019-02-26 16:44:08 +00:00
Sanjay Patel
375b728c54 [InstCombine] remove duplicate (but not updated) tests; NFC
Not sure how it happened, but rL354886 was a duplicate of rL354881,
but not updated with rL354887.

llvm-svn: 354889
2019-02-26 15:25:42 +00:00
Sanjay Patel
df3362d6e8 [InstCombine] canonicalize more unsigned saturated add with 'not'
Yet another pattern variation suggested by:
https://bugs.llvm.org/show_bug.cgi?id=14613

There are 8 more potential commuted patterns here on top of the
8 that were already handled (rL354221, rL354276, rL354393).
We have the obvious commute of the 'add' + commute of the cmp
predicate/operands (ugt/ult) + commute of the select operands:

Name: base
%notx = xor i32 %x, -1
%a = add i32 %notx, %y
%c = icmp ult i32 %x, %y
%r = select i1 %c, i32 -1, i32 %a
=>
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a

Name: ugt
%notx = xor i32 %x, -1
%a = add i32 %notx, %y
%c = icmp ugt i32 %y, %x
%r = select i1 %c, i32 -1, i32 %a
=>
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a

Name: commute select
%notx = xor i32 %x, -1
%a = add i32 %notx, %y
%c = icmp ult i32 %y, %x
%r = select i1 %c, i32 %a, i32 -1
=>
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a

Name: ugt + commute select
%notx = xor i32 %x, -1
%a = add i32 %notx, %y
%c = icmp ugt i32 %x, %y
%r = select i1 %c, i32 %a, i32 -1
=>
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a

https://rise4fun.com/Alive/den

llvm-svn: 354887
2019-02-26 15:18:49 +00:00
Sanjay Patel
8ff7b7bff8 [InstCombine] add more tests for saturated add; NFC
llvm-svn: 354886
2019-02-26 15:18:44 +00:00
Nirav Dave
5dd611ec6e [DAG] Fix constant store folding to handle non-byte sizes.
Avoid crashes from zero-byte values due to sub-byte store sizes.

Reviewers: uabelho, courbet, rnk

Reviewed By: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58626

llvm-svn: 354884
2019-02-26 15:02:32 +00:00
Simon Atanasyan
f7725376c2 [mips] Emit .module softfloat directive
This change fixes crash on an assertion in case of using
`soft float` ABI for mips32r6 target.

llvm-svn: 354882
2019-02-26 14:45:17 +00:00
Sanjay Patel
254cc085b5 [InstCombine] add more tests for saturated add; NFC
llvm-svn: 354881
2019-02-26 14:40:23 +00:00
Andrea Di Biagio
70b9d172d7 [MCA] Always check if scheduler resources are unavailable when reporting dispatch stalls.
Dispatch stall cycles may be associated to multiple dispatch stall events.
Before this patch, each stall cycle was associated with a single stall event.
This patch also improves a couple of code comments, and adds a helper method to
query the Scheduler for dispatch stalls.

llvm-svn: 354877
2019-02-26 14:19:00 +00:00
George Rimar
6235d90ad3 [yaml2obj][obj2yaml] - Add support for the architecture specific dynamic tags.
This allows tools to parse/dump the architecture specific tags
like DT_MIPS_*, DT_PPC64_* and DT_HEXAGON_*

Also fixes a bug in DynamicTags.def which was revealed in this patch.

Differential revision: https://reviews.llvm.org/D58667

llvm-svn: 354876
2019-02-26 14:14:49 +00:00
Simon Pilgrim
527ed7f7fa [AArch64] Add arithmetic zext bswap tests.
As requested on D58017.

llvm-svn: 354872
2019-02-26 13:22:35 +00:00
Xing GUO
ab7e1b886f [llvm-objdump] Add Version Definitions dumper
Summary: `llvm-objdump` needs a `Version Definitions` dumper.

Reviewers: grimar, jhenderson

Reviewed By: grimar, jhenderson

Subscribers: rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58615

llvm-svn: 354871
2019-02-26 13:06:16 +00:00
Igor Kudrin
4ca8c7b7fa [llvm-objdump] Implement -Mreg-names-raw/-std options.
The --disassembler-options, or -M, are used to customize
the disassembler and affect its output.

The two implemented options allow selecting register names on ARM:
* With -Mreg-names-raw, the disassembler uses rNN for all registers.
* With -Mreg-names-std it prints sp, lr and pc for r13, r14 and r15,
  which is the default behavior of llvm-objdump.

Differential Revision: https://reviews.llvm.org/D57680

llvm-svn: 354870
2019-02-26 12:15:14 +00:00