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Commit Graph

15 Commits

Author SHA1 Message Date
Craig Topper
59da2ddc9a [TableGen] Pass SmallVector to union_modes instead of returning a std::vector.
The number of modes is small so this should avoid a heap allocation.

Also replace std::set with SmallSet.
2021-04-18 15:59:52 -07:00
Craig Topper
47244a42c7 [TableGen] Make the map in InfoByHwMode protected. NFCI
Switch some for loops to just use the begin()/end() implementations
in the InfoByHwMode struct.

Add a method to insert into the map for the one case that was
modifying the map directly.
2021-02-11 21:16:10 -08:00
James Molloy
7fff32705f [TableGen] Support encoding per-HwMode
Much like ValueTypeByHwMode/RegInfoByHwMode, this patch allows targets
to modify an instruction's encoding based on HwMode. When the
EncodingInfos field is non-empty the Inst and Size fields of the Instruction
are ignored and taken from EncodingInfos instead.

As part of this promote getHwMode() from TargetSubtargetInfo to MCSubtargetInfo.

This is NFC for all existing targets - new code is generated only if targets
use EncodingByHwMode.

llvm-svn: 372320
2019-09-19 13:39:54 +00:00
Tom Stellard
f743f61832 Add support for pointer types in patterns
Summary:
This adds support for defining patterns for global isel using pointer
types, for example:

def : Pat<(load GPR32:$src),
          (p1 (LOAD GPR32:$src))>;

DAGISelEmitter will ignore the pointer information and treat these
types as integers with the same bit-width as the pointer type.

Reviewers: dsanders, rtereshin, arsenm

Reviewed By: arsenm

Subscribers: Petar.Avramovic, wdng, rovka, kristof.beyls, jfb, volkan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57065

llvm-svn: 354510
2019-02-20 19:43:47 +00:00
Chandler Carruth
ae65e281f3 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Simon Pilgrim
be9ad6ba34 [TableGen] Don't separately search for DefaultMode when we're going to iterate the set anyway. NFCI.
llvm-svn: 340055
2018-08-17 17:45:15 +00:00
David Blaikie
938d7fe477 Fix layering of MachineValueType.h by moving it from CodeGen to Support
This is used by llvm tblgen as well as by LLVM Targets, so the only
common place is Support for now. (maybe we need another target for these
sorts of things - but for now I'm at least making them correct & we can
make them better if/when people have strong feelings)

llvm-svn: 328395
2018-03-23 23:58:25 +00:00
Krzysztof Parzyszek
940990d757 [TableGen] Replace InfoByHwMode::getAsString with writeToStream
Also add operator<< for use with raw_ostream to InfoByHwMode and its
derived classes.

Recommitting r313989 with the fix for unresolved references: explicitly
define the operator<< in namespace llvm.

llvm-svn: 314004
2017-09-22 18:29:37 +00:00
Krzysztof Parzyszek
351021b564 Revert "[TableGen] Replace InfoByHwMode::getAsString with writeToStream"
This reverts commit r313989: it breaks Windows bots.

llvm-svn: 313990
2017-09-22 16:18:35 +00:00
Krzysztof Parzyszek
d5907858f0 [TableGen] Replace InfoByHwMode::getAsString with writeToStream
Also add operator<< for use with raw_ostream to InfoByHwMode and its
derived classes.

llvm-svn: 313989
2017-09-22 16:06:35 +00:00
Simon Pilgrim
0a1c4b0914 [TableGen] Return StringRef from ValueTypeByHwMode::getMVTName
Avoid unnecessary std::string creations during TypeSetByHwMode::writeToStream.

Found during investigations into PR28222

Differential Revision: https://reviews.llvm.org/D38174

llvm-svn: 313983
2017-09-22 13:32:26 +00:00
Krzysztof Parzyszek
1ccd89beee Recommit r313647 now that GCC seems to accept the offering
Add some member types to MachineValueTypeSet::const_iterator so that
iterator_traits can work with it.

Improve TableGen performance of -gen-dag-isel (motivated by X86 backend)

The introduction of parameterized register classes in r313271 caused the
matcher generation code in TableGen to run much slower, particularly so
in the unoptimized (debug) build. This patch recovers some of the lost
performance.

Summary of changes:
- Cache the set of legal types in TypeInfer::getLegalTypes. The contents
  of this set do not change.
- Add LLVM_ATTRIBUTE_ALWAYS_INLINE to several small functions. Normally
  this would not be necessary, but in the debug build TableGen is not
  optimized, so this helps a little bit.
- Add an early exit from TypeSetByHwMode::operator== for the case when
  one or both arguments are "simple", i.e. only have one mode. This
  saves some time in GenerateVariants.
- Finally, replace the underlying storage type in TypeSetByHwMode::SetType
  with MachineValueTypeSet based on std::array instead of std::set.
  This significantly reduces the number of memory allocation calls.

I've done a number of experiments with the underlying type of InfoByHwMode.
The type is a map, and for targets that do not use the parameterization,
this map has only one entry. The best (unoptimized) performance, somewhat
surprisingly came from std::map, followed closely by std::unordered_map.
DenseMap was the slowest by a large margin.
Various hand-crafted solutions (emulating enough of the map interface
not to make sweeping changes to the users) did not yield any observable
improvements.

llvm-svn: 313660
2017-09-19 18:42:34 +00:00
Krzysztof Parzyszek
51ed367a16 Revert "Improve TableGen performance of -gen-dag-isel (motivated by X86 backend)"
It breaks a lot of bots due to missing "__iterator_category".

llvm-svn: 313651
2017-09-19 17:55:07 +00:00
Krzysztof Parzyszek
2fbc30f8ae Improve TableGen performance of -gen-dag-isel (motivated by X86 backend)
The introduction of parameterized register classes in r313271 caused the
matcher generation code in TableGen to run much slower, particularly so
in the unoptimized (debug) build. This patch recovers some of the lost
performance.

Summary of changes:
- Cache the set of legal types in TypeInfer::getLegalTypes. The contents
  of this set do not change.
- Add LLVM_ATTRIBUTE_ALWAYS_INLINE to several small functions. Normally
  this would not be necessary, but in the debug build TableGen is not
  optimized, so this helps a little bit.
- Add an early exit from TypeSetByHwMode::operator== for the case when
  one or both arguments are "simple", i.e. only have one mode. This
  saves some time in GenerateVariants.
- Finally, replace the underlying storage type in TypeSetByHwMode::SetType
  with MachineValueTypeSet based on std::array instead of std::set.
  This significantly reduces the number of memory allocation calls.

I've done a number of experiments with the underlying type of InfoByHwMode.
The type is a map, and for targets that do not use the parameterization,
this map has only one entry. The best (unoptimized) performance, somewhat
surprisingly came from std::map, followed closely by std::unordered_map.
DenseMap was the slowest by a large margin.
Various hand-crafted solutions (emulating enough of the map interface
not to make sweeping changes to the users) did not yield any observable
improvements.

llvm-svn: 313647
2017-09-19 17:32:35 +00:00
Krzysztof Parzyszek
f817a9b5c3 TableGen support for parameterized register class information
This replaces TableGen's type inference to operate on parameterized
types instead of MVTs, and as a consequence, some interfaces have
changed:
- Uses of MVTs are replaced by ValueTypeByHwMode.
- EEVT::TypeSet is replaced by TypeSetByHwMode.

This affects the way that types and type sets are printed, and the
tests relying on that have been updated.

There are certain users of the inferred types outside of TableGen
itself, namely FastISel and GlobalISel. For those users, the way
that the types are accessed have changed. For typical scenarios,
these replacements can be used:
- TreePatternNode::getType(ResNo) -> getSimpleType(ResNo)
- TreePatternNode::hasTypeSet(ResNo) -> hasConcreteType(ResNo)
- TypeSet::isConcrete -> TypeSetByHwMode::isValueTypeByHwMode(false)

For more information, please refer to the review page.

Differential Revision: https://reviews.llvm.org/D31951

llvm-svn: 313271
2017-09-14 16:56:21 +00:00