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Commit Graph

96693 Commits

Author SHA1 Message Date
Nick Kledzik
53133391cd update mach-o EXPORT_SYMBOL_* names
llvm-svn: 192151
2013-10-08 00:59:13 +00:00
Hans Wennborg
8c515c229e cmake: don't set LLVM_COMPILER_IS_GCC_COMPATIBLE when using clang-cl
Tip-of-tree CMake has become clang-cl aware [1]. In this case,
CMAKE_CXX_COMPILER_ID will still be Clang, but MSVC will be true.

[1] See http://cmake.org/gitweb?p=cmake.git;a=commitdiff;h=3d8356d4

llvm-svn: 192139
2013-10-07 22:03:23 +00:00
David Majnemer
39a2e35dbc Windows: Avoiding resizing, use uninitialized data() instead
This is ever-so faster but more importantly matches what we have elsewhere.

llvm-svn: 192137
2013-10-07 21:57:07 +00:00
Akira Hatanaka
6c2bf15c93 [mips] Test case for r192124.
llvm-svn: 192135
2013-10-07 21:32:57 +00:00
Arnold Schwaighofer
bfe48b104a LoopVectorize: External uses must use the last value in a reduction cycle
Otherwise, we don't perform operations that would have been performed on
the scalar version.

Fixes PR17498.

llvm-svn: 192133
2013-10-07 21:05:43 +00:00
Reed Kotler
33301878d0 Add Mips16 patterns for sign extend byte and sign extend halfword.
llvm-svn: 192130
2013-10-07 20:46:19 +00:00
Manman Ren
b284db0070 Struct byval: use the correct alignment for loads generated to load
from struct byval to registers.

We used to pass 0 which means the alignment of PtrVT. Even when the alignment
of the struct is smaller than 4, the LOADs would have alignment of 4, and
further optimizations could combine the LOADs into a ldm, which would
cause crash.

The fix is to pass the alignment of the struct byval.

rdar://problem/15144402

llvm-svn: 192126
2013-10-07 19:47:53 +00:00
Akira Hatanaka
f21023f5c6 [mips] Coding style clean up.
llvm-svn: 192125
2013-10-07 19:33:02 +00:00
Akira Hatanaka
5954578b3c [mips] Disable tail merging when long branch pass is enabled.
llvm-svn: 192124
2013-10-07 19:13:53 +00:00
Benjamin Kramer
feace9b737 X86: Fix type check. Just because an integer type is illegal doesn't mean it's i64.
Fixes PR17495, where an i24 triggered this code. It's intended to
optimize i64 loads on 32 bit x86.

llvm-svn: 192123
2013-10-07 19:11:35 +00:00
Akira Hatanaka
535ef5516d [mips] Define method MipsSubtarget::enableLongBranchPass.
llvm-svn: 192122
2013-10-07 19:06:57 +00:00
Alexey Samsonov
a04533615d Revert r191834 until we measure the effect of this benchmarks and maybe find a better way to fix it
llvm-svn: 192121
2013-10-07 19:03:24 +00:00
Akira Hatanaka
da64382f71 [mips] Fix definition of mfhi and mflo instructions to read from the whole
accumulator instead of its sub-registers, $hi and $lo. 

We need this change to prevent a mflo following a mtlo from reading an
unpredictable/undefined value, as shown in the following example:

mult $6, $7 // result of $6 * $7 is written to $lo and $hi.
mflo $2     // read lower 32-bit result from $lo.
mtlo $4     // write to $lo. the content of $hi becomes unpredictable.
mfhi $3     // read higher 32-bit from $hi, which has an unpredictable value.

I don't have a test case for this change that reliably reproduces the problem.

llvm-svn: 192119
2013-10-07 18:49:46 +00:00
Richard Mitton
560c7ced61 Formally added an explicit enum for DWARF TLS support. No functionality change.
llvm-svn: 192118
2013-10-07 18:39:18 +00:00
Matt Arsenault
9c8541d286 Change objectsize intrinsic to accept different address spaces.
Bitcasting everything to i8* won't work. Autoupgrade the old
intrinsic declarations to use the new mangling.

llvm-svn: 192117
2013-10-07 18:06:48 +00:00
Amara Emerson
688cdc2151 [ARM] Improve build attributes emission.
llvm-svn: 192111
2013-10-07 16:55:23 +00:00
Chad Rosier
128d9134e7 [AArch64] Add support for NEON scalar arithmetic instructions:
SQDMULH, SQRDMULH, FMULX, FRECPS, and FRSQRTS.

llvm-svn: 192107
2013-10-07 16:36:15 +00:00
Joey Gouly
3ecfaf19bb [ARMv8] Add some disassembly tests for Thumb sevl/sevl.w
llvm-svn: 192106
2013-10-07 16:13:03 +00:00
NAKAMURA Takumi
4e9fc11644 Revert r191088, corresponding to r191823 to re-enable llvm-lto on cygming.
r191088 is "llvm/tools/Makefile: Suppress building llvm-lto on cygming, for now, probably due to LTO.dll."

llvm-svn: 192104
2013-10-07 15:42:22 +00:00
NAKAMURA Takumi
e7cfbb5fd1 Windows/Process.inc: Fix for +Asserts. &Buf[0] is not guaranteed if size is zero.
llvm-svn: 192103
2013-10-07 15:33:30 +00:00
Rafael Espindola
7630608c08 Fix typo.
Thanks to Sean Silva for noticing it.

llvm-svn: 192102
2013-10-07 13:57:59 +00:00
Rafael Espindola
ced9b42fb2 Remove dead code.
Support for exception handling in the legacy JIT was removed in r181354 and
this code was dead since then.

Thanks to Yaron Keren for noticing it.

llvm-svn: 192101
2013-10-07 13:54:50 +00:00
Rafael Espindola
e60c3625e3 Remove getEHExceptionRegister and getEHHandlerRegister.
They haven't been used for a long time. Patch by MathOnNapkins.

llvm-svn: 192099
2013-10-07 13:39:22 +00:00
Rafael Espindola
f1f200291c Fix the documentation of getDefaultSubtargetFeatures.
Patch by David Nadlinger.

llvm-svn: 192098
2013-10-07 13:34:05 +00:00
Tim Northover
1979375a30 ARM: allow cortex-m0 to use hint instructions
The hint instructions ("nop", "yield", etc) are mostly Thumb2-only, but have
been ported across to the v6M architecture. Fortunately, v6M seems to sit
nicely between v6 (thumb-1 only) and v6T2, so we can add a feature for it
fairly easily.

rdar://problem/15144406

llvm-svn: 192097
2013-10-07 11:10:47 +00:00
David Majnemer
14815ac119 Windows: Be more explicit with Win32 APIs
This addresses several issues in a similar vein:
 - Use the Unicode APIs when possible, running nm on clang shows that we
   only use Unicode APIs except for FormatMessage, CreateSemaphore, and
   GetModuleHandle.  AFAICT, the latter two are coming from MinGW and
   not LLVM itself.
 - Make getMainExecutable more resilient.  It previously considered
   return values of zero from ::GetModuleFileNameA to be acceptable.

llvm-svn: 192096
2013-10-07 09:52:36 +00:00
Simon Atanasyan
724835dff7 [Mips] Teach llvm-readobj to print MIPS-specific ELF program headers.
The patch reviewed by Michael Spencer.
http://llvm-reviews.chandlerc.com/D1846

llvm-svn: 192093
2013-10-07 08:58:27 +00:00
Craig Topper
6e389a510f Remove some instructions that seem to only exist to trick the filtering checks in the disassembler table creation. Just fix up the filter to let the real instruction through instead.
llvm-svn: 192090
2013-10-07 07:19:47 +00:00
Craig Topper
0c3bbe0644 Remove FsMOVAPSrr and friends. They have no patterns and are no longer selected anywhere.
llvm-svn: 192089
2013-10-07 06:10:45 +00:00
Craig Topper
4a7ff81d5f Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to register moves should be switched from using the MRMSrcReg form to the MRMDestReg form if the source register is a 64-bit extended register and the destination register is not.
This allows the instruction to be encoded using the 2-byte VEX form instead of the 3-byte VEX form. The GNU assembler has similar behavior and instruction selection already does this.

llvm-svn: 192088
2013-10-07 05:42:48 +00:00
Craig Topper
b5918acf04 Add disassembler support for long encodings for INC/DEC in 32-bit mode.
llvm-svn: 192086
2013-10-07 04:28:06 +00:00
David Majnemer
689b358b16 Revert "Revert "Windows: Add support for unicode command lines""
This reverts commit r192070 which reverted r192069, I forgot to
regenerate the configure scripts.

llvm-svn: 192079
2013-10-07 01:00:07 +00:00
Craig Topper
1d2f42a3c2 Fix some assert messages to say the correct opcode name. Looks like one assert got copy and pasted to many places.
llvm-svn: 192078
2013-10-06 22:38:19 +00:00
David Majnemer
433fb50610 Revert "Windows: Add support for unicode command lines"
This is causing MinGW bots to fail.
This reverts commit r192069.

llvm-svn: 192070
2013-10-06 20:44:34 +00:00
David Majnemer
0d7d059b44 Windows: Add support for unicode command lines
Summary:
The MSVCRT deliberately sends main() code-page specific characters.
This isn't too useful to LLVM as we end up converting the arguments to
UTF-16 and subsequently attempt to use the result as, for example, a
file name.  Instead, we need to have the ability to access the Unicode
command line and transform it to UTF-8.

This has the distinct advantage over using the MSVC-specific wmain()
function as our entry point because:
 - It doesn't work on cygwin.
 - It only work on MinGW with caveats and only then on certain versions.
 - We get to keep our entry point as main(). :)

N.B.  This patch includes fixes to other parts of lib/Support/Windows
s.t. we would be able to take advantage of getting the Unicode paths.
E.G.  clang spawning clang -cc1 would want to give it Unicode arguments.

Reviewers: aaron.ballman, Bigcheese, rnk, ruiu

Reviewed By: rnk

CC: llvm-commits, ygao

Differential Revision: http://llvm-reviews.chandlerc.com/D1834

llvm-svn: 192069
2013-10-06 20:25:49 +00:00
Rafael Espindola
499aaf305a Add support for aliases with linkonce_odr.
This will be used to extend constructor aliases in clang.

llvm-svn: 192066
2013-10-06 15:10:43 +00:00
Benjamin Kramer
44710574cb Force a CPU that doesn't have AVX, otherwise this test fails.
llvm-svn: 192065
2013-10-06 13:52:41 +00:00
Benjamin Kramer
a7e734d765 X86: Don't fold spills into SSE operations if the stack is unaligned.
Regalloc can emit unaligned spills nowadays, but we can't fold the
spills into SSE ops if we can't guarantee alignment. PR12250.

llvm-svn: 192064
2013-10-06 13:48:22 +00:00
Elena Demikhovsky
cb8eaca2e4 AVX-512: added scalar convert instructions and intrinsics.
Fixed load folding in VPERM2I instruction.

llvm-svn: 192063
2013-10-06 13:11:09 +00:00
Simon Atanasyan
bef2fe61ab [Mips] Add MIPS program header types.
llvm-svn: 192059
2013-10-06 08:49:41 +00:00
Venkatraman Govindaraju
2d62beab83 [Sparc] Do not emit nop after fcmp* instruction with V9.
llvm-svn: 192056
2013-10-06 07:06:44 +00:00
Elena Demikhovsky
0ff833ab99 AVX-512: fixed shuffle lowering
in case of BLEND and added VSHUFPS patterns.

llvm-svn: 192055
2013-10-06 06:11:18 +00:00
Venkatraman Govindaraju
aacd252702 [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.
This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes.

llvm-svn: 192054
2013-10-06 03:36:18 +00:00
Venkatraman Govindaraju
fa75d8536b [Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx.
addx/subx does not modify conditional codes whereas addxcc/subxx does.

llvm-svn: 192053
2013-10-06 02:11:10 +00:00
Craig Topper
9a365fa296 Add TBM instructions to loading folding tables.
llvm-svn: 192046
2013-10-05 20:20:51 +00:00
Nick Lewycky
e9c94635b3 Rename this feature to "cx16" to match gcc's flag name. Apparently these strings
are directly tied to the flag names in clang with no remapping in between?

llvm-svn: 192044
2013-10-05 20:11:44 +00:00
Aaron Ballman
197142c475 Silencing an MSVC warning.
llvm-svn: 192042
2013-10-05 19:41:41 +00:00
Benjamin Kramer
3a6afef4e7 Emit a better error when running out of registers on inline asm.
The most likely case where this error happens is when the user specifies
too many register operands. Don't make it look like an internal LLVM bug
when we can see that the error is coming from an inline asm instruction.
For other instructions we keep the "ran out of registers" error.

llvm-svn: 192041
2013-10-05 19:33:37 +00:00
Craig Topper
94a706d015 Remove underscores from TBM instruction names for consistency with other instruction naming.
llvm-svn: 192040
2013-10-05 19:27:26 +00:00
Craig Topper
0a8f3fc996 Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are sufficient.
llvm-svn: 192039
2013-10-05 19:22:59 +00:00