The cmov node used to sometimes return a glue result (and that's what
'flag' meant in this context), but that was removed with D38664.
llvm-svn: 364687
This file will fail with a common codegen transform that
I'm looking at, and I can't tell if that's an improvement
or regression based on the sparse checking.
llvm-svn: 364684
LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions currently
FAILs on Solaris:
FAIL: LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions (2940 of 51555)
******************** TEST 'LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions' FAILED ********************
Note: Google Test filter = FileSystemTest.permissions
[==========] Running 1 test from 1 test case.
[----------] Global test environment set-up.
[----------] 1 test from FileSystemTest
[ RUN ] FileSystemTest.permissions
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1705: Failure
Value of: CheckPermissions(fs::sticky_bit)
Actual: false
Expected: true
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1712: Failure
Value of: CheckPermissions(fs::set_uid_on_exe | fs::set_gid_on_exe | fs::sticky_bit)
Actual: false
Expected: true
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1719: Failure
Value of: CheckPermissions(fs::all_read | fs::set_uid_on_exe | fs::set_gid_on_exe | fs::sticky_bit)
Actual: false
Expected: true
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1722: Failure
Value of: CheckPermissions(fs::all_perms)
Actual: false
Expected: true
[ FAILED ] FileSystemTest.permissions (0 ms)
[----------] 1 test from FileSystemTest (0 ms total)
[----------] Global test environment tear-down
[==========] 1 test from 1 test case ran. (1 ms total)
[ PASSED ] 0 tests.
[ FAILED ] 1 test, listed below:
[ FAILED ] FileSystemTest.permissions
1 FAILED TEST
Checking with truss reveals that this is the same issue as on AIX and
documented in chmod(2):
If the process is not a privileged process and the file is not a direc-
tory, mode bit 01000 (S_ISVTX, the sticky bit) is cleared.
The following patch fixes this in the same way. Tested on amd64-pc-solaris2.11.
Differential Revision: https://reviews.llvm.org/D63598
llvm-svn: 364671
Summary:
These are output by clang -S, so can now be roundtripped thru clang.
(partially) fixes: https://bugs.llvm.org/show_bug.cgi?id=34544
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63901
llvm-svn: 364658
MVE adds the lsll, lsrl and asrl instructions, which perform a shift on a 64 bit value separated into two 32 bit registers.
The Expand64BitShift function is modified to accept ISD::SHL, ISD::SRL and ISD::SRA and convert it into the appropriate opcode in ARMISD. An SHL is converted into an lsll, an SRL is converted into an lsrl for the immediate form and a negation and lsll for the register form, and SRA is converted into an asrl.
test/CodeGen/ARM/shift_parts.ll is added to test the logic of emitting these instructions.
Differential Revision: https://reviews.llvm.org/D63430
llvm-svn: 364654
We were requiring that both shuffle operands were EXTRACT_SUBVECTORs, but we can relax this to only require one of them to be.
Also, we shouldn't bother attempting this if both operands are from the lowest subvector (or not EXTRACT_SUBVECTOR at all).
llvm-svn: 364644
This simply adds integer and floating point VMUL patterns for MVE, same as we
have add and sub.
Differential Revision: https://reviews.llvm.org/D63866
llvm-svn: 364643
This adds handling and tests for a number of floating point math routines,
which have no MVE instructions.
Differential Revision: https://reviews.llvm.org/D63725
llvm-svn: 364641
Delete unnecessary getters of AddressRange.
Simplify AddressRange::size(): Start <= End check should be checked in an upper layer.
Delete isContiguousWith() that doesn't make sense.
Simplify AddressRanges::insert. Delete commented code. Fix it when more than 1 ranges are to be deleted.
Delete trailing newline.
llvm-svn: 364637
MVE has instructions to widen as it loads, and narrow as it stores. This adds
the required patterns and legalisation to make them work including specifying
that they are legal, patterns to select them and test changes.
Patch by David Sherwood.
Differential Revision: https://reviews.llvm.org/D63839
llvm-svn: 364636
This fills in the gaps for basic MVE loads and stores, allowing unaligned
access and adding far too many tests. These will become important as
narrowing/expanding and pre/post inc are added. Big endian might still not be
handled very well, because we have not yet added bitcasts (and I'm not sure how
we want it to work yet). I've included the alignment code anyway which maps
with our current patterns. We plan to return to that later.
Code written by Simon Tatham, with additional tests from Me and Mikhail Maltsev.
Differential Revision: https://reviews.llvm.org/D63838
llvm-svn: 364633
We don't have vector operations for these, so they need to be expanded for both
integer and float.
Differential Revision: https://reviews.llvm.org/D63595
llvm-svn: 364631
The same as integer arithmetic, we can add simple floating point MVE addition and
subtraction patterns.
Initial code by David Sherwood
Differential Revision: https://reviews.llvm.org/D63257
llvm-svn: 364629
Introduce llvm.test.set.loop.iterations which sets the loop counter
and also produces an i1 after testing that the count is not zero.
Differential Revision: https://reviews.llvm.org/D63809
llvm-svn: 364628
This adds the first few patterns for MVE code generation, adding simple integer
add and sub patterns.
Initial code by David Sherwood
Differential Revision: https://reviews.llvm.org/D63255
llvm-svn: 364627
This patch adds necessary shuffle vector and buildvector support for ARM MVE.
It essentially adds support for VDUP, VREVs and some VMOVs, which are often
required by other code (like upcoming patches).
This mostly uses the same code from Neon that already generated
NEONvdup/NEONvduplane/NEONvrev's. These have been renamed to ARMvdup/etc and
moved to ARMInstrInfo as they are common to both architectures. Most of the
selection code seems to be applicable to both, but NEON does have some more
instructions making some parts specific.
Most code originally by David Sherwood.
Differential Revision: https://reviews.llvm.org/D63567
llvm-svn: 364626
Without the fix gcc (7.4.0) complains with
../unittests/ADT/APIntTest.cpp: In member function 'virtual void {anonymous}::APIntTest_MultiplicativeInverseExaustive_Test::TestBody()':
../unittests/ADT/APIntTest.cpp:2510:36: error: comparison between signed and unsigned integer expressions [-Werror=sign-compare]
for (unsigned Value = 0; Value < (1 << BitWidth); ++Value) {
~~~~~~^~~~~~~~~~~~~~~~~
llvm-svn: 364624
