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Commit Graph

164744 Commits

Author SHA1 Message Date
Simon Atanasyan
af58a9cf89 [mips] Cleanup the code to reduce diff with the upcoming patches. NFC
llvm-svn: 333404
2018-05-29 09:51:33 +00:00
Simon Atanasyan
694bc5993b [mips] Escape else-after-return. NFC
llvm-svn: 333403
2018-05-29 09:51:28 +00:00
Simon Atanasyan
558745488f [mips] Stop parsing a .set assignment if the first argument is not an identifier
Before this fix the following code triggers two error messages. The
second one is at least useless:

  test.s:1:9: error: expected identifier after .set
    .set  123, $a0
          ^
  test-set.s:1:9: error: unexpected token, expected comma
    .set  123, $a0
          ^

llvm-svn: 333402
2018-05-29 09:51:22 +00:00
Tim Renouf
583f69aaff [AMDGPU] Fixed build warning
Summary:
V2: Use cast instead of extra if.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D47426

Change-Id: I6ac31da0306f79706960284a7ebd7b9c6237a83a
llvm-svn: 333397
2018-05-29 08:15:37 +00:00
Serge Pavlov
ffe1850e80 Reverted commits 333390, 333391 and 333394
Build of shared library LLVMDemangle.so fails due to dependency problem.

llvm-svn: 333395
2018-05-29 07:05:41 +00:00
Serge Pavlov
96b2bba4eb Added library LLVMSupport to dependencies of LLVMDemangle
After r333390 build of LLVMDemangle.so fails due to unresolved
reference `llvm::report_bad_alloc_error`.

llvm-svn: 333394
2018-05-29 06:48:57 +00:00
Craig Topper
b3a1ef6ac0 [X86] Disable a DAG combine to allow packed AVX512DQ instructions to be consistently used for i64->float/double conversions.
Summary: We already get this right if the i64 didn't come from a load.

Reviewers: RKSimon

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47439

llvm-svn: 333393
2018-05-29 06:22:45 +00:00
Clement Courbet
e67347d398 [X86][Sched] Add InstRW for CLC on Intel after SNB.
Summary:
After SNB, Intel CPUs can rename CF independently of other EFLAGS,
so the renamer can zero it for free. Note that STC still consumes resources.

To reproduce: `$ llvm-exegesis -mode=uops -opcode-name=CLC`

On SNB:
```
---
key:
  opcode_name:     CLC
  mode:            uops
  config:          ''
cpu_name:        sandybridge
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 10000
measurements:
  - { key: '3', value: 0.0014, debug_string: SBPort0 }
  - { key: '4', value: 0.0013, debug_string: SBPort1 }
  - { key: '5', value: 0.0003, debug_string: SBPort4 }
  - { key: '6', value: 0.0029, debug_string: SBPort5 }
  - { key: '10', value: 0.0003, debug_string: SBPort23 }
error:           ''
info:            'instruction is serial, repeating a random one.
Snippet:
CLC
'
...
```

On HSW:
```
---
key:
  opcode_name:     CLC
  mode:            uops
  config:          ''
cpu_name:        haswell
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 10000
measurements:
  - { key: '3', value: 0.001, debug_string: HWPort0 }
  - { key: '4', value: 0.0009, debug_string: HWPort1 }
  - { key: '5', value: 0.0004, debug_string: HWPort2 }
  - { key: '6', value: 0.0006, debug_string: HWPort3 }
  - { key: '7', value: 0.0002, debug_string: HWPort4 }
  - { key: '8', value: 0.0012, debug_string: HWPort5 }
  - { key: '9', value: 0.0022, debug_string: HWPort6 }
  - { key: '10', value: 0.0001, debug_string: HWPort7 }
error:           ''
info:            'instruction is serial, repeating a random one.
Snippet:
CLC
'
...

```

Reviewers: craig.topper, RKSimon

Subscribers: gchatelet, llvm-commits

Differential Revision: https://reviews.llvm.org/D47362

llvm-svn: 333392
2018-05-29 06:19:39 +00:00
Serge Pavlov
c26878be55 Added system header cstdlib to MemAlloc.h
Some buildbots fail because they cannot find `std::malloc` and other
allocation functions.

llvm-svn: 333391
2018-05-29 06:03:53 +00:00
Serge Pavlov
158e1663f3 Use uniform mechanism for OOM errors handling
In r325551 many calls of malloc/calloc/realloc were replaces with calls of
their safe counterparts defined in the namespace llvm. There functions
generate crash if memory cannot be allocated, such behavior facilitates
handling of out of memory errors on Windows.

If the result of *alloc function were checked for success, the function was
not replaced with the safe variant. In these cases the calling function made
the error handling, like:

    T *NewElts = static_cast<T*>(malloc(NewCapacity*sizeof(T)));
    if (NewElts == nullptr)
      report_bad_alloc_error("Allocation of SmallVector element failed.");

Actually knowledge about the function where OOM occurred is useless. Moreover
having a single entry point for OOM handling is convenient for investigation
of memory problems. This change removes custom OOM errors handling and
replaces them with calls to functions `llvm::safe_*alloc`.

Declarations of `safe_*alloc` are moved to a separate include file, to avoid
cyclic dependency in SmallVector.h

Differential Revision: https://reviews.llvm.org/D47440

llvm-svn: 333390
2018-05-29 05:39:08 +00:00
Fangrui Song
f0cfb5b4cb [LangRef] Fix TBAA example
llvm-svn: 333389
2018-05-29 05:38:05 +00:00
Craig Topper
1e3f8dcb86 [X86] Remove masked vpermi2var/vpermt2var intrinsics and autoupgrade.
We have unmasked intrinsics now and wrap them with a select. This is a net reduction of 36 intrinsics from before the unmasked intrinsics were added.

llvm-svn: 333388
2018-05-29 05:22:05 +00:00
Craig Topper
830987e346 [X86] Add unmasked vermi2var intrinsics so we can use explicit select instructions for masking in clang.
This will allow us to remove the 3 different flavors of masked intrinsics. I'm leaving the actual intrinsic removal for another patch.

llvm-svn: 333386
2018-05-29 03:26:30 +00:00
Craig Topper
78483ed93b [X86] Converge X86ISD::VPERMV3 and X86ISD::VPERMIV3 to a single opcode.
These do the same thing with the first and second sources swapped. They previously came from separate intrinsics that specified different masking behavior. But we can cover that with isel patterns and a single node.

This is a step towards reducing the number of intrinsics needed.

A bunch of tests change because we are now biased to choosing VPERMT over VPERMI when there is nothing to signal that commuting is beneficial.

llvm-svn: 333383
2018-05-28 19:33:11 +00:00
Craig Topper
fdbb937205 [X86] Fix typo in comment. NFC
llvm-svn: 333382
2018-05-28 19:33:06 +00:00
Farhana Aleen
7eee05ce7a [AMDGPU] Re-enabled 128bit wide-vector generation for local addr space by default.
Summary: Bug reported here https://bugs.freedesktop.org/show_bug.cgi?id=105464 found
         to be resolved by some other fixes.

Author: FarhanaAleen
llvm-svn: 333380
2018-05-28 18:15:11 +00:00
Fangrui Song
f1f5f69d77 [LLVM-C] [OCaml] Remove LLVMAddBBVectorizePass
Summary: It was fully replaced back in 2014, and the implementation was removed 11 months ago by r306797.

Reviewers: hfinkel, chandlerc, whitequark, deadalnix

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47436

llvm-svn: 333378
2018-05-28 16:58:10 +00:00
Lei Huang
8ee6a72524 [Power9]Legalize and emit code for HW/Byte vector extract and convert to QP
Implemente patterns to extract HWord and Byte vector elements and convert to
quad-precision.

Differential Revision: https://reviews.llvm.org/D46774

llvm-svn: 333377
2018-05-28 16:43:29 +00:00
Zaara Syeda
891074f69a [PowerPC] Set isAsmParserOnly=1 for X-form TLS loads/stores
The X-form TLS load/store instructions added for optimizing the initial-exec
sequence in https://reviews.llvm.org/rL327635 fail to assemble. llvm-mc fails
with the error: invalid operand for instruction. This patch adds these
instructions into a block with isAsmParserOnly, similar to how ADD8TLS_ is
currently handled.

Differential Revision: https://reviews.llvm.org/D47382

llvm-svn: 333374
2018-05-28 15:27:58 +00:00
Daniel Cederman
58eb55fce6 [Sparc] Add .uahalf and .uaword directives
Summary:
Adding these makes it easier to assemble the output from GCC which
generates a lot of .uahalf and .uaword directives.

GAS treats .uahalf and .half the same unless the --enforce-aligned-data
flag is used. I could not find a similar flag for LLVM so it seems that
.half does not have any alignment requirement and is treated the same as
.uahalf should be. If that would change later on then the tests in
sparc-directives.s would fail due to bad alignment.

Reviewers: jyknight, asb

Reviewed By: jyknight

Subscribers: fedor.sergeev, jrtc27, llvm-commits

Differential Revision: https://reviews.llvm.org/D47319

llvm-svn: 333372
2018-05-28 12:42:55 +00:00
Craig Topper
6aee8a0262 [X86] Stop forcing X86VPermi2X node index operand to match destination type to make masking pattern matching easier. Add extra patterns with bitcasts instead.
This basically reverts r280696 in favor of using extra patterns as mentioned as an alternative in that commit message. For now I've only added the cases we have test cases for, but it should be easy to add more in the future.

This will help to convert VPERMI2PS/VPERMT2PS intrinsics to use a single ISD node opcode. And hopefully allow some intrinsics to be removed.

llvm-svn: 333365
2018-05-28 05:37:25 +00:00
Andrea Di Biagio
8e881f054d [Tablegen] Avoid generating empty switch statements. NFC
This fixes an MSVC warning (warning C4065: switch statement contains 'default'
but no 'case' labels) introduced with revision 333293.

llvm-svn: 333363
2018-05-27 19:08:12 +00:00
Tim Renouf
6e81c6c470 [AMDGPU] Fixed WWM bug in block otherwise entirely in WQM
Summary:
For a block with WQM on entry and exit and containing no exact mode
code, but containing some WWM code, the WQM pass forgot to process the
block at all and so did not insert code to enter and leave WWM.

This commit fixes that.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D47027

Change-Id: I044792eead1293bed4203fb26ce75f47878afeb6
llvm-svn: 333362
2018-05-27 17:26:11 +00:00
Simon Pilgrim
30c4ee488f [X86] Don't hardcode scheduler class
Also fixes BEXTRI instruction to use WritBEXTR class, which was missed when the class was added.

llvm-svn: 333360
2018-05-27 14:54:18 +00:00
David Green
b30bc64322 Revert 333358 as it's failing on some builders.
I'm guessing the tests reply on the ARM backend being built.

llvm-svn: 333359
2018-05-27 12:54:33 +00:00
David Green
f772da6436 [UnrollAndJam] Add a new Unroll and Jam pass
This is a simple implementation of the unroll-and-jam classical loop
optimisation.

The basic idea is that we take an outer loop of the form:

for i..
  ForeBlocks(i)
  for j..
    SubLoopBlocks(i, j)
  AftBlocks(i)

Instead of doing normal inner or outer unrolling, we unroll as follows:

for i... i+=2
  ForeBlocks(i)
  ForeBlocks(i+1)
  for j..
    SubLoopBlocks(i, j)
    SubLoopBlocks(i+1, j)
  AftBlocks(i)
  AftBlocks(i+1)
Remainder

So we have unrolled the outer loop, then jammed the two inner loops into
one. This can lead to a simpler inner loop if memory accesses can be shared
between the now-jammed loops.

To do this we have to prove that this is all safe, both for the memory
accesses (using dependence analysis) and that ForeBlocks(i+1) can move before
AftBlocks(i) and SubLoopBlocks(i, j).

Differential Revision: https://reviews.llvm.org/D41953

llvm-svn: 333358
2018-05-27 12:11:21 +00:00
Eric Christopher
868932d048 Remove boolean argument from isSuitableFromBSS.
The argument was used as an additional negative condition and can be
expressed in the if conditional without needing to pass it down.
Update bss commentary around main use.

llvm-svn: 333357
2018-05-27 11:39:34 +00:00
Eric Christopher
3e4f4eca52 Cleanups for getKindForGlobal:
- Clarify block comment
 - Make Function/GlobalVariable split more explicit.
 - Move locals closer to uses.

llvm-svn: 333356
2018-05-27 11:23:20 +00:00
Eric Christopher
ee14ad5043 Tidy some language in the xray documentation.
llvm-svn: 333354
2018-05-27 09:19:03 +00:00
Jonas Devlieghere
e42a0f11bc [dwarfdump] Make -c and -p work together
When requesting to dump both the parent chain and children, we used to
print the DIE more than once because we propagated the dump options to
the parent without clearing the respective flags. This commit fixes this
oversight and adds a test.

rdar://39415292

Differential revision: https://reviews.llvm.org/D47263

llvm-svn: 333350
2018-05-26 19:39:56 +00:00
Craig Topper
c37925ce27 [X86] Remove masking from avx512ifma intrinsics. Use a select instead.
This allows us to avoid having mask and maskz variant. Reducing from 12 intrinsics to 6.

llvm-svn: 333346
2018-05-26 18:55:19 +00:00
Amaury Sechet
1db6bc825b Fix comment decribing setcccarry. NFC
llvm-svn: 333344
2018-05-26 14:40:42 +00:00
Amaury Sechet
10b55fd959 Add test case for D46505 . NFC
llvm-svn: 333341
2018-05-26 12:28:23 +00:00
Paul Semel
3e32dee194 [llvm-objcopy] Add --keep-file-symbols option
This option prevent from removing file symbols while removing symbols.

Differential Revision: https://reviews.llvm.org/D46830

llvm-svn: 333339
2018-05-26 08:10:37 +00:00
Teresa Johnson
dbe78faf19 [ThinLTO] Fix a few more test match issues
Fix a few more bot failures due to r333335:
- don't match path other than file name, since the delimiter is
different for Windows
- The summary IDs in thinlto-function-summary-refgraph.ll may vary
and therefore can't be matched exactly, because the ordering depends
on the iteration order of the index map which is keyed by GUID. The GUID
for private values will depend on the path.

llvm-svn: 333338
2018-05-26 03:50:29 +00:00
Teresa Johnson
ffa00854e1 [ThinLTO] Fix another bot failure due to test mismatch
Don't try to match the exact GUID for private symbols, as the
hashed name includes the file path.

llvm-svn: 333337
2018-05-26 03:20:06 +00:00
Teresa Johnson
6db4b63df2 [ThinLTO] Fix bot failures from r333335
Change value in vector from StringRef to std::string to avoid errors
when trying to initialize from a std::string.

llvm-svn: 333336
2018-05-26 02:53:52 +00:00
Teresa Johnson
44e9da2985 [ThinLTO] Print module summary index to assembly
Summary:
Implements AsmWriter support for printing the module summary index to
assembly with the format discussed in the RFC "LLVM Assembly format for
ThinLTO Summary".

Implements just enough of the parsing support to recognize and ignore
the summary entries. As agreed in the RFC thread, this will be the
behavior when assembling the IR. A follow on change will implement
parsing/assembling of the summary entries for use by tools that
currently build the summary index from bitcode.

Reviewers: dexonsmith, pcc

Subscribers: inglorion, eraman, steven_wu, dblaikie, llvm-commits

Differential Revision: https://reviews.llvm.org/D46699

llvm-svn: 333335
2018-05-26 02:34:13 +00:00
Fangrui Song
21e65384c4 [llvm-symbolizer] Simplify
llvm-svn: 333334
2018-05-26 02:29:14 +00:00
George Burgess IV
7a9543189b [MemorySSA] Reflow comments + clean up control flow; NFC
Style guide says `else`s after returns are iffy, and I agree. I also
don't know what broke the comments here and in CFLAA, but *shrug*.

llvm-svn: 333332
2018-05-26 02:28:55 +00:00
George Burgess IV
43d2f7dda4 [CFLAA] Reflow comments; NFC
llvm-svn: 333330
2018-05-26 02:17:43 +00:00
Florian Hahn
354f312f3f Revert r333268: [IPSCCP] Use PredicateInfo to propagate facts from...
Reverting this to see if this is causing the failures of the
clang-with-thin-lto-ubuntu bot.

[IPSCCP] Use PredicateInfo to propagate facts from cmp instructions.

This patch updates IPSCCP to use PredicateInfo to propagate
facts to true branches predicated by EQ and to false branches
predicated by NE.

As a follow up, we should be able to extend it to also propagate additional
facts about nonnull.

Reviewers: davide, mssimpso, dberlin, efriedma

Reviewed By: davide, dberlin

Differential Revision: https://reviews.llvm.org/D45330

llvm-svn: 333323
2018-05-25 23:32:02 +00:00
George Burgess IV
547d3b9eb0 Replace AA's uses of uint64_t with LocationSize; NFC.
The uint64_ts that we pass around AA to represent MemoryLocation sizes
are logically an Optional<uint64_t>. In D44748, we want to add an extra
'imprecise' bit to this Optional<uint64_t> to represent whether a given
MemoryLocation size is an upper-bound or an exact size. For more context
on why, please see D44748.

That patch is quite large, but reviewers seem to be OK with the
approach. In D45581 (my first attempt to split 'noise' out of D44748),
reames asked that I land a precursor that is solely replacing uint64_t
with LocationSize, which starts out as `using LocationSize = uint64_t;`.
He also gave me the OK to submit this rename without further review.

llvm-svn: 333314
2018-05-25 21:16:58 +00:00
Petr Hosek
6ecc49d9f4 [Support] Avoid normalization in sys::getDefaultTargetTriple
The return value of sys::getDefaultTargetTriple, which is derived from
-DLLVM_DEFAULT_TRIPLE, is used to construct tool names, default target,
and in the future also to control the search path directly; as such it
should be used textually, without interpretation by LLVM.

Normalization of this value may lead to unexpected results, for example
if we configure LLVM with -DLLVM_DEFAULT_TARGET_TRIPLE=x86_64-linux-gnu,
normalization will transform that value to x86_64--linux-gnu. Driver will
use that value to search for tools prefixed with x86_64--linux-gnu- which
may be confusing. This is also inconsistent with the behavior of the
--target flag which is taken as-is without any normalization and overrides
the value of LLVM_DEFAULT_TARGET_TRIPLE.

Users of sys::getDefaultTargetTriple already perform their own
normalization as needed, so this change shouldn't impact existing logic.

Differential Revision: https://reviews.llvm.org/D47153

llvm-svn: 333307
2018-05-25 20:39:37 +00:00
Guozhi Wei
79af8cc43b [CodeGenPrepare] Revert r331783
The patch r331783 caused regression in one of our internal application. So revert it now, will investigate it further.

llvm-svn: 333305
2018-05-25 20:30:26 +00:00
Mark Searles
38d5d10a14 [AMDGPU][Waitcnt] Remove obsolete waitcnt option
With the removal of the old waitcnt pass, the '-enable-si-insert-waitcnts' option is obsolete. Remove it.

Differential Revision: https://reviews.llvm.org/D47378

llvm-svn: 333303
2018-05-25 20:24:08 +00:00
Craig Topper
57ab3923d3 Recommit r333226 "[ValueTracking] Teach computeKnownBits that the result of an absolute value pattern that uses nsw flag is always positive."
Libfuzzer tests have been fixed to prevent being optimized.

Original commit message:

If the nsw flag is used in the absolute value then it is undefined for INT_MIN. For all other value it will produce a positive number. So we can assume the result is positive.

This breaks some InstCombine abs/nabs combining tests because we simplify the second compare from known bits rather than as the whole pattern. Looks like we can probably fix it by adding a neg+abs/nabs combine to just swap the select operands. N

Differential Revision: https://reviews.llvm.org/D47041

llvm-svn: 333300
2018-05-25 19:18:09 +00:00
Stanislav Mekhanoshin
9cfeb10772 [AMDGPU] Fixed test failure with AMDGPUPerfHint
We shall not keep iterator to a map while map is modified,
this leads to a broken map.

llvm-svn: 333298
2018-05-25 18:46:58 +00:00
Matt Davis
d559fd8c73 [llvm-mca] Update the header's guard name. NFC.
This patch also places a comment at the end of the header guard.

llvm-svn: 333297
2018-05-25 18:45:43 +00:00
Matt Davis
3be2788247 [llvm-mca] Update DispatchStage header comment. NFC.
Updated the comment to be a wee bit more descriptive.

llvm-svn: 333296
2018-05-25 18:31:28 +00:00