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Commit Graph

100350 Commits

Author SHA1 Message Date
Daniel Jasper
bf4e7d8ac3 Revert r201622 and r201608.
This causes the LLVMgold plugin to segfault. More information on the
replies to r201608.

llvm-svn: 201669
2014-02-19 12:26:01 +00:00
Tim Northover
7e8f99575c X86: move test requiring X86TargetLowering info into its own directory
If LLVM is built without X86 as a supported target then the test would
mysteriously fail.

llvm-svn: 201668
2014-02-19 12:24:19 +00:00
Tim Northover
4152cbaed5 Try addding datalayout in case that's what Hexagon doesn't like.
Just a wild stab in the dark really, but in the absence of any ability to
reproduce the problem...

llvm-svn: 201658
2014-02-19 10:32:40 +00:00
Tim Northover
1b102abe53 X86 CodeGenPrep: sink shufflevectors before shifts
On x86, shifting a vector by a scalar is significantly cheaper than shifting a
vector by another fully general vector. Unfortunately, because SelectionDAG
operates on just one basic block at a time, the shufflevector instruction that
reveals whether the right-hand side of a shift *is* really a scalar is often
not visible to CodeGen when it's needed.

This adds another handler to CodeGenPrepare, to sink any useful shufflevector
instructions down to the basic block where they're used, predicated on a target
hook (since on other architectures, doing so will often just introduce extra
real work).

rdar://problem/16063505

llvm-svn: 201655
2014-02-19 10:02:43 +00:00
Evgeniy Stepanov
aa102ff6b9 Build PIE binaries when cross-compiling to Android.
This change also removes CMAKE_LINK_FLAGS setting that seems to be ignored by cmake.

llvm-svn: 201654
2014-02-19 09:51:22 +00:00
Alexey Samsonov
f0a1f6058a Try to revive buildbots after r201620
llvm-svn: 201651
2014-02-19 08:30:55 +00:00
Craig Topper
de3c74571e Remove special FP opcode maps and instead add enough MRM_XX formats to handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change.
llvm-svn: 201649
2014-02-19 08:25:02 +00:00
Craig Topper
b56c73e1c5 Reduce size of map field in X86 TSFlags since it now requires less bits.
llvm-svn: 201646
2014-02-19 07:29:07 +00:00
Craig Topper
7d159c5e98 Put some of the X86 formats in a more logical order.
llvm-svn: 201645
2014-02-19 06:59:13 +00:00
Craig Topper
5b20c52fcc Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.
llvm-svn: 201641
2014-02-19 05:34:21 +00:00
Rui Ueyama
e6bd7df6c8 llvm-objdump/COFF: Print load configuration table.
Load Configuration Table may contain a pointer to SEH table. This patch is to
print the offset to the table. Printing SEH table contents is a TODO.

The layout of Layout Configuration Table is described in Microsoft PE/COFF
Object File Format Spec, but the table's offset/size descriptions seems to be
totally wrong, at least in revision 8.3 of the spec. I believe the table in
this patch is the correct one.

llvm-svn: 201638
2014-02-19 03:53:11 +00:00
Mingjie Xing
e450c0faf7 Fix a typo in a comment.
llvm-svn: 201633
2014-02-19 03:20:46 +00:00
Saleem Abdulrasool
27ee2a5853 MCAsmParser: support required parameters
This enhances the macro parser to parse and handle parameter qualifications,
which is needed to support required formal parameters in macro definitions.  A
required parameter may not be defaulted (though providing a default value is
accepted with a warning).  This improves GAS compatibility.

Partially addresses PR9248.

llvm-svn: 201630
2014-02-19 03:00:29 +00:00
Saleem Abdulrasool
1358c09cd6 MCAsmParser: change representation of MCAsmMacroParameter
Rather than using std::pair, create a structure to represent the type.  This is
a preliminary refactoring to enable required parameter handling.  Additional
state is needed to indicate required parameters.  This has a minor side effect
of improving readability by providing more accurate names compared to first and
second.

llvm-svn: 201629
2014-02-19 03:00:23 +00:00
Rafael Espindola
e5f011f1b1 Now that llvm always does the right thing with private, use it.
llvm-svn: 201625
2014-02-19 02:08:39 +00:00
Rafael Espindola
e24a4a66da Use PrivateLinkage now that it is safe.
Now that llvm's codegen knows to use an 'l' prefix when needed, we can just
use PrivateLinkage.

llvm-svn: 201624
2014-02-19 01:46:57 +00:00
Rafael Espindola
5381278d2b Avoid an infinite cycle with private linkage and -f{data|function}-sections.
When outputting an object we check its section to find its name, but when
looking for the section with -ffunction-section we look for the symbol name.

Break the loop by requesting a name with the private prefix when constructing
the section name. This matches the behavior before r201608.

llvm-svn: 201622
2014-02-19 01:28:30 +00:00
Sean Silva
574fd8eb68 [docs] Clean up some more llvm-gcc stuff
Some references to llvm-gcc were so crusty that I wasn't sure how to
proceed and so I've left them intact.

I also slipped in a quick peephole fix to use a :doc: link instead of
raw HTML link.

llvm-svn: 201619
2014-02-19 00:12:34 +00:00
Sean Silva
da1e143651 [docs] Nuke some references to llvm-gcc
From a cursory look it seems like all the described commandline options
and such apply to clang just fine, but I'd appreciate a second opinion.

llvm-svn: 201616
2014-02-18 23:56:43 +00:00
Rafael Espindola
d39a573c72 Fix PR18743.
The IR
@foo = private constant i32 42

is valid, but before this patch we would produce an invalid MachO from it. It
was invalid because it would use an L label in a section where the liker needs
the labels in order to atomize it.

One way of fixing it would be to just reject this IR in the backend, but that
would not be very front end friendly.

What this patch does is use an 'l' prefix in sections that we know the linker
requires symbols for atomizing them. This allows frontends to just use
private and not worry about which sections they go to or how the linker handles
them.

One small issue with this strategy is that now a symbol name depends on the
section, which is not available before codegen. This is not a problem in
practice. The reason is that it only happens with private linkage, which will
be ignored by the non codegen users (llvm-nm and llvm-ar).

llvm-svn: 201608
2014-02-18 22:24:57 +00:00
Rafael Espindola
c898de3245 Rename a DebugLoc variable to DbgLoc and a DataLayout to DL.
This is quiet a bit less confusing now that TargetData was renamed DataLayout.

llvm-svn: 201606
2014-02-18 22:05:46 +00:00
Lang Hames
363c803d9a Consistently check 'IsCode' when allocating sections in RuntimeDyld (via
findOrEmitSection).

Vaidas Gasiunas's patch, r201259, fixed one instance where we were always
allocating sections as text. This patch fixes the remaining buggy call sites.

No test case: This isn't breaking anything that I know of, it's just
inconsistent.

<rdar://problem/15943542>

llvm-svn: 201605
2014-02-18 21:46:39 +00:00
Ana Pazos
9cdade7a3e [AArch64] Expanded sin, cos, pow with FP vector types inputs
llvm-svn: 201601
2014-02-18 20:31:05 +00:00
Daniel Sanders
b162208d80 [mips] Add support for ELF64-mips and the R_MIPS_32/R_MIPS_64 relocs for it.
Summary:
This fixes several test failures when building LLVM on a MIPS host.

The failures were:
    LLVM :: DebugInfo/enum.ll
    LLVM :: DebugInfo/inlined-arguments.ll
    LLVM :: DebugInfo/member-order.ll
    LLVM :: DebugInfo/namespace.ll
    LLVM :: DebugInfo/template-recursive-void.ll
    LLVM :: DebugInfo/tu-composite.ll
    LLVM :: DebugInfo/two-cus-from-same-file.ll
    LLVM :: Linker/type-unique-simple-a.ll
    LLVM :: Linker/type-unique-simple2.ll

Reviewers: jacksprat, matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2721

llvm-svn: 201582
2014-02-18 15:57:52 +00:00
Rafael Espindola
d85e4eb0f5 Rename some member variables from TD to DL.
TargetData was renamed DataLayout back in r165242.

llvm-svn: 201581
2014-02-18 15:33:12 +00:00
Marshall Clow
ca67ca2b57 Add myself as owner for libc++
llvm-svn: 201573
2014-02-18 14:03:17 +00:00
Robert Lytton
3f025fc96b XCore target: Handle common linkage
llvm-svn: 201563
2014-02-18 11:21:59 +00:00
Robert Lytton
73848eb640 XCore target: addMemOperand as necessary
BuildMI instructions were not including MachineMemOperand information.
This was discovered by 'SingleSource/Benchmarks/Stanford/Oscar' failing
due to a FrameIndex load incorrectly being hoisted by postra-machine-licm.
No other tests have been found to fail.

llvm-svn: 201562
2014-02-18 11:21:53 +00:00
Robert Lytton
296ff43f53 XCore target: Fix llvm.eh.return and EH info register handling
llvm-svn: 201561
2014-02-18 11:21:48 +00:00
Tim Northover
7a1ab70bc2 Darwin builds: handle different possible form for SDKROOT.
Modifying build_llvm to handle SDKROOT being the name of an SDK rather than a
path. This will still work if SDKROOT is a path.

rdar://problem/15162322

llvm-svn: 201560
2014-02-18 11:20:44 +00:00
Tim Northover
83bbdcb246 GlobalMerge: move "-global-merge" option to the pass itself.
It's rather odd to have the flag enabling and disabling this pass only affect a
single target.

llvm-svn: 201559
2014-02-18 11:17:29 +00:00
Tim Northover
448249fd73 X86: use vpsllvd (& friends) for 16-bit shifts on Haswell
llvm-svn: 201558
2014-02-18 11:15:32 +00:00
Justin Bogner
008ac0494e llvm-cov: Support gcov's extermely lenient treatment of -o
In gcov, the -o flag can accept either a directory or a file name.
When given a directory, the gcda and gcno files are expected to be in
that directory. When given a file, the gcda and gcno files are
expected to be named based on the stem of that file. Non-existent
paths are treated as files.

This implements compatible behaviour.

llvm-svn: 201555
2014-02-18 09:19:48 +00:00
Craig Topper
947a05e5c4 Add PS prefix to some classes I missed in r201538.
llvm-svn: 201551
2014-02-18 08:24:22 +00:00
Craig Topper
b5b81fb98b Add a bunch of OpSize32 tags to 64-bit mode only instructions to match their 32-bit mode counterparts for cases where there is also a OpSize16 instruction.
llvm-svn: 201550
2014-02-18 08:18:29 +00:00
Elena Demikhovsky
8091d0ad88 AVX-512: Fixed size of mask registers
llvm-svn: 201546
2014-02-18 07:52:26 +00:00
Jiangning Liu
9508c695c8 Fix a typo about lowering AArch64 va_copy.
llvm-svn: 201541
2014-02-18 02:37:42 +00:00
Craig Topper
de78f4304d Add an x86 prefix encoding for instructions that would decode to a different instruction with 0xf2/f3/66 were in front of them, but don't themselves have a prefix. For now this doesn't change any bbehavior, but plan to use it to fix some bugs in the disassembler.
llvm-svn: 201538
2014-02-18 00:21:49 +00:00
Duncan P. N. Exon Smith
73eacbb02b PGO: llvm-profdata: tool for merging profiles
Introducing llvm-profdata, a tool for merging profile data generated by
PGO instrumentation in clang.

- The name indicates a file extension of <name>.profdata.  Eventually
  profile data output by clang should be changed to that extension.

- llvm-profdata merges two profiles.  However, the name is more general,
  since it will likely pick up more tasks (such as summarizing a single
  profile).

- llvm-profdata parses the current text-based format, but will be
  updated once we settle on a binary format.

<rdar://problem/15949645>

llvm-svn: 201535
2014-02-17 23:22:49 +00:00
Kevin Enderby
0a635e7acf Fix the arm assembler so that this malformed instruction:
ldrd r6, r7 [r2, #15]
simply gives an error and does not triggers an assertion.

As Jim points out, the diagnostic is really strange here,
but fixing that would be more complicated. The missing
comma results in the parser expecting a construct like r2[2],
which is the vector index thing the error message is talking
about. That's not what the user intended, though, and there's
nothing else in the instruction that looks at all like a vector.
Yet more fallout from not having a real parser here and trying
to do context-free generic matching for addressing modes.

rdar://15097243

llvm-svn: 201531
2014-02-17 21:45:27 +00:00
Anders Waldenborg
81a09cf058 Add support for assigning to . in AsmParser.
This is implemented by handling assignments to the '.' pseudo symbol
as ".org" directives.

Differential Revision: http://llvm-reviews.chandlerc.com/D2625

llvm-svn: 201530
2014-02-17 20:48:32 +00:00
Craig Topper
3e74ac0d93 Fix diassembler handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 should ignore the base register entirely. Mod=01/10 should treat this as R13 plus displacment. Fixes PR18860.
llvm-svn: 201507
2014-02-17 10:03:43 +00:00
Elena Demikhovsky
0e85630ee2 AVX-512: implemented zext fron i1 to i16
llvm-svn: 201502
2014-02-17 07:29:33 +00:00
Gerolf Hoflehner
ec56f33316 fix for null VectorizedValue assertion in the SLP Vectorizer (in function vectorizeTree()). radar://16064178
llvm-svn: 201501
2014-02-17 03:06:16 +00:00
Saleem Abdulrasool
dc9bca333a MCAsmParser: add some mixed argument tests
Add some tests to explicitly validate handling of comma and non-comma separated
arguments.

llvm-svn: 201500
2014-02-17 00:40:22 +00:00
Saleem Abdulrasool
31abfcc09f MCAsmParser: better handling for named arguments
Until this point only macro definition with named parameters were parsed but the
names were ignored.  This adds support for using that information for named
parameter instantiation.

In order to support the full semantics of the keyword arguments, the arguments
are no longer lazily initialised since the keyword arguments can be specified
out of order and partially if they are defaulted.  Prepopulate the arguments
with the default value for any defaulted parameters, and then parse the
specified arguments.

This simplies some of the handling of the arguments in the inner loop since
empty arguments simply increment the parameter index and move on.

Note that keyword and positional arguments cannot be mixed.

llvm-svn: 201499
2014-02-17 00:40:17 +00:00
Mark Seaborn
a1a8c0677a Use 16 byte stack alignment for NaCl on ARM
NaCl's ARM ABI uses 16 byte stack alignment, so set that in
ARMSubtarget.cpp.

Using 16 byte alignment exposes an issue in code generation in which a
varargs function leaves a 4 byte gap between the values of r1-r3 saved
to the stack and the following arguments that were passed on the
stack.  (Previously, this code only needed to support 4 byte and 8
byte alignment.)

With this issue, llc generated:

varargs_func:
        sub     sp, sp, #16
        push    {lr}
        sub     sp, sp, #12
        add     r0, sp, #16   // Should be 20
        stm     r0, {r1, r2, r3}
        ldr     r0, .LCPI0_0  // Address of va_list
        add     r1, sp, #16
        str     r1, [r0]
        bl      external_func

Fix the bug by checking for "Align > 4".  Also simplify the code by
using OffsetToAlignment(), and update comments.

Differential Revision: http://llvm-reviews.chandlerc.com/D2677

llvm-svn: 201497
2014-02-16 18:59:48 +00:00
Arnold Schwaighofer
acef112e40 SCEVExpander: Try hard not to create derived induction variables in other loops
During LSR of one loop we can run into a situation where we have to expand the
start of a recurrence of a loop induction variable in this loop. This start
value is a value derived of the induction variable of a preceeding loop. SCEV
has cannonicalized this value to a different recurrence than the recurrence of
the preceeding loop's induction variable (the type and/or step direction) has
changed). When we come to instantiate this SCEV we created a second induction
variable in this preceeding loop.  This patch tries to base such derived
induction variables of the preceeding loop's induction variable.

This helps twolf on arm and seems to help scimark2 on x86.

Reapply with a fix for the case of a value derived from a pointer.

radar://15970709

llvm-svn: 201496
2014-02-16 15:49:50 +00:00
Rafael Espindola
ed0a04d469 Remove dead code, we already require cmake 2.8.8.
llvm-svn: 201495
2014-02-16 14:36:26 +00:00
Rafael Espindola
cac01e61b4 Remove unnecessary typename.
Thanks to Elena Demikhovsky for noticing.

llvm-svn: 201494
2014-02-16 14:12:35 +00:00