1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 02:33:06 +01:00
Commit Graph

189224 Commits

Author SHA1 Message Date
Kristof Beyls
32e21be127 [find_interesting_reviews.py] Add git blame output cache
The majority of the running time of this script tends to be spent in
running git blame on source files touched by patches under review.

By introducing a git blame output cache, some of the git blame commands
don't have to re-run, and the blame information can be retrieved from a
cache.

I've observed that in a typical run matching patches available for
review with potential reviewers, this speeds up the script's running
time by a factor of about 2.5x.
2019-12-23 12:08:16 +00:00
Georgii Rymar
a6c442cb15 [yaml2obj] - Allow using an arbitrary value for OSABI.
There was no way to set an unsupported or unknown OS ABI.
With this patch it is possible to use any numeric value.

Differential revision: https://reviews.llvm.org/D71765
2019-12-23 13:29:52 +03:00
Georgii Rymar
269a0dfaf6 [yaml2obj] - Add support for ELFOSABI_LINUX.
ELFOSABI_LINUX is an alias for ELFOSABI_GNU.
It is not that obvious probably.

Differential revision: https://reviews.llvm.org/D71764
2019-12-23 13:25:58 +03:00
Georgii Rymar
7a81385a73 [yaml2obj] - Add testing for OSABI field.
We have no such testing. This makes impossible
to add support for new ELFOSABI_* tags.

Differential revision: https://reviews.llvm.org/D71763
2019-12-23 13:18:18 +03:00
Martin Storsjö
d817281f2c [AArch64] [Windows] Use COFF stubs for calls to extern_weak functions
As the extern_weak target might be missing, resolving to the absolute
address zero, we can't use the normal direct PC-relative branch
instructions (as that would result in relocations out of range).

Improve the classifyGlobalFunctionReference method to set
MO_DLLIMPORT/MO_COFFSTUB, and simplify the existing code in
AArch64TargetLowering::LowerCall to use the return value from
classifyGlobalFunctionReference for these cases.

Add code in both AArch64FastISel and GlobalISel/IRTranslator to
bail out for function calls to extern weak functions on windows,
to let SelectionDAG handle them.

This matches what was done for X86 in 6bf108d77a3c.

Differential Revision: https://reviews.llvm.org/D71721
2019-12-23 12:13:49 +02:00
Martin Storsjö
407a0e7a75 [ARM] [Windows] Use COFF stubs for calls to extern_weak functions
As the extern_weak target might be missing, resolving to the absolute
address zero, we can't use the normal direct PC-relative branch
instructions (as that would result in relocations out of range).

Instead check the shouldAssumeDSOLocal method and load the address
from a COFF stub.

This matches what was done for X86 in 6bf108d77a3c.

Differential Revision: https://reviews.llvm.org/D71720
2019-12-23 12:13:49 +02:00
Georgii Rymar
8452e4df8a [llvm-readobj][test] - Stop using Inputs/trivial.obj.elf-x86-64.
This rewrites a few tests to stop using the
trivial.obj.elf-x86-64 precompiled object
and removes it.

Differential revision: https://reviews.llvm.org/D71662
2019-12-23 13:10:26 +03:00
Shengchen Kan
30a69b3407 [NFC] Style cleanups
1. Remove duplicate function for class name at the beginning of the
comment.
2. Use auto where the type is already obvious from the context.
2019-12-23 17:02:36 +08:00
QingShan Zhang
54c596beca [Power9] Remove the PPCISD::XXREVERSE as it has completely the same semantics of ISD::BSWAP
The custom node PPCISD::XXREVERSE has completely the same semantics of generic node ISD::BSWAP.
We need to clean up it as we have the combine rules for bswap in the base class, while nothing for xxreverse.

Differential Revision: https://reviews.llvm.org/D70657
2019-12-23 07:44:33 +00:00
Simon Pilgrim
fbe3051c2c Fix case style warnings in DIBuilder. NFC. 2019-12-23 07:27:18 +00:00
Dinar Temirbulatov
ea10699e64 [SLP] Replace NeedToGather variable with enum. 2019-12-23 08:21:53 +01:00
QingShan Zhang
59f2af1a5f [NFC][Test][PowerPC] Add more tests for 'and mask' 2019-12-23 06:59:14 +00:00
Jim Lin
bc2293e2b6 [AVR] Fix codegen for rotate instructions
Summary:
    This patch introduces the ROLBRd and RORBRd pseudo-instructions,
    which implemenent the "traditional" rotate operations; instead of
    the AVR rotate instructions that use the carry bit.

    The code is not optimized at all. Especially when dealing with
    loops of rotate instructions, this codegen should be improved some
    day.

Related bug: 41358 <https://bugs.llvm.org/show_bug.cgi?id=41358>

//Note//: This is my first submitted patch.

Reviewers: dylanmckay, Jim

Reviewed By: dylanmckay

Subscribers: hiraditya, llvm-commits, dylanmckay, dsprenkels

Tags: #llvm

Patched by dsprenkels (Daan Sprenkels)

Differential Revision: https://reviews.llvm.org/D60365
2019-12-23 11:41:28 +08:00
Kai Luo
39f40b0810 [PowerPC] Exploit vrl(b|h|w|d) to perform vector rotation
Summary:
Currently, we set legalization action of `ISD::ROTL` vectors as
`Expand` in `PPCISelLowering`. However, we can exploit `vrl(b|h|w|d)`
to lower `ISD::ROTL` directly.

Differential Revision: https://reviews.llvm.org/D71324
2019-12-23 03:04:43 +00:00
Yonghong Song
ff3cdf07ec reland "[DebugInfo] Support to emit debugInfo for extern variables"
Commit d77ae1552fc21a9f3877f3ed7e13d631f517c825
("[DebugInfo] Support to emit debugInfo for extern variables")
added deebugInfo for extern variables for BPF target.
The commit is reverted by 891e25b02d760d0de18c7d46947913b3166047e7
as the committed tests using %clang instead of %clang_cc1 causing
test failed in certain scenarios as reported by Reid Kleckner.

This patch fixed the tests by using %clang_cc1.

Differential Revision: https://reviews.llvm.org/D71818
2019-12-22 18:28:50 -08:00
Shengchen Kan
e0d7c1965b [NFC] Remove unnecessary blank and rename align-branch-64-5b.s to align-branch-64-6a.s 2019-12-23 10:22:02 +08:00
czhengsz
cebc10697d [SCEV] add testcase for get accurate range for addrecexpr with nuw flag 2019-12-22 20:58:19 -05:00
Carl Ritson
51fc414ff4 [DAGCombiner] Check term use before applying aggressive FSUB optimisations
Summary:
Without this check unnecessary FMA instructions are generated when the FSUB terms are reused.
This also has the side-effect that the same value is computed to different levels of precision, which can create undesirable effects if the results are used together in subsequent computation.

Reviewers: arsenm, nhaehnle, foad, tpr, dstuttard, spatel

Reviewed By: arsenm

Subscribers: jvesely, wdng, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71656
2019-12-23 09:37:58 +09:00
Reid Kleckner
51fc04842b Revert "[DebugInfo] Support to emit debugInfo for extern variables"
This reverts commit d77ae1552fc21a9f3877f3ed7e13d631f517c825.

The tests committed along with this change do not pass, and should be
changed to use %clang_cc1.
2019-12-22 12:54:06 -08:00
Valentin Churavy
91f450a3a0 [SelectionDAG] Copy FP flags when visiting a binary instruction.
Summary:
We noticed in Julia that the sequence below no longer turned into
a sequence of FMA instructions in LLVM 7+, but it did in LLVM 6.

```
    %29 = fmul contract <4 x double> %wide.load, %wide.load16
    %30 = fmul contract <4 x double> %wide.load13, %wide.load17
    %31 = fmul contract <4 x double> %wide.load14, %wide.load18
    %32 = fmul contract <4 x double> %wide.load15, %wide.load19
    %33 = fadd fast <4 x double> %vec.phi, %29
    %34 = fadd fast <4 x double> %vec.phi10, %30
    %35 = fadd fast <4 x double> %vec.phi11, %31
    %36 = fadd fast <4 x double> %vec.phi12, %32
```

Unlike Clang, Julia doesn't set the `unsafe-fp-math=true` function
attribute, but rather emits more local instruction flags.

This partially undoes https://reviews.llvm.org/D46854 and if required I can try to minimize the test further.

Reviewers: spatel, mcberg2017

Reviewed By: spatel

Subscribers: chriselrod, merge_guards_bot, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71495
2019-12-22 14:29:36 -05:00
Reid Kleckner
237f4dcea2 Revert "[ARM][TypePromotion] Enable by default"
This reverts commit ee7579409b7d940c4e1314d126e900db30c4edff.

It causes crashes during ThinLTO. I suspect the issue is related to
races on the global TypeSize variable, which is 80 at the time of the
crash.
2019-12-22 11:27:11 -08:00
Craig Topper
b31ac74a47 [X86] Autogenerate complete checks. NFC 2019-12-22 11:18:37 -08:00
Craig Topper
87c35c0b71 [X86] Fix typo of intrinsic name in test cases. NFC
These said test_f32_olt_s for the type of an overloaded intrinsic.
But the parser doesn't use that part of the name and just uses
the types of the arguments.
2019-12-22 11:18:32 -08:00
Mark de Wever
a3b8bbb9dd [AMDGPU] Fixes -Wrange-loop-analysis warnings
This avoids new warnings due to D68912 adds -Wrange-loop-analysis to -Wall.

Differential Revision: https://reviews.llvm.org/D71815
2019-12-22 19:39:28 +01:00
Mark de Wever
525c1b3356 [Hexagon] Fixes -Wrange-loop-analysis warnings
This avoids new warnings due to D68912 adds -Wrange-loop-analysis to -Wall.

Differential Revision: https://reviews.llvm.org/D71814
2019-12-22 19:35:02 +01:00
Mark de Wever
918e758c84 [NVPTX] Fixes -Wrange-loop-analysis warnings
This avoids new warnings due to D68912 adds -Wrange-loop-analysis to -Wall.

Also removed the top-level const as requested by Aaron Ballman in similar
patches.

Differential Revision: https://reviews.llvm.org/D71812
2019-12-22 19:27:44 +01:00
Mark de Wever
878c0cd8fb [PowerPC] Fixes -Wrange-loop-analysis warnings
This avoids new warnings due to D68912 adds -Wrange-loop-analysis to -Wall.

Differential Revision: https://reviews.llvm.org/D71811
2019-12-22 19:23:57 +01:00
Mark de Wever
4836347b88 [Transforms] Fixes -Wrange-loop-analysis warnings
This avoids new warnings due to D68912 adds -Wrange-loop-analysis to -Wall.

Differential Revision: https://reviews.llvm.org/D71810
2019-12-22 19:20:17 +01:00
Mark de Wever
0c2c90b2f6 [Tools] Fixes -Wrange-loop-analysis warnings
This avoids new warnings due to D68912 adds -Wrange-loop-analysis to -Wall.

Differential Revision: https://reviews.llvm.org/D71808
2019-12-22 19:11:17 +01:00
Mark de Wever
fe7ca9d333 [TableGen] Fixes -Wrange-loop-analysis warnings
This avoids new warnings due to D68912 adds -Wrange-loop-analysis to -Wall.

Differential Revision: https://reviews.llvm.org/D71807
2019-12-22 18:58:32 +01:00
Philip Reames
f0044adba8 [Test] Add examples of problematic assembler auto-padding
This is in the context of the automatic padding work for the jcc erratum mitigation.  These are example cases we need to *not* pad for correctness.  Exact mechanism to suppress is still TBD, but saving the tests which have come up.
2019-12-22 09:01:04 -08:00
Sanjay Patel
0b82d3c468 [InstCombine] enhance fold for copysign with known sign arg
This is another optimization suggested in PRPR44153:
https://bugs.llvm.org/show_bug.cgi?id=44153
2019-12-22 10:07:01 -05:00
Eric Astor
00e36b584c [ms] [X86] Use "P" modifier on operands to call instructions in inline X86 assembly.
Summary:
This is documented as the appropriate template modifier for call operands.
Fixes PR44272, and adds a regression test.

Also adds support for operand modifiers in Intel-style inline assembly.

Reviewers: rnk

Reviewed By: rnk

Subscribers: merge_guards_bot, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D71677
2019-12-22 09:16:34 -05:00
Sanjay Patel
bc27e215ac [AArch64] match splat of bitcasted extract subvector to DUPLANE
This is another potential regression exposed by D63815.

Here we peek through a bitcast to find an extract subvector and
scale the splat offset based on that:
splat (bitcast (extract X, C)), LaneC --> duplane (bitcast X), LaneC'

Differential Revision: https://reviews.llvm.org/D71672
2019-12-22 08:37:03 -05:00
David Blaikie
8197755242 DebugInfo: Remove out of date comment 2019-12-21 23:13:26 -08:00
LLVM GN Syncbot
4e17d93dee [gn build] Port 7376d9eb389 2019-12-22 02:15:02 +00:00
Nico Weber
587ab43da0 [gn build] fixup after c3d13d9c56 2019-12-21 21:14:26 -05:00
Nico Weber
1361644edc [gn build] fold Basic:version into Basic
This now defines HAVE_VCS_VERSION_INC for all files in Basic,
but now the BUILD.gn file has only a single "sources" field again,
and the automerger requires that. Having the automerger work for
clang/lib/Basic is a very nice to have, and the downside seems tiny.
2019-12-21 21:10:02 -05:00
Simon Pilgrim
64e7c37e84 Fix "result of 32-bit shift implicitly converted to 64 bits" warning. NFC. 2019-12-21 17:45:30 +00:00
Simon Pilgrim
94093a9d23 Fix Wpedantic 'extra semicolon' warning. NFC. 2019-12-21 17:32:00 +00:00
Sanjay Patel
0440e33c6b [InstCombine] check alloc size in bitcast of geps fold (PR44321)
We missed a constraint in D44833
when folding a bitcast into a GEP with vector/array types.
If the alloc sizes specified by the datalayout don't match,
this could miscompile as shown in:
https://bugs.llvm.org/show_bug.cgi?id=44321

Differential Revision: https://reviews.llvm.org/D71771
2019-12-21 10:31:21 -05:00
Sanjay Patel
a6e1f3d2ea [SimplifyLibCalls] require fast-math-flags for pow(X, -0.5) transforms
As discussed in PR44330:
https://bugs.llvm.org/show_bug.cgi?id=44330
...the transform from pow(X, -0.5) libcall/intrinsic to
reciprocal square root can result in small deviations from
the expected result due to differences in the pow()
implementation and/or the extra rounding step from the division.

This patch proposes to allow that difference with either the
'approximate functions' or 'reassociate' FMF:
http://llvm.org/docs/LangRef.html#fast-math-flags

In practice, this likely means that the code is compiled with
all of 'fast' (-ffast-math), but I have preserved the existing
specializations for -0.0/-INF that enable generating safe code
if those special values are allowed simultaneously with
allowing approximation/reassociation.

The question about whether a similar restriction is needed for
the non-reciprocal case -- pow(X, 0.5) -- is deferred. That
transform is allowed without FMF currently, and this patch does
not change that behavior.

Differential Revision: https://reviews.llvm.org/D71706
2019-12-21 10:00:53 -05:00
Florian Hahn
1dcaf28381 [AArch64] Respect reserved registers while renaming in LdSt opt.
We cannot pick reserved registers as rename registers.

Fixes https://bugs.llvm.org/show_bug.cgi?id=44358
2019-12-21 15:10:07 +01:00
Matt Arsenault
133fc88f3b AMDGPU: Fix repeated word in comment 2019-12-21 04:57:35 -05:00
Matt Arsenault
e75a9647dd Mips: Make test resistant to future changes
This seems to have been relying on extra spills being inserted in
these blocks to increase the code size to trigger branch
relaxation. This broke when these spills were avoided. Add some asm to
pad the size of the blocks to make it not matter.
2019-12-21 04:56:20 -05:00
Matt Arsenault
3f41ea1bc1 AMDGPU/GlobalISel: Fix misuse of div_scale intrinsics
Confusingly, the intrinsic operands do not match the
instruction/custom node. The order is shuffled, and the 3rd operand is
an immediate to select operands.

I'm not 100% sure I did this right, but fdiv still doesn't select end
to end and it will be easier to tell when it does. This at least
avoids an assertion in RegBankSelect and allows hitting the fallback
on selection.
2019-12-21 04:55:36 -05:00
Matt Arsenault
0a495d2b92 AMDGPU/GlobalISel: Fix missing scc imp-def on scalar and/or/xor 2019-12-21 04:55:36 -05:00
Matt Arsenault
a6c9caf2a3 AMDGPU/GlobalISel: Simplify code
This can directly access the register bank, and doesn't need to get it
through the ID.
2019-12-21 04:55:36 -05:00
Lang Hames
24ee3b266f [ORC] De-register eh-frames in the RTDyldObjectLinkingLayer destructor.
This matches the behavior of the legacy layer, which automatically deregistered
frames.
2019-12-20 21:10:49 -08:00
Nico Weber
6cb56ea0a6 fix another doc typo to cycle bots 2019-12-20 21:59:51 -05:00