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Author SHA1 Message Date
Charles Davis
bb99a68546 Turns out GAS does have Win64 EH directives. (It also supports WinCE EH.) Make 
ours compatible with GAS.

In retrospect, I should have emailed binutils about this earlier. Thanks to
Kai Tietz for pointing out that GAS already had SEH directives.

llvm-svn: 131652
 2011-05-19 17:46:39 +00:00
Jim Grosbach
db1450056a 80 columns. 
llvm-svn: 131649
 2011-05-19 17:34:53 +00:00
Joerg Sonnenberger
951d2761f6 Introduce -fatal-assembler-warnings for the obvious purpose 
llvm-svn: 131644
 2011-05-19 17:27:01 +00:00
Akira Hatanaka
fb42792a55 Fix data layout string. i64 is aligned to 64 bit boundaries. 
llvm-svn: 131642
 2011-05-19 17:21:09 +00:00
Stuart Hastings
7baa1babdb Revise MOVSX16rr8/MOVZX16rr8 (and rm variants) to no longer be 
pseudos.  rdar://problem/8614450

llvm-svn: 131641
 2011-05-19 16:59:50 +00:00
Cameron Zwarich
0b52f1e647 Use the correct register class for Cell varargs spilling. This fixes all of the 
verifier failures in the CodeGen/CellSPU tests.

llvm-svn: 131631
 2011-05-19 04:44:19 +00:00
Mon P Wang
9c138e7a7d Fixed sdiv and udiv for <4 x i16>. The test from r125402 still applies for this change. 
llvm-svn: 131630
 2011-05-19 04:15:07 +00:00
Charles Davis
e6942fd10b Implement the StartChained and EndChained Win64 EH methods on MCStreamer. 
llvm-svn: 131629
 2011-05-19 04:04:13 +00:00
Cameron Zwarich
fa285d651f Make CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll pass with the verifier. 
llvm-svn: 131627
 2011-05-19 03:11:06 +00:00
Cameron Zwarich
b5755a9dc2 Fix PR8828 by removing the explicit def in MovePCToLR as well as the pointless 
piclabel operand. The operand in the tablegen definition doesn't actually turn
into an MI operand, so it just confuses anything checking the TargetInstrDesc
for the number of operands. It suffices to just have an implicit def of LR.

llvm-svn: 131626
 2011-05-19 02:56:28 +00:00
Cameron Zwarich
860c52b752 Reuse the TargetInstrDesc. 
llvm-svn: 131625
 2011-05-19 02:56:23 +00:00
Charles Davis
2940df3099 Implement the StartProc and EndProc Win64 EH methods on the base MCStreamer. 
Based largely on Rafael Espindola's work on CFI. Other methods soon to follow.

llvm-svn: 131623
 2011-05-19 02:49:00 +00:00
Rafael Espindola
4ebe940cd4 revert 131605 to fix PR9946. 
llvm-svn: 131620
 2011-05-19 02:26:30 +00:00
Cameron Zwarich
eadbf0c427 Correctly constrain a register class when computing frame offsets, as the Thumb2 
add instruction takes an rGPR. This fixes the last of PR8825.

llvm-svn: 131619
 2011-05-19 02:18:27 +00:00
Cameron Zwarich
6fbc514611 Revert r128961 because it didn't include a test and causes the verifier to fail 
on CodeGen/X86/2007-05-07-InvokeSRet.ll. There is probably a bug here that was
fixed by r128961, but since there is no test or reference to a source file I have
to revert it.

llvm-svn: 131618
 2011-05-19 01:56:19 +00:00
Eli Friedman
9f62600eb7 Make the demanded bits/elements optimizations preserve debug line information. 
I'm not sure this is quite ideal, but I can't really think of any better way to do it.

llvm-svn: 131616
 2011-05-19 01:20:42 +00:00
Jim Grosbach
02bb9abfb3 Avoid a Twine that referenced a tmp (which proceded to go out of scope before 
the Twine was used).

llvm-svn: 131612
 2011-05-19 00:45:05 +00:00
Devang Patel
c5390e2f7f Use IRBuilder. 
llvm-svn: 131609
 2011-05-19 00:13:33 +00:00
Devang Patel
ecb22f0544 Use IRBuilder while simplifying unreachable. 
llvm-svn: 131607
 2011-05-19 00:09:21 +00:00
Rafael Espindola
0a9911d920 Revert my previous patch. The cmake build had already been fixed. 
llvm-svn: 131606
 2011-05-19 00:02:45 +00:00
Devang Patel
fa6d0b4f84 Use IRBuilder while simplifying conditional branch. 
llvm-svn: 131605
 2011-05-18 23:59:51 +00:00
Eli Friedman
40a0353b96 More instcombine cleanup, towards improving debug line info. 
llvm-svn: 131604
 2011-05-18 23:58:37 +00:00
Jim Grosbach
35c032eb5e Restore sanity to 131601. 
llvm-svn: 131603
 2011-05-18 23:56:43 +00:00
Rafael Espindola
587fa89510 Fix the cmake build. 
llvm-svn: 131602
 2011-05-18 23:56:40 +00:00
Jim Grosbach
e8791ab417 Objective C functions may use a magic '\1' on the name. Handle that when 
dealing with them in the MCJIT.

llvm-svn: 131601
 2011-05-18 23:53:21 +00:00
Eli Friedman
98235fd498 Shuffle StandardPasses.cpp into VMCore; add it to CMake. 
llvm-svn: 131600
 2011-05-18 23:51:11 +00:00
Devang Patel
877a16ea33 Use IRBuilder while simplifying branch. 
llvm-svn: 131598
 2011-05-18 23:18:47 +00:00
Eli Friedman
2bfd6b0b85 Revert unintentional commit. 
llvm-svn: 131597
 2011-05-18 23:13:10 +00:00
Eli Friedman
2fa7bea638 More instcombine simplifications towards better debug locations. 
llvm-svn: 131596
 2011-05-18 23:11:30 +00:00
Cameron Zwarich
d9f5d9fadc Add missing mayLoad / mayStore flags to instruction definitions without patterns, 
which fixes all of the CodeGen/MBlaze verifier failures.

llvm-svn: 131595
 2011-05-18 23:03:10 +00:00
Cameron Zwarich
8164175e57 Reserve the segment registers on x86 to fix verifier failures in any code that 
uses them.

llvm-svn: 131591
 2011-05-18 22:24:48 +00:00
Charles Davis
844da78338 Remove comments as Chris requested. 
llvm-svn: 131590
 2011-05-18 22:13:51 +00:00
Cameron Zwarich
a3f4c0021f Reserve r29 on Alpha. This fixes all verifier failures in CodeGen/Alpha. 
llvm-svn: 131587
 2011-05-18 21:54:32 +00:00
Tanya Lattner
6814933ea6 Handle perfect shuffle case that generates a vrev for vectors of floats. 
Add test case.

llvm-svn: 131582
 2011-05-18 21:44:54 +00:00
Eli Friedman
e1ee02ff3d Third pass at allowing plugins to modify default passes. This time with a tweak so that we don't depend on an uninitialized argument. 
llvm-svn: 131581
 2011-05-18 21:40:04 +00:00
Devang Patel
3f94bed4e4 Use IRBuilder while simplifying return instruction. 
llvm-svn: 131580
 2011-05-18 21:33:11 +00:00
Cameron Zwarich
e410478ca7 Fix an obvious typo in r131572. 
llvm-svn: 131579
 2011-05-18 21:29:07 +00:00
Cameron Zwarich
f0b9f9d4c9 Fix more of PR8825. Now all of CodeGen/ARM passes with VerifyCoalescing turned on. 
llvm-svn: 131578
 2011-05-18 21:25:14 +00:00
Dan Gohman
13dc3428b9 When forming an ICmpZero LSRUse, normalize the non-IV operand 
of the comparison, so that the resulting expression is fully
normalized. This fixes PR9939.

llvm-svn: 131576
 2011-05-18 21:02:18 +00:00
Charles Davis
48ea9389dc Add some more Win64 EH directives: 
- StartChained and EndChained delimit a chained unwind area, which can contain
  additional operations to be undone if an exception occurs inside of it.
- UnwindOnly declares that this function doesn't handle any exceptions. If it
  has a handler, it's an unwind handler instead of an exception handler.
- Lsda declares the location and size of the LSDA, which in the Win64 EH
  scheme is kept inside the UNWIND_INFO struct. Windows itself ignores the
  LSDA; it's used by the Language-Specific Handler (the "Personality Function"
  from DWARF).

llvm-svn: 131572
 2011-05-18 20:54:10 +00:00
Devang Patel
3549e33227 Spread use of IRBuilder even more. 
llvm-svn: 131571
 2011-05-18 20:53:17 +00:00
Eli Friedman
530e34b4af Revert r131556; it's breaking buildbots/clang tests. 
llvm-svn: 131567
 2011-05-18 20:39:27 +00:00
Devang Patel
fd9b1daf82 Use IRBuilder while simplifying switch instruction. 
llvm-svn: 131566
 2011-05-18 20:35:38 +00:00
Johnny Chen
3d6c5f4876 Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immediate operand. 
llvm-svn: 131565
 2011-05-18 20:32:41 +00:00
Devang Patel
40690a2df4 Use IRBuilder while simplifying unwind. 
llvm-svn: 131561
 2011-05-18 20:01:18 +00:00
Chad Rosier
be943c5d9a Enables vararg functions that pass all arguments via registers to be optimized into tail-calls when possible. 
llvm-svn: 131560
 2011-05-18 19:59:50 +00:00
Eli Friedman
889faa7ead More instcombine cleanup aimed towards improving debug line info. 
llvm-svn: 131559
 2011-05-18 19:57:14 +00:00
David Chisnall
b2d7afdada Second pass at allowing plugins to modify default passes. This time without bonus inter-library dependencies. 
llvm-svn: 131556
 2011-05-18 19:00:41 +00:00
Evan Cheng
4787dc8f70 Revise r131553. Just use the type of the input node and forgo the bitcast. rdar://9449159. 
llvm-svn: 131555
 2011-05-18 18:59:17 +00:00
Evan Cheng
ea3c2f0e60 Fix an ARMTargetLowering::LowerSELECT bug: legalized result must have same type as input. Sorry test cases only trigger when dag combine is disabled. rdar://9449178 
llvm-svn: 131553
 2011-05-18 18:47:27 +00:00
Devang Patel
f0b8a243b9 Use IRBuilder while simplifying terminator. 
llvm-svn: 131552
 2011-05-18 18:43:31 +00:00
Devang Patel
faedd704bb Use IRBuilder while simplifying unconditional branch. 
llvm-svn: 131551
 2011-05-18 18:28:48 +00:00
Devang Patel
9249a85cdc Use IRBuilder while folding two entry PHINode. 
llvm-svn: 131548
 2011-05-18 18:16:44 +00:00
Eli Friedman
467850313a Switch more inst insertion in instcombine to IRBuilder. 
llvm-svn: 131547
 2011-05-18 18:10:28 +00:00
Devang Patel
6eb1a7bd09 Set up IRBuilder for use during simplification. 
llvm-svn: 131545
 2011-05-18 18:01:27 +00:00
Eli Friedman
501239ebda Switch more inst insertion in instcombine to IRBuilder. 
llvm-svn: 131544
 2011-05-18 17:58:37 +00:00
Matt Beaumont-Gay
7472bb0a7e fix typo 
llvm-svn: 131543
 2011-05-18 17:37:10 +00:00
Eli Friedman
7ba2fd017e Switch inst insertion in instcombine transform to IRBuilder. 
llvm-svn: 131542
 2011-05-18 17:31:55 +00:00
Devang Patel
a6e4c7a441 Use IRBuiler while constant folding terminator. 
llvm-svn: 131541
 2011-05-18 17:26:46 +00:00
Stuart Hastings
5047039d6d Fix inelegant initialization. 
llvm-svn: 131538
 2011-05-18 15:54:26 +00:00
Justin Holewinski
eb209f0916 PTX: add flag to disable mad/fma selection 
Patch by Dan Bailey

llvm-svn: 131537
 2011-05-18 15:42:23 +00:00
Duncan Sands
d3292b9f1e Revert commit 131534 since it seems to have broken several buildbots. 
Original log entry:
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.

llvm-svn: 131536
 2011-05-18 14:57:56 +00:00
Nadav Rotem
b7d689c706 Refactor getActionType and getTypeToTransformTo ; place all of the 'decision' 
code in one place.

llvm-svn: 131534
 2011-05-18 12:26:38 +00:00
Duncan Sands
2f982a147f Now that SrcBits and DestBits always represent the primitive size, rather 
than either the primitive size or the element primitive size (in the case
of vectors), simplify the vector logic.  No functionality change.  There
is some distracting churn in the patch because I lined up comments better
while there - sorry about that.

llvm-svn: 131533
 2011-05-18 10:59:25 +00:00
Duncan Sands
4a18d9e5d2 Tighten up checking of the validity of casts. (1) The IR parser would 
happily accept things like "sext <2 x i32> to <999 x i64>".  It would
also accept "sext <2 x i32> to i64", though the verifier would catch
that later.  Fixed by having castIsValid check that vector lengths match
except when doing a bitcast.  (2) When creating a cast instruction, check
that the cast is valid (this was already done when creating constexpr
casts).  While there, replace getScalarSizeInBits (used to allow more
vector casts) with getPrimitiveSizeInBits in getCastOpcode and isCastable
since vector to vector casts are now handled explicitly by passing to the
element types; i.e. this bit should result in no functional change.

llvm-svn: 131532
 2011-05-18 09:21:57 +00:00
Duncan Sands
b68c17bcb8 Teach getCastOpcode about element-by-element vector casts. For example, "trunc" 
can be used to turn a <4 x i64> into a <4 x i32> but getCastOpcode would assert
if you passed these types to it.  Note that this strictly extends the previous
functionality: if getCastOpcode previously accepted two vector types (i.e. didn't
assert) then it still will and returns the same opcode (BitCast).  That's because
before it would only accept vectors with the same bitwidth, and the new code only
touches vectors with the same length.  However if two vectors have both the same
bitwidth and the same length then their element types have the same bitwidth, so
the new logic will return BitCast as before.

llvm-svn: 131530
 2011-05-18 07:13:41 +00:00
Tanya Lattner
06cb9cbf98 In r131488 I misunderstood how VREV works. It splits the vector in half and splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32. 
Updated test case and reverted change to the PerfectShuffle Table.

llvm-svn: 131529
 2011-05-18 06:42:21 +00:00
Charles Davis
2e7d0eef98 Implement the Win64 EH directive methods for the assembly language streamer. 
GAS has no such directives (not even mingw-w64 GAS has them), so I took
creative license with their names in assembly. I prefixed them all with
"w64_" to avoid namespace collisions, for example. If I discover that GAS
has taken a different approach, I'll change ours to match.

llvm-svn: 131525
 2011-05-18 04:58:05 +00:00
Jakob Stoklund Olesen
2310f43683 Eliminate dead dead code elimination code. 
llvm-svn: 131524
 2011-05-18 04:51:15 +00:00
Jakob Stoklund Olesen
cd6bbe0171 Also use shrinkToUses after AdjustCopiesBackFrom(). 
The 'last use' may not be in the same basic block, and we still want a correct
live range.

llvm-svn: 131523
 2011-05-18 04:51:12 +00:00
Charles Davis
81fa5ec5c3 While thinking about how to know where the functions' boundaries are for 
the purposes of the Win64 EH tables, I realized we had no way to tell where
the function ends. (MASM bounds functions with PROC and ENDP keywords.)
Add a directive to delimit the end of the function, and rename the 'frame'
directive to more accurately reflect its duality with the new directive.

llvm-svn: 131522
 2011-05-18 04:47:22 +00:00
Jakob Stoklund Olesen
504b1bd8ab Properly shrink live ranges after deleting dead copies. Clean up after all joined copies. 
LiveInterval::shrinkToUses recomputes the live range from scratch instead of
removing snippets. This should avoid the problem with dangling live ranges.

Leave physreg identity copies alone. They can be created when joining a virtreg
with a physreg. They don't affect register allocation, and they will be removed
by the rewriter.

llvm-svn: 131521
 2011-05-18 04:18:19 +00:00
Cameron Zwarich
b89a768a61 Fix typo. 
llvm-svn: 131519
 2011-05-18 02:29:50 +00:00
Cameron Zwarich
b922060f98 Fix more of PR8825 by correctly using rGPR registers when lowering atomic 
compare-and-swap intrinsics.

llvm-svn: 131518
 2011-05-18 02:20:07 +00:00
Eli Friedman
5d2823e452 Start trying to make InstCombine preserve more debug info. The idea here is to set the debug location on the IRBuilder, which will be then right location in most cases. This should magically give many transformations debug locations, and fixing places which are missing a debug location will usually just means changing the code creating it to use the IRBuilder. 
As an example, the change to InstCombineCalls catches a common case where a call to a bitcast of a function is rewritten.

Chris, does this approach look reasonable?

llvm-svn: 131516
 2011-05-18 01:28:27 +00:00
Eli Friedman
358d9a5af3 Use ReplaceInstUsesWith instead of replaceAllUsesWith where appropriate in instcombine. 
llvm-svn: 131512
 2011-05-18 00:32:01 +00:00
Devang Patel
b75e746499 Preseve line numbers while simplifying CFG. 
llvm-svn: 131508
 2011-05-17 23:29:05 +00:00
Cameron Zwarich
ed470705c0 Actually, the address operand of the Thumb2 LDREX / STREX instructions *can* 
take r13, so we can just make it a GPR. This fixes PR8825.

llvm-svn: 131507
 2011-05-17 23:26:20 +00:00
Cameron Zwarich
15807bac51 Correct a minor problem with the Thumb2 LDREX and STREX instruction encodings. They 
were marked as taking a tGPR when in reality they take an rGPR.

llvm-svn: 131506
 2011-05-17 23:11:12 +00:00
Bill Wendling
f4cb799615 Conditionalize the format of the GCOV files by target type. Darwin uses the 4.2 
format.

llvm-svn: 131503
 2011-05-17 23:05:13 +00:00
Eli Friedman
ade6f78867 Make fast-isel miss counting in -stats and -fast-isel-verbose take terminators into account; since there are many fewer isel misses with recent changes, misses caused by terminators are more significant. 
llvm-svn: 131502
 2011-05-17 23:02:10 +00:00
Dan Gohman
834a63625d Misc. code cleanups. 
llvm-svn: 131497
 2011-05-17 22:22:52 +00:00
Dan Gohman
5d23a937f7 Misc. code cleanups. 
llvm-svn: 131495
 2011-05-17 22:20:36 +00:00
Stuart Hastings
719cee1aa8 X86 pmovsx/pmovzx ignore the upper half of their inputs. 
rdar://problem/6945110

llvm-svn: 131493
 2011-05-17 22:13:31 +00:00
Tanya Lattner
7145d69427 vrev is incorrectly defined in the perfect shuffle table. The ordering is backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case. 
llvm-svn: 131488
 2011-05-17 20:48:40 +00:00
Devang Patel
b7b53e9a24 Preserve line number information. 
llvm-svn: 131482
 2011-05-17 20:00:02 +00:00
Devang Patel
9a0301219b Set debug loc for new load instruction. 
llvm-svn: 131481
 2011-05-17 19:43:38 +00:00
Devang Patel
8a2b06e577 Preserve line number information. 
llvm-svn: 131480
 2011-05-17 19:43:06 +00:00
Mon P Wang
602defb22e Enable autodetect of popcnt 
llvm-svn: 131476
 2011-05-17 18:33:37 +00:00
Eli Friedman
ba315a4fcc Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872. 
This is r131438 with a couple small fixes.

llvm-svn: 131474
 2011-05-17 18:29:03 +00:00
Eli Friedman
42d94ce561 Clean up the mess created by r131467+r131469. 
llvm-svn: 131471
 2011-05-17 18:02:22 +00:00
Stuart Hastings
581113d8a0 Revert 131467 due to buildbot complaint. 
llvm-svn: 131469
 2011-05-17 16:59:46 +00:00
Stuart Hastings
a2509a7ec3 Fix an obscure issue in X86_64 parameter passing: if a tiny byval is 
passed as the fifth parameter, insure it's passed correctly (in R9).
rdar://problem/6920088

llvm-svn: 131467
 2011-05-17 16:45:55 +00:00
Jakob Stoklund Olesen
6645e60d56 Tweak cross-class coalescing to be more aggressive when the target class is small. 
The greedy register allocator has live range splitting and register class
inflation, so it can actually fully undo this join, including restoring the
original register classes.

We still don't want to do this for long live ranges, mostly because of the high
register pressure of there are many constrained live ranges overlapping.

llvm-svn: 131466
 2011-05-17 16:38:37 +00:00
Rafael Espindola
d086472933 Don't include information about the build into the information returned by 
getHostTriple. This fixes a 32 bit clang running on a 64 bit ubuntu.

llvm-svn: 131463
 2011-05-17 15:26:34 +00:00
Nadav Rotem
1b263b575b Fix a bug in PerformEXTRACT_VECTOR_ELTCombine. The code created an ADD SDNode 
with two different types, in cases where the index and the ptr had different
types.

llvm-svn: 131461
 2011-05-17 08:31:57 +00:00
Eric Christopher
d613c05f26 Update comment. 
llvm-svn: 131459
 2011-05-17 08:16:14 +00:00
Eric Christopher
c03ef7ebb3 Support XOR and AND optimization with no return value. 
Finishes off rdar://8470697

llvm-svn: 131458
 2011-05-17 08:10:18 +00:00
Eric Christopher
f81a665961 Couple less magic numbers. 
llvm-svn: 131457
 2011-05-17 07:50:41 +00:00
Eric Christopher
dc12267689 Make this code a little less magic number laden. 
llvm-svn: 131456
 2011-05-17 07:47:55 +00:00
Chris Lattner
294ec479fb add a note 
llvm-svn: 131455
 2011-05-17 07:22:33 +00:00
Eli Friedman
3aa2fe389f Back out r131444 and r131438; they're breaking nightly tests. I'll look into 
it more tomorrow.

llvm-svn: 131451
 2011-05-17 02:36:59 +00:00
Eli Friedman
8c4de16d2b Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872. 
llvm-svn: 131438
 2011-05-17 00:13:47 +00:00
Owen Anderson
ba8b3af7d8 @llvm.lifetime.begin acts as a load, not @llvm.lifetime.end. 
llvm-svn: 131437
 2011-05-17 00:05:49 +00:00
Jakob Stoklund Olesen
16f11212fc Teach LiveInterval::isZeroLength about null SlotIndexes. 
When instructions are deleted, they leave tombstone SlotIndex entries.
The isZeroLength method should ignore these null indexes.

This causes RABasic to sometimes spill a callee-saved register in the
abi-isel.ll test, so don't run that test with -regalloc=basic.  Prioritizing
register allocation according to spill weight can cause more registers to be
used.

llvm-svn: 131436
 2011-05-16 23:50:05 +00:00
Jim Grosbach
d7352e9b02 Kill some dead code. 
llvm-svn: 131431
 2011-05-16 22:24:07 +00:00
Dan Gohman
9a55240376 Delete unused variables. 
llvm-svn: 131430
 2011-05-16 22:19:54 +00:00
Dan Gohman
9ea3bcc685 Trim #includes. 
llvm-svn: 131429
 2011-05-16 22:14:50 +00:00
Dan Gohman
2d7dc7849f Fix whitespace and 80-column violations. 
llvm-svn: 131428
 2011-05-16 22:09:53 +00:00
Devang Patel
8cf3c94ae5 There is no need to force DebugLoc on a PHI at this point. 
llvm-svn: 131427
 2011-05-16 22:05:03 +00:00
Jim Grosbach
59a8c1aa5b Track how many insns fast-isel successfully selects as well as how many it 
misses.

llvm-svn: 131426
 2011-05-16 21:51:07 +00:00
Eli Friedman
23e7691f59 Remove dead code. Fix associated test to use FileCheck. 
llvm-svn: 131424
 2011-05-16 21:28:22 +00:00
Devang Patel
9f871794b6 Preserve debug info for unused zero extended boolean argument. 
Radar 9422775.

llvm-svn: 131422
 2011-05-16 21:24:05 +00:00
Charles Davis
173b0d324a Add a method I forgot in the last commit. Don't worry, this one passed 
self-host :).

llvm-svn: 131421
 2011-05-16 21:13:58 +00:00
Eli Friedman
cb60e2293f Make fast-isel work correctly s/uadd.with.overflow intrinsics. 
llvm-svn: 131420
 2011-05-16 21:06:17 +00:00
Eli Friedman
bd237ec411 Fix silly typo. 
llvm-svn: 131419
 2011-05-16 20:34:53 +00:00
Eli Friedman
5f1b7e4153 Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon. 
llvm-svn: 131417
 2011-05-16 20:27:46 +00:00
Jason W Kim
4b3c43cf90 Add a FIXME reminder to remove ForceARMElfPIC switch. 
llvm-svn: 131411
 2011-05-16 16:35:21 +00:00
Rafael Espindola
e0b15205c1 sets bit 0 of the function address of thumb function in .symtab 
("T is 1 if the target symbol S has type STT_FUNC and the
symbol addresses a Thumb instruction ;it is 0 otherwise."
from "ELF for the ARM Architecture" 4.7.1.2)

Patch by Koan-Sin Tan!

llvm-svn: 131406
 2011-05-16 16:17:21 +00:00
Rafael Espindola
1f7c831e4f Extra refactoring noticed by Eli Friedman. 
llvm-svn: 131405
 2011-05-16 15:48:45 +00:00
Rafael Espindola
113d944ce4 Don't do tail calls in a function that call setjmp. The stack might be 
corrupted when setjmp returns again.

llvm-svn: 131399
 2011-05-16 03:05:33 +00:00
Charles Davis
576f65b4b2 Fix copy-pasto. 
llvm-svn: 131384
 2011-05-15 17:28:27 +00:00
Charles Davis
900df11077 Add stub methods to MCStreamer for emitting Win64 exception-handling 
information.

llvm-svn: 131382
 2011-05-15 17:20:01 +00:00
Benjamin Kramer
5943d0a3ee SimplifyCFG: Use ComputeMaskedBits to prune dead cases from switch instructions. 
llvm-svn: 131345
 2011-05-14 15:57:25 +00:00
Stuart Hastings
725bd9a3a1 Avoid combining GEPs that might overflow at runtime. 
rdar://problem/9267970

Patch by Julien Lerouge!

llvm-svn: 131339
 2011-05-14 05:55:10 +00:00
Eli Friedman
559f908ca7 Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic from the x86 code to the generic code. 
llvm-svn: 131332
 2011-05-14 00:47:51 +00:00
Rafael Espindola
98372d430c Don't produce a vmovntdq if we don't have AVX support. 
llvm-svn: 131330
 2011-05-14 00:30:01 +00:00
Eli Friedman
841249aeb2 Zap useless code; this hasn't done anything useful since fast-isel switched to being bottom-up (a very long time ago). 
llvm-svn: 131329
 2011-05-14 00:19:32 +00:00
Jim Grosbach
86489a32cf Be a bit more permissive about symbols we don't understand. Just skip them 
rather than throwing an error.

llvm-svn: 131322
 2011-05-13 23:11:30 +00:00
Dylan Noblesmith
e3f823351d ExecutionEngine: move createJIT() definition (v2) 
As an ExecutionEngine class function, its definition
really belongs in ExecutionEngine.cpp, not JIT.cpp.

llvm-svn: 131320
 2011-05-13 22:02:53 +00:00
Dylan Noblesmith
7181ae008c ExecutionEngine: push TargetMachine creation into clients (v2) 
In particular, into EngineBuilder. This should only impact
the private API between the EE and EB classes, not external
clients, since JITCtor and MCJITCtor are both protected members.

llvm-svn: 131317
 2011-05-13 21:51:29 +00:00
Dylan Noblesmith
2af2081287 ExecutionEngine: fix JIT/MCJIT selectTarget() duplication (v2) 
This prepares for making JITCtor/MCJITCtor take a
TargetMachine* directly from clients like EngineBuilder.

llvm-svn: 131316
 2011-05-13 21:36:16 +00:00
Jim Grosbach
ed5d966802 Teach the RtDyld to tell the memory manager about how much space a function 
actually takes rather than how much memory was allocated for it. This
is more accurate and should help the manager pack things more effectively.

llvm-svn: 131305
 2011-05-13 20:12:14 +00:00
Rafael Espindola
95d9ad78ea Make codegen able to handle values of empty types. This is one way 
to fix PR9900. I will keep it open until sable is able to comment on it.

llvm-svn: 131294
 2011-05-13 15:18:06 +00:00
Julien Lerouge
b2c1721752 Fix a source of non determinism in FindUsedTypes, use a SetVector instead of a 
set.

rdar://9423996

llvm-svn: 131283
 2011-05-13 05:20:42 +00:00
Andrew Trick
9bf6279f98 Convert SimplifyIVUsers into a worklist instead of a single pass over 
the users.

llvm-svn: 131277
 2011-05-13 01:12:21 +00:00
Stuart Hastings
5fb280fd39 Since I can't reproduce the failures from 131261, re-trying with a 
simplified version.  <rdar://problem/9298790>

llvm-svn: 131274
 2011-05-13 00:51:54 +00:00
Stuart Hastings
b362a9bcc6 Revert 131266 and 131261 due to buildbot complaints. 
rdar://problem/9298790

llvm-svn: 131269
 2011-05-13 00:15:17 +00:00
Stuart Hastings
d106d72681 Non-fast-isel followup to 129634; correctly handle branches controlled 
by non-CMP expressions.  The executable test case (129821) would test
this as well, if we had an "-O0 -disable-arm-fast-isel" LLVM-GCC
tester.  Alas, the ARM assembly would be very difficult to check with
FileCheck.

The thumb2-cbnz.ll test is affected; it generates larger code (tst.w
vs. cmp #0), but I believe the new version is correct.
rdar://problem/9298790

llvm-svn: 131261
 2011-05-12 23:36:41 +00:00
Evan Cheng
43393670c9 Update comment. 
llvm-svn: 131258
 2011-05-12 22:35:48 +00:00
Devang Patel
dd08ae41c6 Doug convinced me that DW_AT_APPLE_objc_complete_type is more appropriate name. 
s/DW_AT_APPLE_objc_class_extension/DW_AT_APPLE_objc_complete_type/g

llvm-svn: 131244
 2011-05-12 21:29:42 +00:00
Jim Grosbach
dc7e74edfa MCJIT section loading should just skip non-text sections rather than 
erroring out completely. Some modules produce sections that aren't referenced,
so it's friendlier to clients like LLDB to just skip them, at least for now.

llvm-svn: 131243
 2011-05-12 21:21:16 +00:00
Evan Cheng
f3eb9e3262 Re-enable branchfolding common code hoisting optimization. Fixed a liveness test bug and also taught it to update liveins. 
llvm-svn: 131241
 2011-05-12 20:30:01 +00:00
Devang Patel
b865dd6a20 Let Objective-C front-end identify class extension, in dwarf output, using an attribute DW_AT_APPLE_objc_class_extension. 
llvm-svn: 131238
 2011-05-12 19:06:16 +00:00
Evan Cheng
2c6e581865 Temporarily disable the transformation. It's breaking 186.crafty in some configuration. 
llvm-svn: 131235
 2011-05-12 18:44:58 +00:00
Jim Grosbach
245420ff79 The MCJIT memory manager needs to initialize its Module member. 
llvm-svn: 131234
 2011-05-12 18:21:23 +00:00
Akira Hatanaka
a57b77b65f Fix setting of isCommutable flag. 
llvm-svn: 131233
 2011-05-12 17:42:08 +00:00
Evan Cheng
5ff60c7364 Re-commit 131172 with fix. MachineInstr identity checks should check dead 
markers. In some cases a register def is dead on one path, but not on
another.

This is passing Clang self-hosting.

llvm-svn: 131214
 2011-05-12 00:56:58 +00:00
Andrew Trick
3e6beb9889 indvars: Added SimplifyIVUsers. 
Interleave IV simplifications. Currently involves EliminateComparison
and EliminateRemainder. Next I'll add EliminateExtend.

llvm-svn: 131210
 2011-05-12 00:04:28 +00:00
Matt Beaumont-Gay
20dbed0a8b Remove an unused variable and move a couple others inside DEBUG. 
llvm-svn: 131208
 2011-05-11 23:34:51 +00:00
Jason W Kim
f6c2c6a38e Address the last bit of relocation flag related divergence betweeen 
LLVM and binutils.

With this patch, there are no functional differences between the .o
produced directly from LLVM versus the .s to .o via GNU as, for relocation tags
at least, for both PIC and non-PIC modes.

Because some non-PIC reloc tags are used (legally) on PIC, so IsPCRel flag is
necessary but not sufficient to determine whether the overall codegen mode is
PIC or not. Why is this necessary? There is an incompatibility of how relocs
are emitted in the .rodata section.  Binutils PIC likes to emit certain relocs
as section relative offsets.  Non-PIC does not do this.

So I added a hidden switch on the ELFObjectwriter "-arm-elf-force-pic" which
forces the objectwriter to pretend that all relocs are for PIC mode.


Todo: Activate ForceARMElfPIC to true if -relocation-model=pic is selected
on llc.

Todo: There are probably more issues for PIC mode on ARM/MC/ELF...

Todo: Existing tests in MC/ARM/elf-reloc*.ll need to be converted over to .s 
tests as well as expanded to cover the gamut.

llvm-svn: 131205
 2011-05-11 22:53:06 +00:00
Eric Christopher
281a4a4550 Turn this into a table, this will make more sense shortly. 
Part of rdar://8470697

llvm-svn: 131200
 2011-05-11 21:44:58 +00:00
Devang Patel
344808fbe5 Identify end of prologue (and beginning of function body) using DW_LNS_set_prologue_end line table opcode. 
llvm-svn: 131194
 2011-05-11 19:22:19 +00:00
Jakob Stoklund Olesen
0e9c54a422 Avoid hoisting spills when looking at a copy from another register that is also 
about to be spilled.

This can only happen when two extra snippet registers are included in the spill,
and there is a copy between them. Hoisting the spill creates problems because
the hoist will mark the copy for later dead code elimination, and spilling the
second register will turn the copy into a spill.

<rdar://problem/9420853>

llvm-svn: 131192
 2011-05-11 18:25:10 +00:00
Owen Anderson
50766bc2f2 Fix encoding of Thumb BLX register instructions. Patch by Koan-Sin Tan. 
llvm-svn: 131189
 2011-05-11 17:00:48 +00:00
Andrew Trick
9d2b107117 Typo and missing checkin from r131186. 
llvm-svn: 131187
 2011-05-11 16:44:08 +00:00
Andrew Trick
25d4fce092 Bugpoint support for miscompilations that result in a crash. 
This change allows bugpoint to pinpoint the "opt" pass and bitcode
segment responsible for a crash caused by miscompilation. At least it
works well for me now, without having to create any custom execution
wrappers.

llvm-svn: 131186
 2011-05-11 16:31:24 +00:00
Nadav Rotem
57dd315a3b Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain). 
If there is a store after the load node, then there is a chain, which means
that there is another user. Thus, asking hasOneUser would fail. Instead we
ask hasNUsesOfValue on the 'data' value.

llvm-svn: 131183
 2011-05-11 14:40:50 +00:00
Nadav Rotem
2a654a69ed Add custom lowering of X86 vector SRA/SRL/SHL when the shift amount is a splat vector. 
llvm-svn: 131179
 2011-05-11 08:12:09 +00:00
Rafael Espindola
dfc30289f1 Revert 131172 as it is causing clang to miscompile itself. I will try 
to provide a reduced testcase.

llvm-svn: 131176
 2011-05-11 03:27:17 +00:00
Bill Wendling
453a924d29 Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp 
intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>

llvm-svn: 131174
 2011-05-11 01:11:55 +00:00
Evan Cheng
271e0ebf0a Add a late optimization to BranchFolding that hoist common instruction sequences 
at the start of basic blocks to their common predecessor. It's actually quite
common (e.g. about 50 times in JM/lencod) and has shown to be a nice code size
benefit. e.g.

        pushq   %rax
        testl   %edi, %edi
        jne     LBB0_2
## BB#1:
        xorb    %al, %al
        popq    %rdx
        ret
LBB0_2:
        xorb    %al, %al
        callq   _foo
        popq    %rdx
        ret

=>

        pushq   %rax
        xorb    %al, %al
        testl   %edi, %edi
        je      LBB0_2
## BB#1:
        callq   _foo
LBB0_2:
        popq    %rdx
        ret

rdar://9145558

llvm-svn: 131172
 2011-05-11 01:03:01 +00:00
Eric Christopher
3c17ef53c3 Optimize atomic lock or that doesn't use the result value. 
Next up: xor and and.

Part of rdar://8470697

llvm-svn: 131171
 2011-05-10 23:57:45 +00:00
Rafael Espindola
2cfc1f6480 Fix cmake again. 
llvm-svn: 131164
 2011-05-10 22:42:41 +00:00
Nick Lewycky
b7f59c5ef2 Remove empty file. 
llvm-svn: 131162
 2011-05-10 22:38:17 +00:00
Rafael Espindola
ce84130f0f Avoid a gcc warning. 
llvm-svn: 131161
 2011-05-10 22:28:35 +00:00
Rafael Espindola
8393021e1e Fix cmake build. 
llvm-svn: 131160
 2011-05-10 22:19:33 +00:00
Nick Lewycky
5a1035a0dc Revert r131155 for now. It makes VMCore depend on Analysis and Transforms 
headers.

llvm-svn: 131159
 2011-05-10 22:16:06 +00:00
Rafael Espindola
26a7112c00 Initialize moveTypeModule. 
llvm-svn: 131157
 2011-05-10 21:54:59 +00:00
Eli Friedman
aecbcc0c8f Disable my little CopyToReg argument hack with fast-isel. rdar://problem/9413587 . 
llvm-svn: 131156
 2011-05-10 21:50:58 +00:00
David Chisnall
17ae92b2d8 Add support for plugins add passes to the default set of passes. The standard set of passes used by front ends can now be modified by LLVM plugins, without needing to modify any front ends. 
Still to do:

- Allow replacing / removing passes (infrastructure there, just needs an infrastructure exposed)
- Defining sets of passes to be added or removed as a group
- Extending the support to allow user-defined groups of optimisations
- Allow plugins to be specified for loading automatically (e.g. from plugins.conf or some similar mechanism)

Reviewed by Nick Lewycky.

llvm-svn: 131155
 2011-05-10 21:36:48 +00:00
Stuart Hastings
e589a29764 Correctly walk through nested and adjacent CALLSEQ_START nodes. No 
test case; I've only seen this on a release branch, and I can't get it
to reproduce on trunk.  rdar://problem/7662569

llvm-svn: 131152
 2011-05-10 21:20:03 +00:00
Rafael Espindola
46b0ce1b5f Produce a __debug_frame section on darwin ARM when appropriate. 
llvm-svn: 131151
 2011-05-10 21:04:45 +00:00
Rafael Espindola
e8890f4b16 On MachO, unlike ELF, there should be no relocation to produce the CIE pointer. 
llvm-svn: 131149
 2011-05-10 20:59:42 +00:00
Rafael Espindola
9b3e6a9cb4 Rename DwarfRequiresRelocationForStmtList to 
DwarfRequiresRelocationForSectionOffset as this is not specific to StmtList.

llvm-svn: 131148
 2011-05-10 20:35:05 +00:00
Rafael Espindola
ec3d43391f The EH symbols are only needed in eh_frame, not debug_frame. 
llvm-svn: 131146
 2011-05-10 19:51:53 +00:00
Rafael Espindola
92dc58fea6 Use .cfi_sections to put the unwind info in .debug_frame when possible. With 
this clang will use .debug_frame in, for example,
clang -g -c -m32 test.c
This matches gcc's behaviour. It looks like .debug_frame is a bit bigger
than .eh_frame, but has the big advantage of not being allocated.

llvm-svn: 131140
 2011-05-10 18:39:09 +00:00
Eric Christopher
aa7c86ec19 Refactor lock versions of binary operators to be a little less 
cut and paste.

llvm-svn: 131139
 2011-05-10 18:36:16 +00:00
Jason W Kim
5b6e73e499 First cut at getting debugging support for ARM/MC/ELF/.o 
DWARF stuff also gets fixed up by ELFARMAsmBackend::ApplyFixup(),
but the offset is not guaranteed to be mod 4 == 0 as in text/data. 

llvm-svn: 131137
 2011-05-10 18:07:25 +00:00
Jakob Stoklund Olesen
1dfbef8150 Fix PR9883. Make sure all caches are invalidated when a live range is repaired. 
The previous invalidation missed the alias interference caches.

Also add a stats counter for the number of repaired ranges.

llvm-svn: 131133
 2011-05-10 17:37:41 +00:00
Rafael Espindola
ff4443c82c In a debug_frame the cfi offset is to the start of the debug_frame section! 
llvm-svn: 131129
 2011-05-10 15:20:23 +00:00
Rafael Espindola
33cc7a8f74 Add CFIStartSections to the asm printer. Add an assert that at least 
one of the sections is created.

llvm-svn: 131124
 2011-05-10 13:39:48 +00:00
Justin Holewinski
ecdabf3295 PTX: add PTX 2.3 setting in PTX sub-target. 
Patch by Wei-Ren Chen

llvm-svn: 131123
 2011-05-10 12:32:11 +00:00
Rafael Espindola
b7c942431f Add support for producing .deubg_frame sections. 
llvm-svn: 131121
 2011-05-10 03:54:12 +00:00
Rafael Espindola
566d48be51 Small cleanups. 
llvm-svn: 131120
 2011-05-10 03:26:21 +00:00
Rafael Espindola
3d5f7d1fc1 Factor some code into a new EmitFrames method. 
llvm-svn: 131119
 2011-05-10 03:14:15 +00:00
Rafael Espindola
dce419e62b Remove unused argument. 
llvm-svn: 131118
 2011-05-10 03:01:39 +00:00
Rafael Espindola
c5f10dda05 Parsing and plumbing for .cfi_sections. 
llvm-svn: 131117
 2011-05-10 01:10:18 +00:00
Devang Patel
ca956d0334 Preserve line number information. 
llvm-svn: 131112
 2011-05-10 00:03:11 +00:00
Devang Patel
38193e7550 Do not ignore InlinedAt while walking up scope chain to find subprogram node. 
llvm-svn: 131106
 2011-05-09 22:14:49 +00:00
Eric Christopher
ba60d3d108 Look through struct wrapped types for inline asm statments. 
Patch by Evan Cheng.

llvm-svn: 131093
 2011-05-09 20:04:43 +00:00
Dan Gohman
392ab7a6ba Change a few std::maps to DenseMaps. 
llvm-svn: 131088
 2011-05-09 18:44:09 +00:00
Eric Christopher
49409b8534 Fix td file comments for Mips. 
Patch by Liu <proljc@gmail.com>!

llvm-svn: 131086
 2011-05-09 18:16:46 +00:00
Mon P Wang
08d3b69861 Fixed MC encoding for index_align for VLD1/VST1 (single element from one lane) for size 32 
llvm-svn: 131085
 2011-05-09 17:47:27 +00:00
Duncan Sands
afe16d8de1 Indent properly, no functionality change. 
llvm-svn: 131082
 2011-05-09 08:03:33 +00:00
NAKAMURA Takumi
b8bfce2165 Eliminate an unused line to fix a warning. 
llvm-svn: 131078
 2011-05-08 23:19:04 +00:00
Jakob Stoklund Olesen
56a5573e6f Remove an assertion to fix PR9872. 
It can happen that a live debug variable is the last use of a sub-register, and
the register allocator will pick a larger register class for the virtual
register.  If the allocated register doesn't support the sub-register index,
just use %noreg for the debug variables instead of asserting.

In PR9872, a debug variable ends up in the sub_8bit_hi part of a GR32_ABCD
register. The register is split and one part is inflated to GR32 and assigned
%ESI because there are no more normal uses of sub_8bit_hi.

Since %ESI doesn't have that sub-register, substPhysReg asserted. Now it will
simply insert a %noreg instead, and the debug variable will be marked
unavailable in that range.

We don't currently have a way of saying: !"value" is in bits 8-15 of %ESI, I
don't know if DWARF even supports that.

llvm-svn: 131073
 2011-05-08 19:21:08 +00:00
Benjamin Kramer
ba7c9948e8 X86: Add a bunch of peeps for add and sub of SETB. 
"b + ((a < b) ? 1 : 0)" compiles into
	cmpl	%esi, %edi
	adcl	$0, %esi
instead of
	cmpl	%esi, %edi
	sbbl	%eax, %eax
	andl	$1, %eax
	addl	%esi, %eax

This saves a register, a false dependency on %eax
(Intel's CPUs still don't ignore it) and it's shorter.

llvm-svn: 131070
 2011-05-08 18:36:07 +00:00
Rafael Espindola
0baeced1f4 Don't force relaxation of AdvanceLoc instructions on OS X. gdb is happy with 
the smaller encoding and this cuts 270336 bytes from a release version of
clang and 1246272 bytes from a debug build.

llvm-svn: 131067
 2011-05-08 14:35:21 +00:00
Jakob Stoklund Olesen
4a57c64408 Eliminate the ARM sub-register indexes that are not needed by the sources. 
Tablegen will invent its own names for these indexes, and the register file is a
bit simpler.

llvm-svn: 131059
 2011-05-07 21:22:42 +00:00